modified:   benchmark/Makefile
	new file:   benchmark/rotm.c

Fix DYNAMIC_ARCH build for POWER9

Add benchmark file trmv.c and modify benchmark/Makefile to test s/d/c/ztrmv

Switch blas_server to use acq/rel semantics

Setting DYNAMIC_ARCH=1 on POWER9 does not build POWER9 files due to some
compiler version checks.  This patch fixes some of the macros that are used
to check compiler version.  On fixing those checks, there are some new make
failures related to icamin, icamax, isamin, isamax and caxpy files on POWER9.
This patch fixes those failures as well.

Fix potential index overflows at large matrix sizes in the benchmark codes

Improve test coverage for utests.

Fix #2480

Update benchmark statistical time function

The function gettimeofday does not count the time，when testing the axpy small data volume use case.
Use the function clock_gettime to replace the gettimeofday function to count the time.

Heavy-weight locking isn't required to pass the work queue
pointer between threads and simple atomic acquire/release
semantics can be used instead. This is especially important as
pthread_mutex_lock() isn't fair.

We've observed substantial variation in runtime because of the
the unfairness of these locks which complety goes away with
this implementation.

The locks themselves are left to provide a portable way for
idling threads to sleep/wakeup after many unsuccessful iterations
waiting.

Update ChangeLog for 0.3.9

Use POWER8 kernels on big-endian POWER9 for now

rebase

Fix barriers in level3_thread

Use wait-for-event to not spin in the blas_lock

Add syr benchmark

Make rpcc() on arm64 get closer to what x86 returns

Apply MinGW AVX512 compilation fix to fortran options as well

Adjust SkylakeX GEMM3M parameters, add an AVX512 STRMM kernel and fix performance bugs in AVX2 s/c/z GEMM

Add Neoverse-N1 core

The Arm implementation of rpcc() uses the architected timer
which is defined by the SBSA to be between 10-400MHz. These numbers
are much smaller than the cycle counter frequency used by x86. Make
the numbers closer by shifting the cycle counter up by the number of
leading zeros in the cntfrq_el0 register which gets us closer to a
noraml cpu clock cycle range.

The implementation is a hybird of the ARMV8 one with some of the
improved TX2 rountines along with specifying -march=v8.2-a

original issue was #1708, I see now that the same problem affects gfortran compilation. The underlying issue is said to be fixed (but not yet released) on all branches of gcc as of a few days ago but it will certainly take time to reach mingw/msys.

Always select ARMV8 parameters for big servers when cpu is TSV110 or EMAG8180

rebase

[WIP] Add support for Ampere EMAG8180 ARMV8 cpu