Add CBLAS interfaces for BLAS extensions ?AMIN/?AMAX and C/ZAXPYC

utest: Add tests for zscal

Fixed handling of NAN and INF arguments when
inc is greater than 1.

LoongArch64: Handle NAN and INF

Loongarch64: amax and amin

No interface named {c/z}a{min/max}, keeping it would
cause ambiguity

Use +sve in arch declarations of the fallback paths for SVE targets

Fix BLAS and LAPACK tests for RVV 1.0 target, update to 0.12.0 intrincics

Fix BLAS and LAPACK tests for C910V and RISCV64_ZVL256B targets

Fix BLAS, BLAS-like functions and Generic RISC-V kernels

* Fixed bugs in dgemm, [a]min\max, asum kernels
* Added zero checks for BLAS kernels
* Added dsdot implementation for RVV 0.7.1
* Fixed bugs in _vector files for C910V and RISCV64_ZVL256B targets
* Added additional definitions for RISCV64_ZVL256B target

Update T-Head toolchains v2.8.0

Signed-off-by: Han Gao/Revy/Rabenda <rabenda.cn@gmail.com>

Add dynamic support for Arm(R) Neoverse(TM) V2 processor

Whilst I figure out how best to map the L2 parameters without
duplicating all of `ARMV8SVE`, lets just map this to `NEOVERSEV1`.

[RISC-V] Add RISC-V Vector 128-bit target

* Fixed gemmt, imatcopy, zimatcopy_cnc functions
* Fixed cblas_cscal testing in ctest
* Removed rotmg unreacheble code
* Added zero size checks

Fix utest compilation

* Update intrincics API to 0.12.0 version (Stride Segment Loads/Stores)
* Fixed nrm2, axpby, ncopy, zgemv and scal kernels
* Added zero size checks

Introduced recently when adding new test cases for ZSCAL

- include cblas is needed for cblas_zscal
- ASSERT macro does not exist
- missing closing )

Add CSKY support

Increase multithreading threshold for S/DGEMV by a factor of 50

[RISC-V] Improve RVV kernel generator LMUL usage

* Support ArmCompilerforLinux as classic flang