You can end up in a situation where the HAVE_x/NO_x flags are used for compiling param.h but not
Makefile.conf which leads to further inconsistencies. This uses the existing logic to parse ARCHCONFIG and ensures it ends up
in the eventual Makefile.conf whenever FORCE is enabled.

This was gated behind GOTOBLAS_MAKEFILE, which looks like it's intended
to stop the much more expensive run of `Makefile.prebuild` rather than
prevent reading the configuration. Moving this `endif` means that things
such as `dynamic_<X>.c` correctly get the architecture flags.

Remove prefetches from SVE kernels

Fix uninitialized variables on quick return paths of ?LARR? (Reference-LAPACK 775)

GH workflow: ensure libtinfo is available for Linux/flang

Add sscal.c + microkernels for Haswell, Zen, Skylake and newer.

Copy NO_WARMUP preset from Makefile.rule to CMAKE to fix startup delays

This is a precursor to enabling the SVE kernels for Arm(R) Neoverse(TM)
V1 which has 256-bit SVE. Testing revealed that the SVE kernel was
actually worse in some cases than the existing kernel which seemed odd -
removing these prefetches the underlying architecture seems to do a better job
😸

Fix INTERFACE64 option handling in gmake builds on riscv and loongarch

Add -lm on any arm/arm64 BSD, not just FreeBSD

Patch for Intel Fortran compiler

Fix C function signatures in LAPACKE headers and f2c-generated LAPACK C files

This PR patches the f_check scripts to detect the ifort compiler. With
out this, the value of F_COMPILER is G77 which causes the link phase to
use icc rather than ifort, resulting in missing libifcore.

Fix stride in shortcut path of C/ZSYR for small N

Travis CI: Add a DYNAMIC_ARCH build on Neoverse using older gcc8

Remove SVE from Arm(R) Neoverse(TM) N1 CPU in Makefile

I incorrectly added `+sve` to the Neoverse(TM) N1 CPUs GCC parameters,
which doesn't support SVE - this results in failed builds when using a
compiler that doesn't support `-mtune=neoverse-n1` which appears to hide
the mistake.

Unlike [dcz]scal, sscal still used the original GotoBLAS SSE code from scal_sse.S.
This code follows dscal as closely as possible, except for the inc_x > 1 code
for which a plain C loop is used much like the one in cscal.c, instead of an
adaptation of the SSE2 asm code of dscal.c (I tried but the performance wasn't
better than the plain C loop).

dscal: use ymm registers in Haswell microkernel

Allocate work array in LAPACKE ?TGSEN when ijob is zero (Reference-LAPACK PR 733)

Check for NaN in ?GECON (Reference-LAPACK PR765)

Fix uninitialized M in quick return from D/SLARRD (Reference-LAPACK PR769)

Set SWITCH_RATIO for Arm(R) Neoverse(TM) V1 CPUs

scal benchmark: eliminate y, move init/timing out of loop

Add SVE implementation for sdot/ddot

Using 256-bit registers in dscal makes this microkernel consistent with
cscal and zscal, and generally doubles performance if the vector fits in
L1 cache.

This adds an SVE implementation to sdot/ddot when available, falling back to the previous Advanced SIMD kernel where there's no SVE implementation for the kernel.

All the targets were essentially treating `dot_thunderx2t99.c` as the Advanced SIMD implementation so I've renamed it to better fit with the feature detection.