The Arm implementation of rpcc() uses the architected timer
which is defined by the SBSA to be between 10-400MHz. These numbers
are much smaller than the cycle counter frequency used by x86. Make
the numbers closer by shifting the cycle counter up by the number of
leading zeros in the cntfrq_el0 register which gets us closer to a
noraml cpu clock cycle range.

Always select ARMV8 parameters for big servers when cpu is TSV110 or EMAG8180

rebase

[WIP] Add support for Ampere EMAG8180 ARMV8 cpu

[OpenBlas]:benchmark/copy.c has time，x,y data loop problems

Apply fix from Reference-LAPACK PR 390

Add proper defaults for the IxMIN/IxMAX kernels on mips64 and power

the fallbacks from Makefile.L1 assume a combined source for absolute value and non-absolute (with ifdef USE_ABS) but here we have separate implementations

the fallbacks from Makefile.L1 assume a combined source for absolute value and non-absolute (with ifdef USE_ABS) but here we have separate implementations

rebase

Fix handling of ppc endianness

rebase

Fix install name on osx again

Nightly homebrew check

Fix ISMIN and ISMAX kernel choices for POWER8

to fix utest failure in new ismin test -  Makefile.L1 defaults look wrong

Also, add comments to clarify what the test is testing

Fix building on osx

rebase

Fix iamax sse implementation and add utests

The was a typo in iamax_sse.S where one of the comparison
was cmpeqps instead of cmpeqss. That misdetected index
for sequences where the minimum value was 0.

Restore -march flag for Android builds

fixes #2419 - renewed discussion in #2112 suggests removal of the option was primarily aimed at non-Android builds

rebase

Make ctest verbose for drone

Add CMake related files to .gitignore.