This patch makes use of new POWER10 vector pair instructions for
loads and stores.

Replace spurious AVX512 requirement in the Haswell srot microkernel with an AVX2/FMA3 guard

This patch makes use of new POWER10 vector pair instructions for
loads and stores.

The LLVM and GCC teams agreed to rename the __builtin_mma_assemble_pair and
__builtin_mma_disassemble_pair built-ins to __builtin_vsx_assemble_pair and
__builtin_vsx_disassemble_pair respectively. This patch is to make
corresponding changes in dgemm kernel. Also made changes in
inputs to those builtins to avoid some potential typecasting issues.

Reference gcc commit id:77ef995c1fbcab76a2a69b9f4700bcfd005d8e62

as suggested by MigMuc in issue 2532

This patch makes use of new POWER10 vector pair instructions for
loads and stores.

This patch makes use of new POWER10 vector pair instructions for
loads and stores.

Initial code for Cooperlake BF16 GEMM kernel

scan-build fixes

This patch makes use of new POWER10 vector pair instructions for
loads and stores.

This patch makes use of new POWER10 vector pair instructions for
loads and stores.

Fix building "generic" TRMM kernel with CMake

The CMake "TARGET_CORE" variables stores the "generic" target name in all lowercase letters, but gets compared to an all uppercase string, which results in the wrong TRMM kernel being selected.
This commit converts the TARGET_CORE to all uppercase before comparing its value to make sure case mismatches are not an issue in the future anymore.

This patch makes use of new POWER10 vector pair instructions for
loads and stores.

Fix double precision nrm2 kernels returning NaN when the
input vectors contain Inf/-Inf.

Temporarily revert to the old NRM2 kernels for ThunderX2/3 and NeoverseN1

This patch aligns the stores to 32 byte boundary for scopy and dcopy
before entering into vector pair loop. For ccopy, changed the store
instructions to stxv to improve performance of unaligned cases.

POWER10: Improve axpy performance

POWER: Added special unrolled vectorized versions of "Solve" for specific si…

This patch aligns the stores to 32 byte boundary for saxpy and daxpy
before entering into vector pair loop. Fox caxpy, changed the store
instructions to stxv to improve performance of unaligned cases.

1. Using core loongson3r3 and loongson3r4 for loongson
2. Add DYNAMIC_ARCH for loongson

Change-Id: I1c6b54dbeca3a0cc31d1222af36a7e9bd6ab54c1

MIPS: Fix two bugs

Fix test errors reported by cblas_cgemm & cblas_ctrmm

The cgemv and zgemv test case will call cgemv_n/t_msa.c zgemv_n/t_msa.c files in MIPS environment.
When the macro CONJ is defined, the calculation result will be wrong due to the wrong definition of OP2.
This patch updates the value of OP2 and passes the corresponding test.

The swap test case will call sswap_msa.c and dswap_msa.c files in MIPS environmnet.
When inc_x or inc_y is equal to zero, the calculation result of the two functions will be wrong.
This patch adds the processing of inc_x or inc_y equal to zero, and the swap test case has passed.