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mindspore2022/mindspore/lite/nnacl/assembly/fp16/PostFuncBiasReluC8Fp16.S

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  1. #ifdef __aarch64__

  2. 

  3.     .text

  4.     .align 5

  5.     //.p2align 5,,15

  6.     .global PostFuncBiasReluC8Fp16

  7. #ifndef __APPLE__

  8.     .type PostFuncBiasReluC8Fp16, %function

  9. #endif

  10. 

  11. //void PostFuncBiasReluC8Fp16(float *dst, const float *src, const float *bias, size_t oc8div,size_t oc8mod

  12. //                            size_t plane_size, size_t stride, int relu_type);

  13. // x0 dst           x1 srx           x2 bias

  14. // x3 oc8div        x4 oc8mod        x5 plane_size

  15. // x6 stride        x7 relu_type

  16. 

  17. // v0 ~ v7 value

  18. // v16  bias data

  19. // x22 x23  x24  x25  write loop tmp buf

  20. // x26  relu6  #6;    x27 relu #0

  21. // w10  oc8 loop control

  22. // w13  hw  loop control

  23. 

  24. PostFuncBiasReluC8Fp16:

  25.   movi v26.8h, #0x46, lsl #8

  26.   dup v27.8h, wzr

  27.   mov w10, #0

  28. 

  29. Loop_C8:

  30.   cmp w10, w3

  31.   beq Loop_C1

  32.   mov x25, #2

  33.   mul x24, x10, x25

  34.   add x25, x0, x24

  35.   add w10, w10, #8

  36.   mov w13, w5

  37.   ld1 {v16.8h}, [x2], #16

  38. 

  39. Loop8x8:

  40.   cmp w13, #8

  41.   blt Loop_4x8

  42.   sub w13, w13, #8

  43.   ld1 {v0.8h, v1.8h, v2.8h, v3.8h}, [x1], #64

  44.   ld1 {v4.8h, v5.8h, v6.8h, v7.8h}, [x1], #64

  45. 

  46.   fadd v0.8h, v0.8h, v16.8h

  47.   fadd v1.8h, v1.8h, v16.8h

  48.   fadd v2.8h, v2.8h, v16.8h

  49.   fadd v3.8h, v3.8h, v16.8h

  50.   fadd v4.8h, v4.8h, v16.8h

  51.   fadd v5.8h, v5.8h, v16.8h

  52.   fadd v6.8h, v6.8h, v16.8h

  53.   fadd v7.8h, v7.8h, v16.8h

  54. 

  55.   cmp w7, #2

  56.   beq Relu6_8x8

  57.   cmp w7, #1

  58.   beq Relu_8x8

  59.   b Write_8x8

  60. Relu6_8x8:

  61.   fmin v0.8h, v0.8h, v26.8h

  62.   fmin v1.8h, v1.8h, v26.8h

  63.   fmin v2.8h, v2.8h, v26.8h

  64.   fmin v3.8h, v3.8h, v26.8h

  65.   fmin v4.8h, v4.8h, v26.8h

  66.   fmin v5.8h, v5.8h, v26.8h

  67.   fmin v6.8h, v6.8h, v26.8h

  68.   fmin v7.8h, v7.8h, v26.8h

  69. Relu_8x8:

  70.   fmax v0.8h, v0.8h, v27.8h

  71.   fmax v1.8h, v1.8h, v27.8h

  72.   fmax v2.8h, v2.8h, v27.8h

  73.   fmax v3.8h, v3.8h, v27.8h

  74.   fmax v4.8h, v4.8h, v27.8h

  75.   fmax v5.8h, v5.8h, v27.8h

  76.   fmax v6.8h, v6.8h, v27.8h

  77.   fmax v7.8h, v7.8h, v27.8h

  78. Write_8x8:

  79.   st1 {v0.8h}, [x25], x6

  80.   st1 {v1.8h}, [x25], x6

  81.   st1 {v2.8h}, [x25], x6

  82.   st1 {v3.8h}, [x25], x6

  83.   st1 {v4.8h}, [x25], x6

  84.   st1 {v5.8h}, [x25], x6

  85.   st1 {v6.8h}, [x25], x6

  86.   st1 {v7.8h}, [x25], x6

  87.   b Loop8x8

  88. 

  89. Loop_4x8:

  90.   cmp w13, #4

  91.   blt Loop_1x8

  92.   sub w13, w13, #4

  93.   ld1 {v0.8h, v1.8h, v2.8h, v3.8h}, [x1], #64

  94. 

  95.   fadd v0.8h, v0.8h, v16.8h

  96.   fadd v1.8h, v1.8h, v16.8h

  97.   fadd v2.8h, v2.8h, v16.8h

  98.   fadd v3.8h, v3.8h, v16.8h

  99. 

  100.   cmp w7, #2

  101.   beq Relu6_4x8

  102.   cmp w7, #1

  103.   beq Relu_4x8

  104.   b Write_4x8

  105. Relu6_4x8:

  106.   fmin v0.8h, v0.8h, v26.8h

  107.   fmin v1.8h, v1.8h, v26.8h

  108.   fmin v2.8h, v2.8h, v26.8h

  109.   fmin v3.8h, v3.8h, v26.8h

  110. Relu_4x8:

  111.   fmax v0.8h, v0.8h, v27.8h

  112.   fmax v1.8h, v1.8h, v27.8h

  113.   fmax v2.8h, v2.8h, v27.8h

  114.   fmax v3.8h, v3.8h, v27.8h

  115. Write_4x8:

  116.   st1 {v0.8h}, [x25], x6

  117.   st1 {v1.8h}, [x25], x6

  118.   st1 {v2.8h}, [x25], x6

  119.   st1 {v3.8h}, [x25], x6

  120.   b Loop_4x8

  121. 

  122. Loop_1x8:

  123.   cmp w7, #2

  124.   beq Relu6_1x8

  125.   cmp w7, #1

  126.   beq Relu_1x8

  127.   b Write_1x8

  128. Relu6_1x8:

  129.   cmp w13, #0

  130.   beq Loop_C8

  131.   sub w13, w13, #1

  132.   ld1 {v0.8h}, [x1], #16

  133.   fadd v0.8h, v0.8h, v16.8h

  134.   fmin v0.8h, v0.8h, v26.8h

  135.   fmax v0.8h, v0.8h, v27.8h

  136.   st1 {v0.8h}, [x25], x6

  137.   b Relu6_1x8

  138. Relu_1x8:

  139.   cmp w13, #0

  140.   beq Loop_C8

  141.   sub w13, w13, #1

  142.   ld1 {v0.8h}, [x1], #16

  143.   fadd v0.8h, v0.8h, v16.8h

  144.   fmax v0.8h, v0.8h, v27.8h

  145.   st1 {v0.8h}, [x25], x6

  146.   b Relu_1x8

  147. Write_1x8:

  148.   cmp w13, #0

  149.   beq Loop_C8

  150.   sub w13, w13, #1

  151.   ld1 {v0.8h}, [x1], #16

  152.   fadd v0.8h, v0.8h, v16.8h

  153.   st1 {v0.8h}, [x25], x6

  154.   b Write_1x8

  155. 

  156. 

  157. Loop_C1:

  158.   cmp x4, #0

  159.   beq End

  160.   mov w13, w5

  161.   ld1 {v16.8h}, [x2], #16

  162.   mov x25,  #2

  163.   mul x24, x10, x25

  164.   add x22, x0, x24

  165. 

  166.   cmp x4, #1

  167.   beq Loop_C1_1

  168.   cmp x4, #2

  169.   beq Loop_C1_2

  170.   cmp x4, #3

  171.   beq Loop_C1_3

  172.   cmp x4, #4

  173.   beq Loop_C1_4

  174.   cmp x4, #5

  175.   beq Loop_C1_5

  176.   cmp x4, #6

  177.   beq Loop_C1_6

  178.   cmp x4, #7

  179.   beq Loop_C1_7

  180. 

  181. Loop_C1_1:

  182.   cmp w7, #2

  183.   beq Loop_C1_1_Relu6

  184.   cmp w7, #1

  185.   beq Loop_C1_1_Relu

  186.   b Loop_C1_1_Write

  187. Loop_C1_1_Relu6:

  188.   cmp w13, #0

  189.   beq End

  190.   sub w13, w13, #1

  191.   ld1 {v0.8h}, [x1], #16

  192.   fadd v0.8h, v0.8h, v16.8h

  193.   fmin v0.8h, v0.8h, v26.8h

  194.   fmax v0.8h, v0.8h, v27.8h

  195.   st1 {v0.h}[0], [x22], x6

  196.   b Loop_C1_1_Relu6

  197. Loop_C1_1_Relu:

  198.   cmp w13, #0

  199.   beq End

  200.   sub w13, w13, #1

  201.   ld1 {v0.8h}, [x1], #16

  202.   fadd v0.8h, v0.8h, v16.8h

  203.   fmax v0.8h, v0.8h, v27.8h

  204.   st1 {v0.h}[0], [x22], x6

  205.   b Loop_C1_1_Relu

  206. Loop_C1_1_Write:

  207.   cmp w13, #0

  208.   beq End

  209.   sub w13, w13, #1

  210.   ld1 {v0.8h}, [x1], #16

  211.   fadd v0.8h, v0.8h, v16.8h

  212.   st1 {v0.h}[0], [x22], x6

  213.   b Loop_C1_1_Write

  214. 

  215. Loop_C1_2:

  216.   add x24, x0, #2

  217.   cmp w7, #2

  218.   beq Loop_C1_2_Relu6

  219.   cmp w7, #1

  220.   beq Loop_C1_2_Relu

  221.   b Loop_C1_2_Write

  222. Loop_C1_2_Relu6:

  223.   cmp w13, #0

  224.   beq End

  225.   sub w13, w13, #1

  226.   ld1 {v0.8h}, [x1], #16

  227.   fadd v0.8h, v0.8h, v16.8h

  228.   fmin v0.8h, v0.8h, v26.8h

  229.   fmax v0.8h, v0.8h, v27.8h

  230.   st1 {v0.h}[0], [x22], x6

  231.   st1 {v0.h}[1], [x24], x6

  232.   b Loop_C1_2_Relu6

  233. Loop_C1_2_Relu:

  234.   cmp w13, #0

  235.   beq End

  236.   sub w13, w13, #1

  237.   ld1 {v0.8h}, [x1], #16

  238.   fadd v0.8h, v0.8h, v16.8h

  239.   fmax v0.8h, v0.8h, v27.8h

  240.   st1 {v0.h}[0], [x22], x6

  241.   st1 {v0.h}[1], [x24], x6

  242.   b Loop_C1_2_Relu

  243. Loop_C1_2_Write:

  244.   cmp w13, #0

  245.   beq End

  246.   sub w13, w13, #1

  247.   ld1 {v0.8h}, [x1], #16

  248.   fadd v0.8h, v0.8h, v16.8h

  249.   st1 {v0.h}[0], [x22], x6

  250.   st1 {v0.h}[1], [x24], x6

  251.   b Loop_C1_2_Write

  252. 

  253. 

  254. Loop_C1_3:

  255.   add x24, x22, #2

  256.   add x25, x22, #4

  257.   cmp w7, #2

  258.   beq Loop_C1_3_Relu6

  259.   cmp w7, #1

  260.   beq Loop_C1_3_Relu

  261.   b Loop_C1_3_Write

  262. Loop_C1_3_Relu6:

  263.   cmp w13, #0

  264.   beq End

  265.   sub w13, w13, #1

  266.   ld1 {v0.8h}, [x1], #16

  267.   fadd v0.8h, v0.8h, v16.8h

  268.   fmin v0.8h, v0.8h, v26.8h

  269.   fmax v0.8h, v0.8h, v27.8h

  270.   st1 {v0.h}[0], [x22], x6

  271.   st1 {v0.h}[1], [x24], x6

  272.   st1 {v0.h}[2], [x25], x6

  273.   b Loop_C1_3_Relu6

  274. Loop_C1_3_Relu:

  275.   cmp w13, #0

  276.   beq End

  277.   sub w13, w13, #1

  278.   ld1 {v0.8h}, [x1], #16

  279.   fadd v0.8h, v0.8h, v16.8h

  280.   fmax v0.8h, v0.8h, v27.8h

  281.   st1 {v0.h}[0], [x22], x6

  282.   st1 {v0.h}[1], [x24], x6

  283.   st1 {v0.h}[2], [x25], x6

  284.   b Loop_C1_3_Relu

  285. Loop_C1_3_Write:

  286.   cmp w13, #0

  287.   beq End

  288.   sub w13, w13, #1

  289.   ld1 {v0.8h}, [x1], #16

  290.   fadd v0.8h, v0.8h, v16.8h

  291.   st1 {v0.h}[0], [x22], x6

  292.   st1 {v0.h}[1], [x24], x6

  293.   st1 {v0.h}[2], [x25], x6

  294.   b Loop_C1_3_Write

  295. 

  296. Loop_C1_4:

  297.   cmp w7, #2

  298.   beq Loop_C1_4_Relu6

  299.   cmp w7, #1

  300.   beq Loop_C1_4_Relu

  301.   b Loop_C1_4_Write

  302. Loop_C1_4_Relu6:

  303.   cmp w13, #0

  304.   beq End

  305.   sub w13, w13, #1

  306.   ld1 {v0.8h}, [x1], #16

  307.   fadd v0.8h, v0.8h, v16.8h

  308.   fmin v0.8h, v0.8h, v26.8h

  309.   fmax v0.8h, v0.8h, v27.8h

  310.   st1 {v0.4h}, [x22], x6

  311.   b Loop_C1_4_Relu6

  312. Loop_C1_4_Relu:

  313.   cmp w13, #0

  314.   beq End

  315.   sub w13, w13, #1

  316.   ld1 {v0.8h}, [x1], #16

  317.   fadd v0.8h, v0.8h, v16.8h

  318.   fmax v0.8h, v0.8h, v27.8h

  319.   st1 {v0.4h}, [x22], x6

  320.   b Loop_C1_4_Relu6

  321. Loop_C1_4_Write:

  322.   cmp w13, #0

  323.   beq End

  324.   sub w13, w13, #1

  325.   ld1 {v0.8h}, [x1], #16

  326.   fadd v0.8h, v0.8h, v16.8h

  327.   st1 {v0.4h}, [x22], x6

  328.   b Loop_C1_4_Write

  329. 

  330. Loop_C1_5:

  331.   add x25, x22, #8

  332.   cmp w7, #2

  333.   beq Loop_C1_5_Relu6

  334.   cmp w7, #1

  335.   beq Loop_C1_5_Relu

  336.   b Loop_C1_5_Write

  337. Loop_C1_5_Relu6:

  338.   cmp w13, #0

  339.   beq End

  340.   sub w13, w13, #1

  341.   ld1 {v0.8h}, [x1], #16

  342.   fadd v0.8h, v0.8h, v16.8h

  343.   fmin v0.8h, v0.8h, v26.8h

  344.   fmax v0.8h, v0.8h, v27.8h

  345.   st1 {v0.4h}, [x22], x6

  346.   st1 {v0.h}[4], [x25], x6

  347.   b Loop_C1_5_Relu6

  348. Loop_C1_5_Relu:

  349.   cmp w13, #0

  350.   beq End

  351.   sub w13, w13, #1

  352.   ld1 {v0.8h}, [x1], #16

  353.   fadd v0.8h, v0.8h, v16.8h

  354.   fmax v0.8h, v0.8h, v27.8h

  355.   st1 {v0.4h}, [x22], x6

  356.   st1 {v0.h}[4], [x25], x6

  357.   b Loop_C1_5_Relu

  358. Loop_C1_5_Write:

  359.   cmp w13, #0

  360.   beq End

  361.   sub w13, w13, #1

  362.   ld1 {v0.8h}, [x1], #16

  363.   fadd v0.8h, v0.8h, v16.8h

  364.   st1 {v0.4h}, [x22], x6

  365.   st1 {v0.h}[4], [x25], x6

  366.   b Loop_C1_5_Write

  367. 

  368. Loop_C1_6:

  369.   add x23, x22, #8

  370.   add x24, x22, #10

  371.   cmp w7, #2

  372.   beq Loop_C1_6_Relu6

  373.   cmp w7, #1

  374.   beq Loop_C1_6_Relu

  375.   b Loop_C1_6_Write

  376. Loop_C1_6_Relu6:

  377.   cmp w13, #0

  378.   beq End

  379.   sub w13, w13, #1

  380.   ld1 {v0.8h}, [x1], #16

  381.   fadd v0.8h, v0.8h, v16.8h

  382.   fmin v0.8h, v0.8h, v26.8h

  383.   fmax v0.8h, v0.8h, v27.8h

  384.   st1 {v0.4h}, [x22], x6

  385.   st1 {v0.h}[4], [x23], x6

  386.   st1 {v0.h}[5], [x24], x6

  387.   b Loop_C1_6_Relu6

  388. Loop_C1_6_Relu:

  389.   cmp w13, #0

  390.   beq End

  391.   sub w13, w13, #1

  392.   ld1 {v0.8h}, [x1], #16

  393.   fadd v0.8h, v0.8h, v16.8h

  394.   fmax v0.8h, v0.8h, v27.8h

  395.   st1 {v0.4h}, [x22], x6

  396.   st1 {v0.h}[4], [x23], x6

  397.   st1 {v0.h}[5], [x24], x6

  398.   b Loop_C1_6_Relu

  399. Loop_C1_6_Write:

  400.   cmp w13, #0

  401.   beq End

  402.   sub w13, w13, #1

  403.   ld1 {v0.8h}, [x1], #16

  404.   fadd v0.8h, v0.8h, v16.8h

  405.   st1 {v0.4h}, [x22], x6

  406.   st1 {v0.h}[4], [x23], x6

  407.   st1 {v0.h}[5], [x24], x6

  408.   b Loop_C1_6_Write

  409. 

  410. Loop_C1_7:

  411.   add x23, x22, #8

  412.   add x24, x22, #10

  413.   add x25, x22, #12

  414.   cmp w7, #2

  415.   beq Loop_C1_7_Relu6

  416.   cmp w7, #1

  417.   beq Loop_C1_7_Relu

  418.   b Loop_C1_7_Write

  419. Loop_C1_7_Relu6:

  420.   cmp w13, #0

  421.   beq End

  422.   sub w13, w13, #1

  423.   ld1 {v0.8h}, [x1], #16

  424.   fadd v0.8h, v0.8h, v16.8h

  425.   fmin v0.8h, v0.8h, v26.8h

  426.   fmax v0.8h, v0.8h, v27.8h

  427.   st1 {v0.4h}, [x22], x6

  428.   st1 {v0.h}[4], [x23], x6

  429.   st1 {v0.h}[5], [x24], x6

  430.   st1 {v0.h}[6], [x25], x6

  431.   b Loop_C1_7_Relu6

  432. Loop_C1_7_Relu:

  433.   cmp w13, #0

  434.   beq End

  435.   sub w13, w13, #1

  436.   ld1 {v0.8h}, [x1], #16

  437.   fadd v0.8h, v0.8h, v16.8h

  438.   fmax v0.8h, v0.8h, v27.8h

  439.   st1 {v0.4h}, [x22], x6

  440.   st1 {v0.h}[4], [x23], x6

  441.   st1 {v0.h}[5], [x24], x6

  442.   st1 {v0.h}[6], [x25], x6

  443.   b Loop_C1_7_Relu

  444. Loop_C1_7_Write:

  445.   cmp w13, #0

  446.   beq End

  447.   sub w13, w13, #1

  448.   ld1 {v0.8h}, [x1], #16

  449.   fadd v0.8h, v0.8h, v16.8h

  450.   st1 {v0.4h}, [x22], x6

  451.   st1 {v0.h}[4], [x23], x6

  452.   st1 {v0.h}[5], [x24], x6

  453.   st1 {v0.h}[6], [x25], x6

  454.   b Loop_C1_7_Write

  455. 

  456. End:

  457.   ret

  458. #endif