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deconvolutiondepthwise_arm.cpp 27 kB

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  1. // Tencent is pleased to support the open source community by making ncnn available.
  2. //
  3. // Copyright (C) 2017 THL A29 Limited, a Tencent company. All rights reserved.
  4. //
  5. // Licensed under the BSD 3-Clause License (the "License"); you may not use this file except
  6. // in compliance with the License. You may obtain a copy of the License at
  7. //
  8. // https://opensource.org/licenses/BSD-3-Clause
  9. //
  10. // Unless required by applicable law or agreed to in writing, software distributed
  11. // under the License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR
  12. // CONDITIONS OF ANY KIND, either express or implied. See the License for the
  13. // specific language governing permissions and limitations under the License.
  14. #include "deconvolutiondepthwise_arm.h"
  15. #include "layer_type.h"
  16. #if __ARM_NEON
  17. #include <arm_neon.h>
  18. #endif // __ARM_NEON
  19. #include "arm_activation.h"
  20. #include "arm_usability.h"
  21. #include "cpu.h"
  22. namespace ncnn {
  23. DeconvolutionDepthWise_arm::DeconvolutionDepthWise_arm()
  24. {
  25. #if __ARM_NEON
  26. support_packing = true;
  27. #if NCNN_ARM82
  28. support_fp16_storage = cpu_support_arm_asimdhp();
  29. #endif
  30. #endif // __ARM_NEON
  31. #if NCNN_BF16
  32. support_bf16_storage = true;
  33. #endif
  34. }
  35. int DeconvolutionDepthWise_arm::create_pipeline(const Option& opt)
  36. {
  37. if (dynamic_weight)
  38. return 0;
  39. #if NCNN_ARM82
  40. if (support_fp16_storage && opt.use_fp16_storage)
  41. {
  42. return create_pipeline_fp16s(opt);
  43. }
  44. #endif
  45. // create Deconvolution op for each group
  46. const int maxk = kernel_w * kernel_h;
  47. int channels = (weight_data_size / group) / maxk / (num_output / group) * group;
  48. // depth-wise
  49. if (channels == group && group == num_output)
  50. {
  51. int elempack = 1;
  52. #if __ARM_NEON
  53. if (opt.use_packing_layout)
  54. {
  55. elempack = channels % 4 == 0 ? 4 : 1;
  56. }
  57. #endif
  58. Mat weight_data_transposed(weight_data.w);
  59. {
  60. float* pt = weight_data_transposed;
  61. const float* p = weight_data;
  62. for (int i = 0; i < (channels / group) * (num_output / group) * group; i++)
  63. {
  64. for (int k = 0; k < maxk; k++)
  65. {
  66. pt[maxk - 1 - k] = p[k];
  67. }
  68. p += maxk;
  69. pt += maxk;
  70. }
  71. }
  72. #if NCNN_BF16
  73. if (opt.use_bf16_storage)
  74. {
  75. #if __ARM_NEON
  76. if (elempack == 4)
  77. {
  78. Mat weight_data_r2 = weight_data_transposed.reshape(maxk, group);
  79. Mat weight_data_r2_packed;
  80. convert_packing(weight_data_r2, weight_data_r2_packed, 4, opt);
  81. ncnn::cast_float32_to_bfloat16(weight_data_r2_packed, weight_data_tm, opt);
  82. }
  83. #endif // __ARM_NEON
  84. if (elempack == 1)
  85. {
  86. ncnn::cast_float32_to_bfloat16(weight_data_transposed, weight_data_tm, opt);
  87. }
  88. if (opt.lightmode)
  89. weight_data.release();
  90. return 0;
  91. }
  92. #endif // NCNN_BF16
  93. #if __ARM_NEON
  94. // pack4
  95. if (elempack == 4)
  96. {
  97. Mat weight_data_r2 = weight_data_transposed.reshape(maxk, group);
  98. convert_packing(weight_data_r2, weight_data_tm, 4, opt);
  99. }
  100. #endif // __ARM_NEON
  101. // pack1
  102. if (elempack == 1)
  103. {
  104. weight_data_tm = weight_data_transposed;
  105. }
  106. }
  107. else
  108. {
  109. // group deconvolution
  110. for (int i = 0; i < (int)group_ops.size(); i++)
  111. delete group_ops[i];
  112. group_ops.clear();
  113. const int channels_g = channels / group;
  114. const int num_output_g = num_output / group;
  115. group_ops.resize(group);
  116. for (int g = 0; g < group; g++)
  117. {
  118. Mat weight_data_g = weight_data.range(maxk * channels_g * num_output_g * g, maxk * channels_g * num_output_g).clone();
  119. Mat bias_data_g;
  120. if (bias_term)
  121. bias_data_g = bias_data.range(num_output_g * g, num_output_g);
  122. ncnn::Layer* op = ncnn::create_layer_cpu(ncnn::LayerType::Deconvolution);
  123. // set param
  124. ncnn::ParamDict pd;
  125. pd.set(0, num_output_g); // num_output
  126. pd.set(1, kernel_w);
  127. pd.set(11, kernel_h);
  128. pd.set(2, dilation_w);
  129. pd.set(12, dilation_h);
  130. pd.set(3, stride_w);
  131. pd.set(13, stride_h);
  132. pd.set(4, 0); // pad_w
  133. pd.set(14, 0); // pad_h
  134. pd.set(18, output_pad_right);
  135. pd.set(19, output_pad_bottom);
  136. pd.set(5, bias_term);
  137. pd.set(6, maxk * channels_g * num_output_g); // weight_data_size
  138. pd.set(9, activation_type);
  139. pd.set(10, activation_params);
  140. op->load_param(pd);
  141. // set weights
  142. if (bias_term)
  143. {
  144. ncnn::Mat weights[2];
  145. weights[0] = weight_data_g;
  146. weights[1] = bias_data_g;
  147. op->load_model(ModelBinFromMatArray(weights));
  148. }
  149. else
  150. {
  151. ncnn::Mat weights[1];
  152. weights[0] = weight_data_g;
  153. op->load_model(ModelBinFromMatArray(weights));
  154. }
  155. op->create_pipeline(opt);
  156. group_ops[g] = op;
  157. }
  158. }
  159. if (opt.lightmode)
  160. weight_data.release();
  161. return 0;
  162. }
  163. int DeconvolutionDepthWise_arm::destroy_pipeline(const Option& opt)
  164. {
  165. for (int i = 0; i < (int)group_ops.size(); i++)
  166. {
  167. group_ops[i]->destroy_pipeline(opt);
  168. delete group_ops[i];
  169. }
  170. group_ops.clear();
  171. return 0;
  172. }
  173. int DeconvolutionDepthWise_arm::forward(const Mat& bottom_blob, Mat& top_blob, const Option& opt) const
  174. {
  175. int elembits = bottom_blob.elembits();
  176. #if NCNN_ARM82
  177. if (support_fp16_storage && opt.use_fp16_storage && elembits == 16)
  178. {
  179. if (opt.use_fp16_arithmetic)
  180. return forward_fp16sa(bottom_blob, top_blob, opt);
  181. else
  182. return forward_fp16s(bottom_blob, top_blob, opt);
  183. }
  184. #endif
  185. #if NCNN_BF16
  186. if (opt.use_bf16_storage && elembits == 16)
  187. return forward_bf16s(bottom_blob, top_blob, opt);
  188. #endif
  189. // convolv with NxN kernel
  190. // value = value + bias
  191. int w = bottom_blob.w;
  192. int h = bottom_blob.h;
  193. int channels = bottom_blob.c;
  194. size_t elemsize = bottom_blob.elemsize;
  195. int elempack = bottom_blob.elempack;
  196. const int kernel_extent_w = dilation_w * (kernel_w - 1) + 1;
  197. const int kernel_extent_h = dilation_h * (kernel_h - 1) + 1;
  198. int outw = (w - 1) * stride_w + kernel_extent_w + output_pad_right;
  199. int outh = (h - 1) * stride_h + kernel_extent_h + output_pad_bottom;
  200. int out_elempack = 1;
  201. #if __ARM_NEON
  202. if (opt.use_packing_layout)
  203. {
  204. out_elempack = num_output % 4 == 0 ? 4 : 1;
  205. }
  206. #endif
  207. size_t out_elemsize = elemsize / elempack * out_elempack;
  208. Mat top_blob_bordered;
  209. if (pad_left > 0 || pad_right > 0 || pad_top > 0 || pad_bottom > 0 || (output_w > 0 && output_h > 0))
  210. {
  211. top_blob_bordered.create(outw, outh, num_output / out_elempack, out_elemsize, out_elempack, opt.workspace_allocator);
  212. }
  213. else
  214. {
  215. top_blob_bordered = top_blob;
  216. top_blob_bordered.create(outw, outh, num_output / out_elempack, out_elemsize, out_elempack, opt.blob_allocator);
  217. }
  218. if (top_blob_bordered.empty())
  219. return -100;
  220. const int maxk = kernel_w * kernel_h;
  221. // depth-wise
  222. if (channels * elempack == group && group == num_output)
  223. {
  224. #if __ARM_NEON
  225. if (elempack == 4)
  226. {
  227. #pragma omp parallel for num_threads(opt.num_threads)
  228. for (int g = 0; g < channels; g++)
  229. {
  230. float* outptr = top_blob_bordered.channel(g);
  231. const float* kptr = (const float*)weight_data_tm + maxk * g * 4;
  232. const Mat m = bottom_blob.channel(g);
  233. for (int i = 0; i < outh; i++)
  234. {
  235. for (int j = 0; j < outw; j++)
  236. {
  237. float32x4_t _sum = vdupq_n_f32(0.f);
  238. if (bias_term)
  239. {
  240. _sum = vld1q_f32((const float*)bias_data + g * 4);
  241. }
  242. for (int y = 0; y < kernel_h; y++)
  243. {
  244. int sys = (i + y * dilation_h - (kernel_extent_h - 1));
  245. if (sys < 0 || sys % stride_h != 0)
  246. continue;
  247. int sy = sys / stride_h;
  248. if (sy >= h)
  249. continue;
  250. for (int x = 0; x < kernel_w; x++)
  251. {
  252. int sxs = (j + x * dilation_w - (kernel_extent_w - 1));
  253. if (sxs < 0 || sxs % stride_w != 0)
  254. continue;
  255. int sx = sxs / stride_w;
  256. if (sx >= w)
  257. continue;
  258. const float* sptr = m.row(sy) + sx * 4;
  259. float32x4_t _val = vld1q_f32(sptr);
  260. int k = y * kernel_w + x;
  261. float32x4_t _w = vld1q_f32(kptr + k * 4);
  262. _sum = vmlaq_f32(_sum, _val, _w);
  263. }
  264. }
  265. _sum = activation_ps(_sum, activation_type, activation_params);
  266. vst1q_f32(outptr + j * 4, _sum);
  267. }
  268. outptr += outw * 4;
  269. }
  270. }
  271. }
  272. #endif // __ARM_NEON
  273. if (elempack == 1)
  274. {
  275. #pragma omp parallel for num_threads(opt.num_threads)
  276. for (int g = 0; g < channels; g++)
  277. {
  278. float* outptr = top_blob_bordered.channel(g);
  279. const float* kptr = (const float*)weight_data_tm + maxk * g;
  280. const Mat m = bottom_blob.channel(g);
  281. for (int i = 0; i < outh; i++)
  282. {
  283. for (int j = 0; j < outw; j++)
  284. {
  285. float sum = 0.f;
  286. if (bias_term)
  287. {
  288. sum = bias_data[g];
  289. }
  290. for (int y = 0; y < kernel_h; y++)
  291. {
  292. int sys = (i + y * dilation_h - (kernel_extent_h - 1));
  293. if (sys < 0 || sys % stride_h != 0)
  294. continue;
  295. int sy = sys / stride_h;
  296. if (sy >= h)
  297. continue;
  298. const float* sptr = m.row(sy);
  299. for (int x = 0; x < kernel_w; x++)
  300. {
  301. int sxs = (j + x * dilation_w - (kernel_extent_w - 1));
  302. if (sxs < 0 || sxs % stride_w != 0)
  303. continue;
  304. int sx = sxs / stride_w;
  305. if (sx >= w)
  306. continue;
  307. float val = sptr[sx];
  308. int k = y * kernel_w + x;
  309. float w = kptr[k];
  310. sum += val * w;
  311. }
  312. }
  313. sum = activation_ss(sum, activation_type, activation_params);
  314. outptr[j] = sum;
  315. }
  316. outptr += outw;
  317. }
  318. }
  319. }
  320. }
  321. else
  322. {
  323. // group deconvolution
  324. const int channels_g = channels * elempack / group;
  325. const int num_output_g = num_output / group;
  326. int g_elempack = 1;
  327. int out_g_elempack = 1;
  328. #if __ARM_NEON
  329. if (opt.use_packing_layout)
  330. {
  331. g_elempack = channels_g % 4 == 0 ? 4 : 1;
  332. out_g_elempack = num_output_g % 4 == 0 ? 4 : 1;
  333. }
  334. #endif
  335. // unpacking
  336. Mat bottom_blob_unpacked = bottom_blob;
  337. if (elempack == 4 && g_elempack == 1)
  338. {
  339. Option opt_p = opt;
  340. opt_p.blob_allocator = opt.workspace_allocator;
  341. convert_packing(bottom_blob, bottom_blob_unpacked, 1, opt_p);
  342. if (bottom_blob_unpacked.empty())
  343. return -100;
  344. }
  345. Mat top_blob_bordered_unpacked = top_blob_bordered;
  346. if (out_g_elempack == 1 && out_elempack == 4)
  347. {
  348. top_blob_bordered_unpacked.create(outw, outh, num_output, out_elemsize / out_elempack, 1, opt.workspace_allocator);
  349. if (top_blob_bordered_unpacked.empty())
  350. return -100;
  351. }
  352. for (int g = 0; g < group; g++)
  353. {
  354. const Mat bottom_blob_g = bottom_blob_unpacked.channel_range(channels_g * g / g_elempack, channels_g / g_elempack);
  355. Mat top_blob_bordered_g = top_blob_bordered_unpacked.channel_range(num_output_g * g / out_g_elempack, num_output_g / out_g_elempack);
  356. const ncnn::Layer* op = group_ops[g];
  357. Option opt_g = opt;
  358. opt_g.blob_allocator = top_blob_bordered_unpacked.allocator;
  359. // forward
  360. int ret = op->forward(bottom_blob_g, top_blob_bordered_g, opt_g);
  361. if (ret != 0)
  362. return ret;
  363. }
  364. // packing
  365. if (out_g_elempack == 1 && out_elempack == 4)
  366. {
  367. convert_packing(top_blob_bordered_unpacked, top_blob_bordered, 4, opt);
  368. if (top_blob_bordered.empty())
  369. return -100;
  370. }
  371. else
  372. {
  373. top_blob_bordered = top_blob_bordered_unpacked;
  374. }
  375. }
  376. cut_padding(top_blob_bordered, top_blob, opt);
  377. if (top_blob.empty())
  378. return -100;
  379. return 0;
  380. }
  381. int DeconvolutionDepthWise_arm::forward(const std::vector<Mat>& bottom_blobs, std::vector<Mat>& top_blobs, const Option& opt) const
  382. {
  383. const Mat& bottom_blob = bottom_blobs[0];
  384. const Mat& _weight_data = bottom_blobs[1];
  385. Mat& top_blob = top_blobs[0];
  386. const int _num_input = bottom_blob.c * bottom_blob.elempack;
  387. const int _kernel_w = _weight_data.w;
  388. const int _kernel_h = _weight_data.h;
  389. const int _num_output = _weight_data.d * group;
  390. Mat weight_data_flattened;
  391. flatten(_weight_data, weight_data_flattened, opt);
  392. if (weight_data_flattened.empty())
  393. return -100;
  394. #if NCNN_ARM82
  395. if (opt.use_fp16_storage && cpu_support_arm_asimdhp() && weight_data_flattened.elembits() == 16)
  396. {
  397. Mat weight_data_flattened_fp32;
  398. cast_float16_to_float32(weight_data_flattened, weight_data_flattened_fp32, opt);
  399. weight_data_flattened = weight_data_flattened_fp32;
  400. }
  401. #endif // NCNN_ARM82
  402. #if NCNN_BF16
  403. if (opt.use_bf16_storage && weight_data_flattened.elembits() == 16)
  404. {
  405. Mat weight_data_flattened_fp32;
  406. cast_bfloat16_to_float32(weight_data_flattened, weight_data_flattened_fp32, opt);
  407. weight_data_flattened = weight_data_flattened_fp32;
  408. }
  409. #endif // NCNN_BF16
  410. // weight_data_flattened as pack1
  411. weight_data_flattened.w *= weight_data_flattened.elempack;
  412. weight_data_flattened.elemsize /= weight_data_flattened.elempack;
  413. weight_data_flattened.elempack = 1;
  414. // transpose group-inch/group-outch/group-kh-kw to group-outch/group-inch/group-kh-kw
  415. Mat weight_data_transposed;
  416. {
  417. weight_data_transposed.create(_kernel_w * _kernel_h * _num_output * _num_input / group, 4u, opt.workspace_allocator);
  418. if (weight_data_transposed.empty())
  419. return -100;
  420. const int outch_g = _num_output / group;
  421. const int inch_g = _num_input / group;
  422. const int maxk = _kernel_h * _kernel_w;
  423. for (int g = 0; g < group; g++)
  424. {
  425. // reorder weight from inch-outch to outch-inch
  426. float* wg2 = (float*)weight_data_transposed + g * outch_g * inch_g * maxk;
  427. const float* wg = (const float*)weight_data_flattened + g * inch_g * outch_g * maxk;
  428. for (int i = 0; i < outch_g; i++)
  429. {
  430. for (int j = 0; j < inch_g; j++)
  431. {
  432. for (int k = 0; k < maxk; k++)
  433. {
  434. wg2[(i * inch_g + j) * maxk + k] = wg[(j * outch_g + i) * maxk + k];
  435. }
  436. }
  437. }
  438. }
  439. }
  440. Mat bias_data_flattened;
  441. if (bias_term)
  442. {
  443. const Mat& _bias_data = bottom_blobs[2];
  444. flatten(_bias_data, bias_data_flattened, opt);
  445. if (bias_data_flattened.empty())
  446. return -100;
  447. #if NCNN_ARM82
  448. if (opt.use_fp16_storage && cpu_support_arm_asimdhp() && bias_data_flattened.elembits() == 16)
  449. {
  450. Mat bias_data_flattened_fp32;
  451. cast_float16_to_float32(bias_data_flattened, bias_data_flattened_fp32, opt);
  452. bias_data_flattened = bias_data_flattened_fp32;
  453. }
  454. #endif // NCNN_ARM82
  455. #if NCNN_BF16
  456. if (opt.use_bf16_storage && bias_data_flattened.elembits() == 16)
  457. {
  458. Mat bias_data_flattened_fp32;
  459. cast_bfloat16_to_float32(bias_data_flattened, bias_data_flattened_fp32, opt);
  460. bias_data_flattened = bias_data_flattened_fp32;
  461. }
  462. #endif // NCNN_BF16
  463. // bias_data_flattened as pack1
  464. bias_data_flattened.w *= bias_data_flattened.elempack;
  465. bias_data_flattened.elemsize /= bias_data_flattened.elempack;
  466. bias_data_flattened.elempack = 1;
  467. }
  468. ncnn::Layer* op = ncnn::create_layer_cpu(ncnn::LayerType::DeconvolutionDepthWise);
  469. ncnn::ParamDict pd;
  470. pd.set(0, _num_output);
  471. pd.set(1, _kernel_w);
  472. pd.set(11, _kernel_h);
  473. pd.set(2, dilation_w);
  474. pd.set(12, dilation_h);
  475. pd.set(3, stride_w);
  476. pd.set(13, stride_h);
  477. pd.set(4, pad_left);
  478. pd.set(15, pad_right);
  479. pd.set(14, pad_top);
  480. pd.set(16, pad_bottom);
  481. pd.set(18, output_pad_right);
  482. pd.set(19, output_pad_bottom);
  483. pd.set(20, output_w);
  484. pd.set(21, output_h);
  485. pd.set(5, bias_term);
  486. pd.set(6, weight_data_transposed.w);
  487. pd.set(7, group);
  488. pd.set(9, activation_type);
  489. pd.set(10, activation_params);
  490. op->load_param(pd);
  491. ncnn::Mat weights[2];
  492. weights[0] = weight_data_transposed;
  493. weights[1] = bias_data_flattened;
  494. op->load_model(ncnn::ModelBinFromMatArray(weights));
  495. op->create_pipeline(opt);
  496. op->forward(bottom_blob, top_blob, opt);
  497. op->destroy_pipeline(opt);
  498. delete op;
  499. return 0;
  500. }
  501. #if NCNN_BF16
  502. int DeconvolutionDepthWise_arm::forward_bf16s(const Mat& bottom_blob, Mat& top_blob, const Option& opt) const
  503. {
  504. int w = bottom_blob.w;
  505. int h = bottom_blob.h;
  506. int channels = bottom_blob.c;
  507. size_t elemsize = bottom_blob.elemsize;
  508. int elempack = bottom_blob.elempack;
  509. const int kernel_extent_w = dilation_w * (kernel_w - 1) + 1;
  510. const int kernel_extent_h = dilation_h * (kernel_h - 1) + 1;
  511. int outw = (w - 1) * stride_w + kernel_extent_w + output_pad_right;
  512. int outh = (h - 1) * stride_h + kernel_extent_h + output_pad_bottom;
  513. int out_elempack = 1;
  514. #if __ARM_NEON
  515. if (opt.use_packing_layout)
  516. {
  517. out_elempack = num_output % 4 == 0 ? 4 : 1;
  518. }
  519. #endif
  520. size_t out_elemsize = elemsize / elempack * out_elempack;
  521. Mat top_blob_bordered;
  522. if (pad_left > 0 || pad_right > 0 || pad_top > 0 || pad_bottom > 0 || (output_w > 0 && output_h > 0))
  523. {
  524. top_blob_bordered.create(outw, outh, num_output / out_elempack, out_elemsize, out_elempack, opt.workspace_allocator);
  525. }
  526. else
  527. {
  528. top_blob_bordered = top_blob;
  529. top_blob_bordered.create(outw, outh, num_output / out_elempack, out_elemsize, out_elempack, opt.blob_allocator);
  530. }
  531. if (top_blob_bordered.empty())
  532. return -100;
  533. const int maxk = kernel_w * kernel_h;
  534. // depth-wise
  535. if (channels * elempack == group && group == num_output)
  536. {
  537. #if __ARM_NEON
  538. if (elempack == 4)
  539. {
  540. #pragma omp parallel for num_threads(opt.num_threads)
  541. for (int g = 0; g < channels; g++)
  542. {
  543. unsigned short* outptr = top_blob_bordered.channel(g);
  544. const unsigned short* kptr = (const unsigned short*)weight_data_tm + maxk * g * 4;
  545. const Mat m = bottom_blob.channel(g);
  546. for (int i = 0; i < outh; i++)
  547. {
  548. for (int j = 0; j < outw; j++)
  549. {
  550. float32x4_t _sum = vdupq_n_f32(0.f);
  551. if (bias_term)
  552. {
  553. _sum = vld1q_f32((const float*)bias_data + g * 4);
  554. }
  555. for (int y = 0; y < kernel_h; y++)
  556. {
  557. int sys = (i + y * dilation_h - (kernel_extent_h - 1));
  558. if (sys < 0 || sys % stride_h != 0)
  559. continue;
  560. int sy = sys / stride_h;
  561. if (sy >= h)
  562. continue;
  563. for (int x = 0; x < kernel_w; x++)
  564. {
  565. int sxs = (j + x * dilation_w - (kernel_extent_w - 1));
  566. if (sxs < 0 || sxs % stride_w != 0)
  567. continue;
  568. int sx = sxs / stride_w;
  569. if (sx >= w)
  570. continue;
  571. const unsigned short* sptr = m.row<const unsigned short>(sy) + sx * 4;
  572. float32x4_t _val = bfloat2float(vld1_u16(sptr));
  573. int k = y * kernel_w + x;
  574. float32x4_t _w = bfloat2float(vld1_u16(kptr + k * 4));
  575. _sum = vmlaq_f32(_sum, _val, _w);
  576. }
  577. }
  578. _sum = activation_ps(_sum, activation_type, activation_params);
  579. vst1_u16(outptr + j * 4, float2bfloat(_sum));
  580. }
  581. outptr += outw * 4;
  582. }
  583. }
  584. }
  585. #endif // __ARM_NEON
  586. if (elempack == 1)
  587. {
  588. #pragma omp parallel for num_threads(opt.num_threads)
  589. for (int g = 0; g < channels; g++)
  590. {
  591. unsigned short* outptr = top_blob_bordered.channel(g);
  592. const unsigned short* kptr = (const unsigned short*)weight_data_tm + maxk * g;
  593. const Mat m = bottom_blob.channel(g);
  594. for (int i = 0; i < outh; i++)
  595. {
  596. for (int j = 0; j < outw; j++)
  597. {
  598. float sum = 0.f;
  599. if (bias_term)
  600. {
  601. sum = bias_data[g];
  602. }
  603. for (int y = 0; y < kernel_h; y++)
  604. {
  605. int sys = (i + y * dilation_h - (kernel_extent_h - 1));
  606. if (sys < 0 || sys % stride_h != 0)
  607. continue;
  608. int sy = sys / stride_h;
  609. if (sy >= h)
  610. continue;
  611. const unsigned short* sptr = m.row<const unsigned short>(sy);
  612. for (int x = 0; x < kernel_w; x++)
  613. {
  614. int sxs = (j + x * dilation_w - (kernel_extent_w - 1));
  615. if (sxs < 0 || sxs % stride_w != 0)
  616. continue;
  617. int sx = sxs / stride_w;
  618. if (sx >= w)
  619. continue;
  620. float val = bfloat16_to_float32(sptr[sx]);
  621. int k = y * kernel_w + x;
  622. float w = bfloat16_to_float32(kptr[k]);
  623. sum += val * w;
  624. }
  625. }
  626. sum = activation_ss(sum, activation_type, activation_params);
  627. outptr[j] = float32_to_bfloat16(sum);
  628. }
  629. outptr += outw;
  630. }
  631. }
  632. }
  633. }
  634. else
  635. {
  636. // group deconvolution
  637. const int channels_g = channels * elempack / group;
  638. const int num_output_g = num_output / group;
  639. int g_elempack = 1;
  640. int out_g_elempack = 1;
  641. #if __ARM_NEON
  642. if (opt.use_packing_layout)
  643. {
  644. g_elempack = channels_g % 4 == 0 ? 4 : 1;
  645. out_g_elempack = num_output_g % 4 == 0 ? 4 : 1;
  646. }
  647. #endif
  648. // unpacking
  649. Mat bottom_blob_unpacked = bottom_blob;
  650. if (elempack == 4 && g_elempack == 1)
  651. {
  652. Option opt_p = opt;
  653. opt_p.blob_allocator = opt.workspace_allocator;
  654. convert_packing(bottom_blob, bottom_blob_unpacked, 1, opt_p);
  655. if (bottom_blob_unpacked.empty())
  656. return -100;
  657. }
  658. Mat top_blob_bordered_unpacked = top_blob_bordered;
  659. if (out_g_elempack == 1 && out_elempack == 4)
  660. {
  661. top_blob_bordered_unpacked.create(outw, outh, num_output, out_elemsize / out_elempack, 1, opt.workspace_allocator);
  662. if (top_blob_bordered_unpacked.empty())
  663. return -100;
  664. }
  665. for (int g = 0; g < group; g++)
  666. {
  667. const Mat bottom_blob_g = bottom_blob_unpacked.channel_range(channels_g * g / g_elempack, channels_g / g_elempack);
  668. Mat top_blob_bordered_g = top_blob_bordered_unpacked.channel_range(num_output_g * g / out_g_elempack, num_output_g / out_g_elempack);
  669. const ncnn::Layer* op = group_ops[g];
  670. Option opt_g = opt;
  671. opt_g.blob_allocator = top_blob_bordered_unpacked.allocator;
  672. // forward
  673. int ret = op->forward(bottom_blob_g, top_blob_bordered_g, opt_g);
  674. if (ret != 0)
  675. return ret;
  676. }
  677. // packing
  678. if (out_g_elempack == 1 && out_elempack == 4)
  679. {
  680. convert_packing(top_blob_bordered_unpacked, top_blob_bordered, 4, opt);
  681. if (top_blob_bordered.empty())
  682. return -100;
  683. }
  684. else
  685. {
  686. top_blob_bordered = top_blob_bordered_unpacked;
  687. }
  688. }
  689. cut_padding(top_blob_bordered, top_blob, opt);
  690. if (top_blob.empty())
  691. return -100;
  692. return 0;
  693. }
  694. #endif // NCNN_BF16
  695. } // namespace ncnn