OpenBLAS

78 MB

Tree: fd99b3e057

Author	SHA1	Message	Date
Arjan van de Ven	99c7bba8e4	Initial support for SkylakeX / AVX512 This patch adds the basic infrastructure for adding the SkylakeX (Intel Skylake server) target. The SkylakeX target will use the AVX512 (AVX512VL level) instruction set, which brings 2 basic things: 1) 512 bit wide SIMD (2x width of AVX2) 2) 32 SIMD registers (2x the number on AVX2) This initial patch only contains a trivial transofrmation of the Haswell SGEMM kernel to AVX512VL; more will follow later but this patch aims to get the infrastructure in place for this "later". Full performance tuning has not been done yet; with more registers and wider SIMD it's in theory possible to retune the kernels but even without that there's an interesting enough performance increase (30-40% range) with just this change.	8 years ago
Andrew	281a2b952f	warning cleanup (#1380 ) * dead increments in driver/level2 * dead increments in kernel/generic * part dead increments in kernel/x86_64	8 years ago
Martin Kroeker	5f402b7759	Remove unused (loop?) variable j from the gemv_n_4 implementations	8 years ago
Denis Steckelmacher	c9ff735da6	Add ZEN support (tested for auto-detected static backend)	9 years ago
Werner Saar	298b13bba4	updated some kernel files for EXCAVATOR	10 years ago
Werner Saar	faa5e2e5e3	FIX: forgot the add the files cgemv_n_4.c and cgemv_t_4.c	10 years ago
wernsaar	ac8f232b2a	more optimizations	11 years ago
wernsaar	f98e1244c4	optimized cgemv_n_4.c	11 years ago
wernsaar	4aa534ae93	added cgemv_n kernel, optimized for small sizes	11 years ago

9 Commits (fd99b3e0571e2d41f7d4fa5f1ba06d0527d6a708)