add TARGET support for HiSilicon tsv110 CPUs

Make TARGET=GENERIC compatible with DYNAMIC_ARCH=1

for issue #2048

Fix bug #2047.

Signed-off-by: Celelibi <celelibi@gmail.com>

add HiSilicon tsv110 CPUs  optimization branch

Fix inline assembly constraints in Bulldozer TRSM kernels

Fix inline assembly constraints in various x86_64 GEMVN kernels

rework indices to allow marking i,as and bs as both input and output (marked operand n1 as well for simplicity). For #2009

rework indices to allow marking argument lda as input and output.

rework indices to allow marking argument lda4 as input and output. For #2009

Fix wrong constraints in inline assembly of Haswell DTRSM kernel

for #2009

Fix unannounced modification of input operand 8 (lda4) in Haswell GEMVN microkernel

Fixes miscompilation with gcc9 -ftree-vectorize (related to issue #2009)

This fixes a crash in dblat2 when OpenBLAS is compiled using
-march=znver1 -ftree-vectorize -O2

See also:
https://github.com/easybuilders/easybuild-easyconfigs/issues/7180

Fix invalid memory access in PPC gemm_beta

Fixes #2011 (as suggested by davemq), assuming typo by K.Goto

Fixes #2011 (as suggested by davemq) presuming typo by K.Goto

[ZARCH] Many improvements

Argument 0 is modified so should be input and output

Arguments 0 and 1 are both input and output

Argument 0 is modified as it doubles as a counter

Arguments 0 and 1 need to be tagged as both input and output

NBMAX=4096 for gemvn, added sgemvn 8x8 for future

sgemv cgemv pairs