* Add initial support for Fujitsu A64FX as generic ARMV8

Refs. numpy/numpy#18422

Signed-off-by: Gilles Gouaillardet <gilles@rist.or.jp>

There appears to have been some code leak when copying from the COPY2x8
macro above where we're reading 8 bytes into d4-d7 directly after
reading 4 bytes into s4-s7. These 32 bytes in d4-7 are unused and can
possibly overrun the boundary of allocated memory -- Valgrind detected
this which is what dragged my attention to it for a 128,1 copy.

Additionally, there is no need to update the addresses stored in A0-A7
as the only possible paths after running this macro will overwrite A0-7
if looping to the next 8 rows, or overwrite A0-3 if moving to 4 rows --
in which case A4-7 are unused.

Fix double precision nrm2 kernels returning NaN when the
input vectors contain Inf/-Inf.

Optimize the performance of dot by using universal intrinsics in X86/ARM

Signed-off-by: ZhangDanfeng <467688405@qq.com>

Signed-off-by: ZhangDanfeng <467688405@qq.com>

Signed-off-by: ZhangDanfeng <467688405@qq.com>

Signed-off-by: zhangdanfeng <zhangdanfeng@cloudwalk.cn>

Signed-off-by: zhangdanfeng <zhangdanfeng@cloudwalk.cn>

Improve performance of DAXPY for ThunderX2
when the vector fits in L1 Cache.

use immediate initialization instead of multiplication in case register content is a NaN

The implementation is a hybird of the ARMV8 one with some of the
improved TX2 rountines along with specifying -march=v8.2-a

kernel/arm64/dgemm_beta.S: add beta == zero branch

added beta == zero branch, and no need to load C matrix.

Signed by: Xuqiang Chen <chenxuqiang3@hisilicon.com>

Use arm neon instructions to optimize sgemm_beta operation

[WIP] Use arm neon instructions to optimize tcopy operation

modified:   KERNEL.ARMV8
	modified:   KERNEL.TSV110
	new file:   sgemm_ncopy_4.S