Shivraj Patil
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2c3dfe2bf3
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MIPS P5600(32 bit) and I6400(64 bit) cores support added.
Seperated mips and mips64 files.
Configurations support for mips 32 bit.
Signed-off-by: Shivraj Patil <shivraj.patil@imgtec.com>
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9 years ago |
Ashwin Sekhar T K
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f2f8a0fe8b
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Adding arm64 target CORTEXA57
Co-Authored-By: Ralph Campbell <ralph.campbell@broadcom.com>
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10 years ago |
Fábio Perez
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b8d64a856a
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Add POWER7/POWER8 as targets
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10 years ago |
Zhang Xianyi
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51ff17d46e
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Add AMD Excavator target.
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10 years ago |
Zhang Xianyi
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c674fa32be
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Add ARM targets.
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11 years ago |
Werner Saar
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4319769b79
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added target processor STEAMROLLER
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11 years ago |
Zhang Xianyi
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70d1ba09b2
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Update the doc for target list.
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11 years ago |
Eliot Eshelman
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9912dbbcf9
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Add HASWELL to TargetList.txt
The Intel "Haswell" architecture is missing from the list of build targets.
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11 years ago |
Explorer09
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309f90e563
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TargetList.txt: minor re-ordering
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13 years ago |
Zhang Xianyi
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bfaaa975e6
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Added BULLDOZER target. So far it uses barcelona kernels.
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13 years ago |
Zhang Xianyi
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d3b67d0bd8
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Refs #113. Fixed the typo BOBCATE -> BOBCAT
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13 years ago |
Zhang Xianyi
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d6cab3f37e
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Refs #113. Support AMD Bobcate using Barcelona kernel codes. Replace 3DNow! with MMX.
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13 years ago |
Xianyi Zhang
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19a48b82cf
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Init Sandybridge codes based on Nehalem.
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14 years ago |
Xianyi Zhang
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b8d93812f0
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Added docs for make TARGET=your_cpu_target.
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14 years ago |