for issue #2048

from patch provided by aarnez in #991

fixes #1743

This patch adds the basic infrastructure for adding the SkylakeX (Intel Skylake server)
target. The SkylakeX target will use the AVX512 (AVX512VL level) instruction set,
which brings 2 basic things:
1) 512 bit wide SIMD (2x width of AVX2)
2) 32 SIMD registers (2x the number on AVX2)

This initial patch only contains a trivial transofrmation of the Haswell SGEMM kernel
to AVX512VL; more will follow later but this patch aims to get the infrastructure
in place for this "later".

Full performance tuning has not been done yet; with more registers and wider SIMD
it's in theory possible to retune the kernels but even without that there's an
interesting enough performance increase (30-40% range) with just this change.

... as it was just a silly workaround for the issue seen in #1563, caused by #1419

Conflicts:
	CONTRIBUTORS.md

Signed-off-by: Kaustubh Raste <kaustubh.raste@imgtec.com>

Conflicts:
	driver/others/memory.c

The Ximatcopy functions create a copy of the input matrix
although they seem to work inplace. The new routines
XIMATCOPY_K_YY perform the operations inplace if the leading
dimension does not change.

Disable CBLAS and LAPACK.

Signed-off-by: Timothy Gu <timothygu99@gmail.com>