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1a6ea8ee6d
Travisppc
arm_soft_fp_abi
armv7
bulldozer
ck860v
cmake
develop
fix3126
gh-pages
haswell
integer_datatype
issue2419
issue3321
jenkins
loongson3a
loongson3b
master
optimized_for_deeplearning
piledriver
power8
release-0.2.21
release-0.3.0
revert-1233-cpuid-fix
revert-1239-cgroups
revert-1254-xbmv_range
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revert-1464-issue1461
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revert-1600-noyield
revert-1642-develop
revert-1798-cmake-avx512
revert-2051-issue2048
revert-2142-issue1912-2
revert-2272-thread-sqrt-of-negative
revert-2325-travisosx
revert-2566-azurewin
revert-3118-issue3018-2
revert-3518-elbrus
revert-4103-windows_perf
revert-4153-dgemv
revert-4628-CI-c910v-mips64-loongarch64
revert-4920-issue4917
revert-5180-openmp_use_cmake
revert-5251-issue5250
risc-v
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small_matrices
timeout-riscv-ci
utest-riscv
z13
zhbmv_smp
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1 Commits (1a6ea8ee6da22ed8f293df463b84e8ce27762c6f)
1 Commits (1a6ea8ee6da22ed8f293df463b84e8ce27762c6f)
| Author | SHA1 | Message | Date |
|---|---|---|---|
 Shivraj Patil
|
2c3dfe2bf3 |
MIPS P5600(32 bit) and I6400(64 bit) cores support added.
Seperated mips and mips64 files. Configurations support for mips 32 bit. Signed-off-by: Shivraj Patil <shivraj.patil@imgtec.com> |
10 years ago |