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Branch: develop
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5 Commits (develop)

Author SHA1 Message Date
  tingbo.liao 3c8df6358f Further rearranged the rotm kernel for the different architectures. 1 year ago
  Xianyi Zhang 265ab484c8 Change default RISC-V 64-bit corename to RISCV64_GENERIC 6 years ago
  Xianyi Zhang 44020a42a4 Fixed compile bug for RV64. 6 years ago
  Jerry Zhao 0ee395db35 Fixed TRMM and SYMM for RISCV 7 years ago
  Jerry Zhao c167a3d6f4 Added RISCV build 7 years ago