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Merge pull request #1074 from ashwinyes/develop_20170116_thunderx2t99_sgemm 

Add more THUNDERX2T99 Optimized APIs
tags/v0.2.20^2
Zhang Xianyi GitHub 9 years ago
parent
ab2033f2db ee6ea7e988
commit
ff41e13385
13 changed files with 3312 additions and 98 deletions
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  1. +16
    -0
      .gitignore
  2. +5
    -2
      benchmark/nrm2.c
  3. +4
    -0
      driver/others/parameter.c
  4. +24
    -1
      kernel/arm64/KERNEL.THUNDERX2T99
  5. +1
    -2
      kernel/arm64/KERNEL.VULCAN
  6. +228
    -0
      kernel/arm64/cnrm2_thunderx2t99.S
  7. +196
    -0
      kernel/arm64/daxpy_thunderx2t99.S
  8. +207
    -0
      kernel/arm64/ddot_thunderx2t99.S
  9. +258
    -0
      kernel/arm64/ddot_thunderx2t99.c
  10. +58
    -87
      kernel/arm64/dgemm_kernel_8x4_thunderx2t99.S
  11. +2081
    -0
      kernel/arm64/sgemm_kernel_16x4_thunderx2t99.S
  12. +228
    -0
      kernel/arm64/snrm2_thunderx2t99.S
  13. +6
    -6
      param.h

+ 16
- 0
.gitignore View File

@@ -15,6 +15,20 @@ lapack-netlib/make.inc
lapack-netlib/lapacke/include/lapacke_mangling.h
lapack-netlib/TESTING/testing_results.txt
lapack-netlib/INSTALL/test*
lapack-netlib/TESTING/xeigtstc
lapack-netlib/TESTING/xeigtstd
lapack-netlib/TESTING/xeigtsts
lapack-netlib/TESTING/xeigtstz
lapack-netlib/TESTING/xlintstc
lapack-netlib/TESTING/xlintstd
lapack-netlib/TESTING/xlintstds
lapack-netlib/TESTING/xlintstrfc
lapack-netlib/TESTING/xlintstrfd
lapack-netlib/TESTING/xlintstrfs
lapack-netlib/TESTING/xlintstrfz
lapack-netlib/TESTING/xlintsts
lapack-netlib/TESTING/xlintstz
lapack-netlib/TESTING/xlintstzc
*.so
*.so.*
*.a
@@ -70,3 +84,5 @@ test/zblat3
build
build.*
*.swp
benchmark/*.goto


+ 5
- 2
benchmark/nrm2.c View File

@@ -149,7 +149,7 @@ int main(int argc, char *argv[]){
srandom(getpid());
#endif

fprintf(stderr, " SIZE Time\n");
fprintf(stderr, " SIZE Flops\n");

for(m = from; m <= to; m += step)
{
@@ -180,7 +180,10 @@ int main(int argc, char *argv[]){

timeg /= loops;

fprintf(stderr, " %10.6f secs\n", timeg);
fprintf(stderr,
" %10.2f MFlops %10.6f sec\n",
COMPSIZE * COMPSIZE * 2. * (double)m / timeg * 1.e-6, timeg);


}



+ 4
- 0
driver/others/parameter.c View File

@@ -743,6 +743,10 @@ void blas_set_parameter(void)
dgemm_q = 128;
dgemm_r = 4096;

sgemm_p = 128;
sgemm_q = 352;
sgemm_r = 4096;

dgemm_prefetch_size_a = 3584;
dgemm_prefetch_size_b = 512;
dgemm_prefetch_size_c = 128;


+ 24
- 1
kernel/arm64/KERNEL.THUNDERX2T99 View File

@@ -1,2 +1,25 @@
include $(KERNELDIR)/KERNEL.VULCAN
include $(KERNELDIR)/KERNEL.CORTEXA57

SNRM2KERNEL = snrm2_thunderx2t99.S
CNRM2KERNEL = cnrm2_thunderx2t99.S

DAXPYKERNEL = daxpy_thunderx2t99.S

ifndef SMP
DDOTKERNEL = ddot_thunderx2t99.S
else
DDOTKERNEL = ddot_thunderx2t99.c
endif

ifeq ($(DGEMM_UNROLL_M)x$(DGEMM_UNROLL_N), 8x4)
DGEMMKERNEL = dgemm_kernel_8x4_thunderx2t99.S
else
DGEMMKERNEL = dgemm_kernel_$(DGEMM_UNROLL_M)x$(DGEMM_UNROLL_N).S
endif

ifeq ($(SGEMM_UNROLL_M)x$(SGEMM_UNROLL_N), 16x4)
SGEMMKERNEL = sgemm_kernel_16x4_thunderx2t99.S
else
SGEMMKERNEL = sgemm_kernel_$(SGEMM_UNROLL_M)x$(SGEMM_UNROLL_N).S
endif


+ 1
- 2
kernel/arm64/KERNEL.VULCAN View File

@@ -1,4 +1,3 @@
include $(KERNELDIR)/KERNEL.CORTEXA57
include $(KERNELDIR)/KERNEL.THUNDERX2T99

DGEMMKERNEL = dgemm_kernel_$(DGEMM_UNROLL_M)x$(DGEMM_UNROLL_N)_vulcan.S


+ 228
- 0
kernel/arm64/cnrm2_thunderx2t99.S View File

@@ -0,0 +1,228 @@
/*******************************************************************************
Copyright (c) 2017, The OpenBLAS Project
All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are
met:
1. Redistributions of source code must retain the above copyright
notice, this list of conditions and the following disclaimer.
2. Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in
the documentation and/or other materials provided with the
distribution.
3. Neither the name of the OpenBLAS project nor the names of
its contributors may be used to endorse or promote products
derived from this software without specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
ARE DISCLAIMED. IN NO EVENT SHALL THE OPENBLAS PROJECT OR CONTRIBUTORS BE
LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*******************************************************************************/

#define ASSEMBLER
#include "common.h"

#define N x0 /* vector length */
#define X x1 /* X vector address */
#define INC_X x2 /* X stride */
#define I x5 /* loop variable */

/*******************************************************************************
* Macro definitions
*******************************************************************************/

#define TMPF d16
#define SSQ s0
#define SSQD d0

/******************************************************************************/

.macro INIT
fmov SSQD, xzr
fmov d1, xzr
fmov d2, xzr
fmov d3, xzr
fmov d4, xzr
fmov d5, xzr
fmov d6, xzr
fmov d7, xzr
.endm

.macro KERNEL_F1
ldr TMPF, [X]
add X, X, #8
fcvtl v16.2d, v16.2s
fmla v0.2d, v16.2d, v16.2d
.endm

.macro KERNEL_F16
ldur q16, [X]
ldur q18, [X, #16]
ldur q20, [X, #32]
ldur q22, [X, #48]
ldur q24, [X, #64]
ldur q26, [X, #80]
ldur q28, [X, #96]
ldur q30, [X, #112]

add X, X, #128

fcvtl2 v17.2d, v16.4s
fcvtl v16.2d, v16.2s
fcvtl2 v19.2d, v18.4s
fcvtl v18.2d, v18.2s
fcvtl2 v21.2d, v20.4s
fcvtl v20.2d, v20.2s
fcvtl2 v23.2d, v22.4s
fcvtl v22.2d, v22.2s
fcvtl2 v25.2d, v24.4s
fcvtl v24.2d, v24.2s
fcvtl2 v27.2d, v26.4s
fcvtl v26.2d, v26.2s
fcvtl2 v29.2d, v28.4s
fcvtl v28.2d, v28.2s
fcvtl2 v31.2d, v30.4s
fcvtl v30.2d, v30.2s

fmla v0.2d, v16.2d, v16.2d
fmla v1.2d, v17.2d, v17.2d
fmla v2.2d, v18.2d, v18.2d
fmla v3.2d, v19.2d, v19.2d
fmla v4.2d, v20.2d, v20.2d
fmla v5.2d, v21.2d, v21.2d
fmla v6.2d, v22.2d, v22.2d
fmla v7.2d, v23.2d, v23.2d

fmla v0.2d, v24.2d, v24.2d
fmla v1.2d, v25.2d, v25.2d
fmla v2.2d, v26.2d, v26.2d
fmla v3.2d, v27.2d, v27.2d
fmla v4.2d, v28.2d, v28.2d
fmla v5.2d, v29.2d, v29.2d
fmla v6.2d, v30.2d, v30.2d
fmla v7.2d, v31.2d, v31.2d

prfm PLDL1KEEP, [X, #1024]
prfm PLDL1KEEP, [X, #1024+64]
.endm

.macro KERNEL_F16_FINALIZE
fadd v0.2d, v0.2d, v1.2d
fadd v2.2d, v2.2d, v3.2d
fadd v4.2d, v4.2d, v5.2d
fadd v6.2d, v6.2d, v7.2d

fadd v0.2d, v0.2d, v2.2d
fadd v4.2d, v4.2d, v6.2d

fadd v0.2d, v0.2d, v4.2d
.endm

.macro KERNEL_FINALIZE
faddp SSQD, v0.2d
.endm

.macro INIT_S
lsl INC_X, INC_X, #3
.endm

.macro KERNEL_S1
ldr TMPF, [X]
add X, X, INC_X
fcvtl v16.2d, v16.2s
fmla v0.2d, v16.2d, v16.2d
.endm

/*******************************************************************************
* End of macro definitions
*******************************************************************************/

PROLOGUE

INIT

cmp N, xzr
ble nrm2_kernel_zero
cmp INC_X, xzr
ble nrm2_kernel_zero
cmp INC_X, #1
bne nrm2_kernel_S_BEGIN

nrm2_kernel_F_BEGIN:

asr I, N, #4
cmp I, xzr
beq nrm2_kernel_S_BEGIN

.align 5
nrm2_kernel_F16:

KERNEL_F16

subs I, I, #1
bne nrm2_kernel_F16

KERNEL_F16_FINALIZE

nrm2_kernel_F1:

ands I, N, #15
ble nrm2_kernel_L999

nrm2_kernel_F10:

KERNEL_F1

subs I, I, #1
bne nrm2_kernel_F10

b nrm2_kernel_L999

nrm2_kernel_S_BEGIN:

INIT_S

asr I, N, #2
cmp I, xzr
ble nrm2_kernel_S1

nrm2_kernel_S4:

KERNEL_S1
KERNEL_S1
KERNEL_S1
KERNEL_S1

subs I, I, #1
bne nrm2_kernel_S4

nrm2_kernel_S1:

ands I, N, #3
ble nrm2_kernel_L999

nrm2_kernel_S10:

KERNEL_S1

subs I, I, #1
bne nrm2_kernel_S10

nrm2_kernel_L999:
KERNEL_FINALIZE
fsqrt SSQD, SSQD
fcvt SSQ, SSQD
ret

nrm2_kernel_zero:
fmov SSQ, wzr

ret

EPILOGUE

+ 196
- 0
kernel/arm64/daxpy_thunderx2t99.S View File

@@ -0,0 +1,196 @@
/*******************************************************************************
Copyright (c) 2017, The OpenBLAS Project
All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are
met:
1. Redistributions of source code must retain the above copyright
notice, this list of conditions and the following disclaimer.
2. Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in
the documentation and/or other materials provided with the
distribution.
3. Neither the name of the OpenBLAS project nor the names of
its contributors may be used to endorse or promote products
derived from this software without specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
ARE DISCLAIMED. IN NO EVENT SHALL THE OPENBLAS PROJECT OR CONTRIBUTORS BE
LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*******************************************************************************/

#define ASSEMBLER
#include "common.h"

#define N x0 /* vector length */
#define X x3 /* X vector address */
#define INC_X x4 /* X stride */
#define Y x5 /* Y vector address */
#define INC_Y x6 /* Y stride */
#define I x1 /* loop variable */

/*******************************************************************************
* Macro definitions
*******************************************************************************/

#define DA d0 /* scale input value */
#define TMPX d1
#define TMPVX {v1.d}[0]
#define TMPY d2
#define TMPVY {v2.d}[0]
#define SZ 8

/******************************************************************************/

.macro KERNEL_F1
ldr TMPX, [X], #SZ
ldr TMPY, [Y]
fmadd TMPY, TMPX, DA, TMPY
str TMPY, [Y], #SZ
.endm

.macro KERNEL_F16
ldp q4, q5, [X]
ldp q16, q17, [Y]

ldp q6, q7, [X, #32]
ldp q18, q19, [Y, #32]

fmla v16.2d, v4.2d, v0.d[0]
fmla v17.2d, v5.2d, v0.d[0]

PRFM PLDL1KEEP, [X, #896]
PRFM PLDL1KEEP, [Y, #896]

stp q16, q17, [Y]

ldp q20, q21, [X, #64]
ldp q24, q25, [Y, #64]

fmla v18.2d, v6.2d, v0.d[0]
fmla v19.2d, v7.2d, v0.d[0]

PRFM PLDL1KEEP, [X, #896+64]
PRFM PLDL1KEEP, [Y, #896+64]

stp q18, q19, [Y, #32]

ldp q22, q23, [X, #96]
ldp q26, q27, [Y, #96]

fmla v24.2d, v20.2d, v0.d[0]
fmla v25.2d, v21.2d, v0.d[0]

stp q24, q25, [Y, #64]

fmla v26.2d, v22.2d, v0.d[0]
fmla v27.2d, v23.2d, v0.d[0]

stp q26, q27, [Y, #96]

add Y, Y, #128
add X, X, #128
.endm

.macro KERNEL_F32
KERNEL_F16
KERNEL_F16
.endm

.macro INIT_S
lsl INC_X, INC_X, #3
lsl INC_Y, INC_Y, #3
.endm

.macro KERNEL_S1
ld1 TMPVX, [X], INC_X
ldr TMPY, [Y]
fmadd TMPY, TMPX, DA, TMPY
st1 TMPVY, [Y], INC_Y
.endm

/*******************************************************************************
* End of macro definitions
*******************************************************************************/

PROLOGUE

cmp N, xzr
ble axpy_kernel_L999

fcmp DA, #0.0
beq axpy_kernel_L999

cmp INC_X, #1
bne axpy_kernel_S_BEGIN
cmp INC_Y, #1
bne axpy_kernel_S_BEGIN

axpy_kernel_F_BEGIN:

asr I, N, #5
cmp I, xzr
beq axpy_kernel_F1

.align 5
axpy_kernel_F32:

KERNEL_F32

subs I, I, #1
bne axpy_kernel_F32

axpy_kernel_F1:

ands I, N, #31
ble axpy_kernel_L999

axpy_kernel_F10:

KERNEL_F1

subs I, I, #1
bne axpy_kernel_F10

b axpy_kernel_L999

axpy_kernel_S_BEGIN:

INIT_S

asr I, N, #2
cmp I, xzr
ble axpy_kernel_S1

axpy_kernel_S4:

KERNEL_S1
KERNEL_S1
KERNEL_S1
KERNEL_S1

subs I, I, #1
bne axpy_kernel_S4

axpy_kernel_S1:

ands I, N, #3
ble axpy_kernel_L999

axpy_kernel_S10:

KERNEL_S1

subs I, I, #1
bne axpy_kernel_S10

axpy_kernel_L999:

mov w0, wzr
ret

+ 207
- 0
kernel/arm64/ddot_thunderx2t99.S View File

@@ -0,0 +1,207 @@
/*******************************************************************************
Copyright (c) 2017, The OpenBLAS Project
All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are
met:
1. Redistributions of source code must retain the above copyright
notice, this list of conditions and the following disclaimer.
2. Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in
the documentation and/or other materials provided with the
distribution.
3. Neither the name of the OpenBLAS project nor the names of
its contributors may be used to endorse or promote products
derived from this software without specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
ARE DISCLAIMED. IN NO EVENT SHALL THE OPENBLAS PROJECT OR CONTRIBUTORS BE
LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*******************************************************************************/

#define ASSEMBLER
#include "common.h"

#define N x0 /* vector length */
#define X x1 /* X vector address */
#define INC_X x2 /* X stride */
#define Y x3 /* Y vector address */
#define INC_Y x4 /* Y stride */
#define I x5 /* loop variable */

/*******************************************************************************
* Macro definitions
*******************************************************************************/

#define REG0 xzr
#define DOTF d0
#define TMPX d16
#define LD1VX {v16.d}[0]
#define TMPY d24
#define LD1VY {v24.d}[0]
#define SZ 8

/******************************************************************************/

.macro KERNEL_F1
ldr TMPX, [X]
ldr TMPY, [Y]
add X, X, #SZ
add Y, Y, #SZ
fmadd DOTF, TMPX, TMPY, DOTF
.endm

.macro KERNEL_F16
ldp q16, q17, [X]
ldp q24, q25, [Y]

ldp q18, q19, [X, #32]
ldp q26, q27, [Y, #32]

fmla v0.2d, v16.2d, v24.2d
fmla v1.2d, v17.2d, v25.2d

ldp q20, q21, [X, #64]
ldp q28, q29, [Y, #64]

fmla v2.2d, v18.2d, v26.2d
fmla v3.2d, v19.2d, v27.2d

ldp q22, q23, [X, #96]
ldp q30, q31, [Y, #96]

add Y, Y, #128
add X, X, #128

fmla v4.2d, v20.2d, v28.2d
fmla v5.2d, v21.2d, v29.2d

PRFM PLDL1KEEP, [X, #896]
PRFM PLDL1KEEP, [Y, #896]
PRFM PLDL1KEEP, [X, #896+64]
PRFM PLDL1KEEP, [Y, #896+64]

fmla v6.2d, v22.2d, v30.2d
fmla v7.2d, v23.2d, v31.2d
.endm

.macro KERNEL_F32
KERNEL_F16
KERNEL_F16
.endm

.macro KERNEL_F32_FINALIZE
fadd v0.2d, v0.2d, v1.2d
fadd v2.2d, v2.2d, v3.2d
fadd v4.2d, v4.2d, v5.2d
fadd v6.2d, v6.2d, v7.2d
fadd v0.2d, v0.2d, v2.2d
fadd v4.2d, v4.2d, v6.2d
fadd v0.2d, v0.2d, v4.2d
faddp DOTF, v0.2d
.endm

.macro INIT_S
lsl INC_X, INC_X, #3
lsl INC_Y, INC_Y, #3
.endm

.macro KERNEL_S1
ld1 LD1VX, [X], INC_X
ld1 LD1VY, [Y], INC_Y
fmadd DOTF, TMPX, TMPY, DOTF
.endm

/*******************************************************************************
* End of macro definitions
*******************************************************************************/

PROLOGUE

fmov DOTF, REG0
fmov d1, REG0
fmov d2, REG0
fmov d3, REG0
fmov d4, REG0
fmov d5, REG0
fmov d6, REG0
fmov d7, REG0

cmp N, xzr
ble dot_kernel_L999

cmp INC_X, #1
bne dot_kernel_S_BEGIN
cmp INC_Y, #1
bne dot_kernel_S_BEGIN

dot_kernel_F_BEGIN:

asr I, N, #5
cmp I, xzr
beq dot_kernel_F1

dot_kernel_F32:

KERNEL_F32

subs I, I, #1
bne dot_kernel_F32

KERNEL_F32_FINALIZE

dot_kernel_F1:

ands I, N, #31
ble dot_kernel_L999

dot_kernel_F10:

KERNEL_F1

subs I, I, #1
bne dot_kernel_F10

ret

dot_kernel_S_BEGIN:

INIT_S

asr I, N, #2
cmp I, xzr
ble dot_kernel_S1

dot_kernel_S4:

KERNEL_S1
KERNEL_S1
KERNEL_S1
KERNEL_S1

subs I, I, #1
bne dot_kernel_S4

dot_kernel_S1:

ands I, N, #3
ble dot_kernel_L999

dot_kernel_S10:

KERNEL_S1

subs I, I, #1
bne dot_kernel_S10

dot_kernel_L999:

ret

EPILOGUE

+ 258
- 0
kernel/arm64/ddot_thunderx2t99.c View File

@@ -0,0 +1,258 @@
/***************************************************************************
Copyright (c) 2017, The OpenBLAS Project
All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are
met:
1. Redistributions of source code must retain the above copyright
notice, this list of conditions and the following disclaimer.
2. Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in
the documentation and/or other materials provided with the
distribution.
3. Neither the name of the OpenBLAS project nor the names of
its contributors may be used to endorse or promote products
derived from this software without specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
ARE DISCLAIMED. IN NO EVENT SHALL THE OPENBLAS PROJECT OR CONTRIBUTORS BE
LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*****************************************************************************/


#include "common.h"

#include <arm_neon.h>

#define N "x0" /* vector length */
#define X "x1" /* "X" vector address */
#define INC_X "x2" /* "X" stride */
#define Y "x3" /* "Y" vector address */
#define INC_Y "x4" /* "Y" stride */
#define J "x5" /* loop variable */

#define REG0 "xzr"
#define DOTF "d0"
#define TMPX "d16"
#define LD1VX "{v16.d}[0]"
#define TMPY "d24"
#define LD1VY "{v24.d}[0]"
#define SZ "8"

extern int blas_level1_thread_with_return_value(int mode, BLASLONG m, BLASLONG n,
BLASLONG k, void *alpha, void *a, BLASLONG lda, void *b, BLASLONG ldb,
void *c, BLASLONG ldc, int (*function)(), int nthreads);


static FLOAT ddot_compute(BLASLONG n, FLOAT *x, BLASLONG inc_x, FLOAT *y, BLASLONG inc_y)
{
FLOAT dot = 0.0 ;

if ( n < 0 ) return(dot);

__asm__ __volatile__ (
" mov "N", %[N_] \n"
" mov "X", %[X_] \n"
" mov "INC_X", %[INCX_] \n"
" mov "Y", %[Y_] \n"
" mov "INC_Y", %[INCY_] \n"
" fmov "DOTF", "REG0" \n"
" fmov d1, "REG0" \n"
" fmov d2, "REG0" \n"
" fmov d3, "REG0" \n"
" fmov d4, "REG0" \n"
" fmov d5, "REG0" \n"
" fmov d6, "REG0" \n"
" fmov d7, "REG0" \n"

" cmp "N", xzr \n"
" ble 9f //dot_kernel_L999 \n"

" cmp "INC_X", #1 \n"
" bne 5f //dot_kernel_S_BEGIN \n"
" cmp "INC_Y", #1 \n"
" bne 5f //dot_kernel_S_BEGIN \n"

"1: //dot_kernel_F_BEGIN \n"
" asr "J", "N", #5 \n"
" cmp "J", xzr \n"
" beq 3f //dot_kernel_F1 \n"

" .align 5 \n"
"2: //dot_kernel_F32 \n"
" ldp q16, q17, ["X"] \n"
" ldp q24, q25, ["Y"] \n"
" ldp q18, q19, ["X", #32] \n"
" ldp q26, q27, ["Y", #32] \n"
" fmla v0.2d, v16.2d, v24.2d \n"
" fmla v1.2d, v17.2d, v25.2d \n"
" ldp q20, q21, ["X", #64] \n"
" ldp q28, q29, ["Y", #64] \n"
" fmla v2.2d, v18.2d, v26.2d \n"
" fmla v3.2d, v19.2d, v27.2d \n"
" ldp q22, q23, ["X", #96] \n"
" ldp q30, q31, ["Y", #96] \n"
" add "Y", "Y", #128 \n"
" add "X", "X", #128 \n"
" fmla v4.2d, v20.2d, v28.2d \n"
" fmla v5.2d, v21.2d, v29.2d \n"
" PRFM PLDL1KEEP, ["X", #896] \n"
" PRFM PLDL1KEEP, ["Y", #896] \n"
" PRFM PLDL1KEEP, ["X", #896+64] \n"
" PRFM PLDL1KEEP, ["Y", #896+64] \n"
" fmla v6.2d, v22.2d, v30.2d \n"
" fmla v7.2d, v23.2d, v31.2d \n"

" ldp q16, q17, ["X"] \n"
" ldp q24, q25, ["Y"] \n"
" ldp q18, q19, ["X", #32] \n"
" ldp q26, q27, ["Y", #32] \n"
" fmla v0.2d, v16.2d, v24.2d \n"
" fmla v1.2d, v17.2d, v25.2d \n"
" ldp q20, q21, ["X", #64] \n"
" ldp q28, q29, ["Y", #64] \n"
" fmla v2.2d, v18.2d, v26.2d \n"
" fmla v3.2d, v19.2d, v27.2d \n"
" ldp q22, q23, ["X", #96] \n"
" ldp q30, q31, ["Y", #96] \n"
" add "Y", "Y", #128 \n"
" add "X", "X", #128 \n"
" fmla v4.2d, v20.2d, v28.2d \n"
" fmla v5.2d, v21.2d, v29.2d \n"
" PRFM PLDL1KEEP, ["X", #896] \n"
" PRFM PLDL1KEEP, ["Y", #896] \n"
" PRFM PLDL1KEEP, ["X", #896+64] \n"
" PRFM PLDL1KEEP, ["Y", #896+64] \n"
" fmla v6.2d, v22.2d, v30.2d \n"
" fmla v7.2d, v23.2d, v31.2d \n"

" subs "J", "J", #1 \n"
" bne 2b //dot_kernel_F32 \n"

" fadd v0.2d, v0.2d, v1.2d \n"
" fadd v2.2d, v2.2d, v3.2d \n"
" fadd v4.2d, v4.2d, v5.2d \n"
" fadd v6.2d, v6.2d, v7.2d \n"
" fadd v0.2d, v0.2d, v2.2d \n"
" fadd v4.2d, v4.2d, v6.2d \n"
" fadd v0.2d, v0.2d, v4.2d \n"
" faddp "DOTF", v0.2d \n"

"3: //dot_kernel_F1 \n"
" ands "J", "N", #31 \n"
" ble 9f //dot_kernel_L999 \n"

"4: //dot_kernel_F10 \n"
" ldr "TMPX", ["X"] \n"
" ldr "TMPY", ["Y"] \n"
" add "X", "X", #"SZ" \n"
" add "Y", "Y", #"SZ" \n"
" fmadd "DOTF", "TMPX", "TMPY", "DOTF" \n"

" subs "J", "J", #1 \n"
" bne 4b //dot_kernel_F10 \n"

" b 9f //dot_kernel_L999 \n"

"5: //dot_kernel_S_BEGIN \n"
" lsl "INC_X", "INC_X", #3 \n"
" lsl "INC_Y", "INC_Y", #3 \n"
" asr "J", "N", #2 \n"
" cmp "J", xzr \n"
" ble 7f //dot_kernel_S1 \n"

"6: //dot_kernel_S4: \n"
" ld1 "LD1VX", ["X"], "INC_X" \n"
" ld1 "LD1VY", ["Y"], "INC_Y" \n"
" fmadd "DOTF", "TMPX", "TMPY", "DOTF" \n"
" ld1 "LD1VX", ["X"], "INC_X" \n"
" ld1 "LD1VY", ["Y"], "INC_Y" \n"
" fmadd "DOTF", "TMPX", "TMPY", "DOTF" \n"
" ld1 "LD1VX", ["X"], "INC_X" \n"
" ld1 "LD1VY", ["Y"], "INC_Y" \n"
" fmadd "DOTF", "TMPX", "TMPY", "DOTF" \n"
" ld1 "LD1VX", ["X"], "INC_X" \n"
" ld1 "LD1VY", ["Y"], "INC_Y" \n"
" fmadd "DOTF", "TMPX", "TMPY", "DOTF" \n"
" subs "J", "J", #1 \n"
" bne 6b //dot_kernel_S4 \n"

"7: //dot_kernel_S1: \n"
" ands "J", "N", #3 \n"
" ble 9f //dot_kernel_L999 \n"

"8: //dot_kernel_S10 \n"
" ld1 "LD1VX", ["X"], "INC_X" \n"
" ld1 "LD1VY", ["Y"], "INC_Y" \n"
" fmadd "DOTF", "TMPX", "TMPY", "DOTF" \n"
" subs "J", "J", #1 \n"
" bne 8b //dot_kernel_S10 \n"

"9: //dot_kernel_L999 \n"
" fmov %[DOT_], "DOTF" \n"
: [DOT_] "=r" (dot) //%0
: [N_] "r" (n), //%1
[X_] "r" (x), //%2
[INCX_] "r" (inc_x), //%3
[Y_] "r" (y), //%4
[INCY_] "r" (inc_y) //%5
: "cc",
"memory",
"x0", "x1", "x2", "x3", "x4", "x5",
"d0", "d1", "d2", "d3", "d4", "d5", "d6", "d7"
);

return(dot);
}

static int ddot_thread_function(BLASLONG n, BLASLONG dummy0,
BLASLONG dummy1, FLOAT dummy2, FLOAT *x, BLASLONG inc_x, FLOAT *y,
BLASLONG inc_y, FLOAT *result, BLASLONG dummy3)
{
*result = ddot_compute(n, x, inc_x, y, inc_y);

return 0;
}

FLOAT CNAME(BLASLONG n, FLOAT *x, BLASLONG inc_x, FLOAT *y, BLASLONG inc_y)
{
int nthreads;
FLOAT dot = 0.0;
FLOAT dummy_alpha;

nthreads = num_cpu_avail(1);

if (inc_x == 0 || inc_y == 0)
nthreads = 1;

if (n <= 10000)
nthreads = 1;

if (nthreads == 1) {
dot = ddot_compute(n, x, inc_x, y, inc_y);
} else {
int mode, i;
char result[MAX_CPU_NUMBER * sizeof(double) * 2];
FLOAT *ptr;

mode = BLAS_DOUBLE | BLAS_REAL;

blas_level1_thread_with_return_value(mode, n, 0, 0, &dummy_alpha,
x, inc_x, y, inc_y, result, 0,
( void *)ddot_thread_function, nthreads);

ptr = (FLOAT *)result;
for (i = 0; i < nthreads; i++) {
dot = dot + (*ptr);
ptr = (FLOAT *)(((char *)ptr) + sizeof(double) * 2);
}
}

return dot;
}

kernel/arm64/dgemm_kernel_8x4_vulcan.S → kernel/arm64/dgemm_kernel_8x4_thunderx2t99.S View File

@@ -151,187 +151,164 @@ USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
.endm

.macro KERNEL8x4_I
ldur q0, [pA]
ldur q1, [pA, #16]

ldur q8, [pB]
ldur q9, [pB, #16]
ldp q0, q1, [pA]
ldp q8, q9, [pB]
ldp q2, q3, [pA, #32]
ldp q4, q5, [pA, #64]
ldp q12, q13, [pB, #32]
ldp q6, q7, [pA, #96]

fmul v16.2d, v0.2d, v8.d[0]
fmul v20.2d, v0.2d, v8.d[1]

fmul v17.2d, v1.2d, v8.d[0]
fmul v21.2d, v1.2d, v8.d[1]

ldp q2, q3, [pA, #32]
add pA, pA, #128
add pB, pB, #64

fmul v24.2d, v0.2d, v9.d[0]
ldp q4, q5, [pA, #64]
fmul v28.2d, v0.2d, v9.d[1]

fmul v25.2d, v1.2d, v9.d[0]
fmul v29.2d, v1.2d, v9.d[1]

ldur q12, [pB, #32]
ldur q13, [pB, #48]
prfm PLDL1KEEP, [pA, A_PRE_SIZE]
prfm PLDL1KEEP, [pA, A_PRE_SIZE_64]

fmul v18.2d, v2.2d, v8.d[0]
fmul v22.2d, v2.2d, v8.d[1]

ldur q6, [pA, #96]
ldur q7, [pA, #112]

add pB, pB, #64
add pA, pA, #128

fmul v26.2d, v2.2d, v9.d[0]
fmul v30.2d, v2.2d, v9.d[1]

fmul v19.2d, v3.2d, v8.d[0]
fmul v27.2d, v3.2d, v9.d[0]

prfm PLDL1KEEP, [pA, A_PRE_SIZE]

fmul v31.2d, v3.2d, v9.d[1]
fmul v23.2d, v3.2d, v8.d[1]

prfm PLDL1KEEP, [pA, A_PRE_SIZE_64]
.endm

.macro KERNEL8x4_M1_M2
fmla v16.2d, v0.2d, v8.d[0]
fmla v20.2d, v0.2d, v8.d[1]

ldp q12, q13, [pB]
ldp q4, q5, [pA]
ldp q6, q7, [pA, #32]

fmla v16.2d, v0.2d, v8.d[0]
fmla v20.2d, v0.2d, v8.d[1]
fmla v24.2d, v0.2d, v9.d[0]
fmla v28.2d, v0.2d, v9.d[1]

ldp q12, q13, [pB]
prfm PLDL1KEEP, [pA, A_PRE_SIZE]

fmla v17.2d, v1.2d, v8.d[0]
fmla v25.2d, v1.2d, v9.d[0]

prfm PLDL1KEEP, [pA, A_PRE_SIZE_64]

fmla v21.2d, v1.2d, v8.d[1]
fmla v29.2d, v1.2d, v9.d[1]

prfm PLDL1KEEP, [pA, A_PRE_SIZE_64]

fmla v18.2d, v2.2d, v8.d[0]
fmla v22.2d, v2.2d, v8.d[1]

prfm PLDL1KEEP, [pA, A_PRE_SIZE]

fmla v26.2d, v2.2d, v9.d[0]
fmla v30.2d, v2.2d, v9.d[1]
fmla v19.2d, v3.2d, v8.d[0]
fmla v23.2d, v3.2d, v8.d[1]

ldp q6, q7, [pA, #32]
prfm PLDL1KEEP, [pA, #3840]

fmla v19.2d, v3.2d, v8.d[0]
fmla v23.2d, v3.2d, v8.d[1]
fmla v27.2d, v3.2d, v9.d[0]
fmla v31.2d, v3.2d, v9.d[1]


ldp q8, q9, [pB, #32]
ldp q0, q1, [pA, #64]
ldp q2, q3, [pA, #96]

fmla v16.2d, v4.2d, v12.d[0]
fmla v20.2d, v4.2d, v12.d[1]
fmla v24.2d, v4.2d, v13.d[0]
fmla v28.2d, v4.2d, v13.d[1]

ldp q0, q1, [pA, #64]
prfm PLDL1KEEP, [pB, B_PRE_SIZE]

fmla v17.2d, v5.2d, v12.d[0]
fmla v25.2d, v5.2d, v13.d[0]

ldp q8, q9, [pB, #32]
ldp q2, q3, [pA, #96]

fmla v21.2d, v5.2d, v12.d[1]
fmla v29.2d, v5.2d, v13.d[1]

fmla v18.2d, v6.2d, v12.d[0]
fmla v22.2d, v6.2d, v12.d[1]

prfm PLDL1KEEP, [pB, B_PRE_SIZE]

fmla v26.2d, v6.2d, v13.d[0]
fmla v30.2d, v6.2d, v13.d[1]

fmla v19.2d, v7.2d, v12.d[0]
fmla v23.2d, v7.2d, v12.d[1]

add pB, pB, #64
add pA, pA, #128

fmla v19.2d, v7.2d, v12.d[0]
fmla v23.2d, v7.2d, v12.d[1]
fmla v27.2d, v7.2d, v13.d[0]
fmla v31.2d, v7.2d, v13.d[1]
.endm


.macro KERNEL8x4_M1
ldp q12, q13, [pB]
ldp q4, q5, [pA]
ldp q6, q7, [pA, #32]

fmla v16.2d, v0.2d, v8.d[0]
fmla v20.2d, v0.2d, v8.d[1]

ldp q4, q5, [pA], #32

fmla v24.2d, v0.2d, v9.d[0]
fmla v28.2d, v0.2d, v9.d[1]

ldp q12, q13, [pB]
add pB, pB, #32
prfm PLDL1KEEP, [pA, A_PRE_SIZE]

fmla v17.2d, v1.2d, v8.d[0]
fmla v25.2d, v1.2d, v9.d[0]

prfm PLDL1KEEP, [pA, A_PRE_SIZE_64]

fmla v21.2d, v1.2d, v8.d[1]
fmla v29.2d, v1.2d, v9.d[1]

prfm PLDL1KEEP, [pA, A_PRE_SIZE_64]

fmla v18.2d, v2.2d, v8.d[0]
fmla v22.2d, v2.2d, v8.d[1]

prfm PLDL1KEEP, [pA, A_PRE_SIZE]

fmla v26.2d, v2.2d, v9.d[0]
fmla v30.2d, v2.2d, v9.d[1]
fmla v19.2d, v3.2d, v8.d[0]
fmla v23.2d, v3.2d, v8.d[1]

ldp q6, q7, [pA], #32
add pB, pB, #32
add pA, pA, #64

fmla v19.2d, v3.2d, v8.d[0]
fmla v23.2d, v3.2d, v8.d[1]
fmla v27.2d, v3.2d, v9.d[0]
fmla v31.2d, v3.2d, v9.d[1]
.endm

.macro KERNEL8x4_M2
ldp q8, q9, [pB]
ldp q0, q1, [pA]
ldp q2, q3, [pA, #32]

fmla v16.2d, v4.2d, v12.d[0]
fmla v20.2d, v4.2d, v12.d[1]
fmla v24.2d, v4.2d, v13.d[0]
fmla v28.2d, v4.2d, v13.d[1]

ldp q0, q1, [pA], #32
prfm PLDL1KEEP, [pB, B_PRE_SIZE]

fmla v17.2d, v5.2d, v12.d[0]
fmla v25.2d, v5.2d, v13.d[0]

ldp q8, q9, [pB]
add pB, pB, #32

fmla v21.2d, v5.2d, v12.d[1]
fmla v29.2d, v5.2d, v13.d[1]

fmla v18.2d, v6.2d, v12.d[0]
fmla v22.2d, v6.2d, v12.d[1]

prfm PLDL1KEEP, [pB, B_PRE_SIZE]

fmla v26.2d, v6.2d, v13.d[0]
fmla v30.2d, v6.2d, v13.d[1]

add pB, pB, #32
add pA, pA, #64

fmla v19.2d, v7.2d, v12.d[0]
fmla v23.2d, v7.2d, v12.d[1]

ldp q2, q3, [pA], #32

fmla v27.2d, v7.2d, v13.d[0]
fmla v31.2d, v7.2d, v13.d[1]
.endm
@@ -342,13 +319,13 @@ USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
fmla v24.2d, v4.2d, v13.d[0]
fmla v28.2d, v4.2d, v13.d[1]

prfm PLDL1KEEP, [pB, B_PRE_SIZE]

fmla v17.2d, v5.2d, v12.d[0]
fmla v25.2d, v5.2d, v13.d[0]
fmla v21.2d, v5.2d, v12.d[1]
fmla v29.2d, v5.2d, v13.d[1]

prfm PLDL1KEEP, [pB, B_PRE_SIZE]

fmla v18.2d, v6.2d, v12.d[0]
fmla v22.2d, v6.2d, v12.d[1]
fmla v26.2d, v6.2d, v13.d[0]
@@ -361,42 +338,36 @@ USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
.endm

.macro KERNEL8x4_SUB
ldp q0, q1, [pA], #32
ldp q0, q1, [pA]
ldp q8, q9, [pB]
ldp q2, q3, [pA, #32]

ldur q8, [pB]
prfm PLDL1KEEP, [pA, A_PRE_SIZE]

fmla v16.2d, v0.2d, v8.d[0]
fmla v20.2d, v0.2d, v8.d[1]

ldur q9, [pB, #16]
add pB, pB, #32

fmla v17.2d, v1.2d, v8.d[0]
fmla v21.2d, v1.2d, v8.d[1]

ldp q2, q3, [pA], #32
prfm PLDL1KEEP, [pA, A_PRE_SIZE_64]

fmla v24.2d, v0.2d, v9.d[0]
fmla v28.2d, v0.2d, v9.d[1]

fmla v25.2d, v1.2d, v9.d[0]
fmla v29.2d, v1.2d, v9.d[1]

prfm PLDL1KEEP, [pA, A_PRE_SIZE]
prfm PLDL1KEEP, [pB, B_PRE_SIZE]

fmla v18.2d, v2.2d, v8.d[0]
fmla v22.2d, v2.2d, v8.d[1]

prfm PLDL1KEEP, [pA, A_PRE_SIZE_64]

fmla v26.2d, v2.2d, v9.d[0]
fmla v30.2d, v2.2d, v9.d[1]

prfm PLDL1KEEP, [pB, B_PRE_SIZE]
add pB, pB, #32
add pA, pA, #64

fmla v19.2d, v3.2d, v8.d[0]
fmla v27.2d, v3.2d, v9.d[0]

fmla v31.2d, v3.2d, v9.d[1]
fmla v23.2d, v3.2d, v8.d[1]
.endm

+ 2081
- 0
kernel/arm64/sgemm_kernel_16x4_thunderx2t99.S
File diff suppressed because it is too large
View File


+ 228
- 0
kernel/arm64/snrm2_thunderx2t99.S View File

@@ -0,0 +1,228 @@
/*******************************************************************************
Copyright (c) 2017, The OpenBLAS Project
All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are
met:
1. Redistributions of source code must retain the above copyright
notice, this list of conditions and the following disclaimer.
2. Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in
the documentation and/or other materials provided with the
distribution.
3. Neither the name of the OpenBLAS project nor the names of
its contributors may be used to endorse or promote products
derived from this software without specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
ARE DISCLAIMED. IN NO EVENT SHALL THE OPENBLAS PROJECT OR CONTRIBUTORS BE
LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*******************************************************************************/

#define ASSEMBLER
#include "common.h"

#define N x0 /* vector length */
#define X x1 /* X vector address */
#define INC_X x2 /* X stride */
#define I x5 /* loop variable */

/*******************************************************************************
* Macro definitions
*******************************************************************************/

#define TMPF s16
#define TMPFD d17
#define SSQ s0
#define SSQD d0
#define TMPVF {v16.s}[0]
#define TMPVFD {v17.s}[0]
#define SZ 4

/******************************************************************************/

.macro INIT
fmov SSQD, xzr
fmov d1, xzr
fmov d2, xzr
fmov d3, xzr
fmov d4, xzr
fmov d5, xzr
fmov d6, xzr
fmov d7, xzr
.endm

.macro KERNEL_F1
ldr TMPF, [X], #SZ
fcvt TMPFD, TMPF
fmadd SSQD, TMPFD, TMPFD, SSQD
.endm

.macro KERNEL_F32
ldur q16, [X]
ldur q18, [X, #16]
ldur q20, [X, #32]
ldur q22, [X, #48]
ldur q24, [X, #64]
ldur q26, [X, #80]
ldur q28, [X, #96]
ldur q30, [X, #112]

add X, X, #128

fcvtl2 v17.2d, v16.4s
fcvtl v16.2d, v16.2s
fcvtl2 v19.2d, v18.4s
fcvtl v18.2d, v18.2s
fcvtl2 v21.2d, v20.4s
fcvtl v20.2d, v20.2s
fcvtl2 v23.2d, v22.4s
fcvtl v22.2d, v22.2s
fcvtl2 v25.2d, v24.4s
fcvtl v24.2d, v24.2s
fcvtl2 v27.2d, v26.4s
fcvtl v26.2d, v26.2s
fcvtl2 v29.2d, v28.4s
fcvtl v28.2d, v28.2s
fcvtl2 v31.2d, v30.4s
fcvtl v30.2d, v30.2s

fmla v0.2d, v16.2d, v16.2d
fmla v1.2d, v17.2d, v17.2d
fmla v2.2d, v18.2d, v18.2d
fmla v3.2d, v19.2d, v19.2d
fmla v4.2d, v20.2d, v20.2d
fmla v5.2d, v21.2d, v21.2d
fmla v6.2d, v22.2d, v22.2d
fmla v7.2d, v23.2d, v23.2d

fmla v0.2d, v24.2d, v24.2d
fmla v1.2d, v25.2d, v25.2d
fmla v2.2d, v26.2d, v26.2d
fmla v3.2d, v27.2d, v27.2d
fmla v4.2d, v28.2d, v28.2d
fmla v5.2d, v29.2d, v29.2d
fmla v6.2d, v30.2d, v30.2d
fmla v7.2d, v31.2d, v31.2d

prfm PLDL1KEEP, [X, #1024]
prfm PLDL1KEEP, [X, #1024+64]
.endm

.macro KERNEL_F32_FINALIZE
fadd v0.2d, v0.2d, v1.2d
fadd v2.2d, v2.2d, v3.2d
fadd v4.2d, v4.2d, v5.2d
fadd v6.2d, v6.2d, v7.2d

fadd v0.2d, v0.2d, v2.2d
fadd v4.2d, v4.2d, v6.2d

fadd v0.2d, v0.2d, v4.2d
faddp SSQD, v0.2d
.endm

.macro INIT_S
lsl INC_X, INC_X, #2
.endm

.macro KERNEL_S1
ldr TMPF, [X]
add X, X, INC_X
fcvt TMPFD, TMPF
fmadd SSQD, TMPFD, TMPFD, SSQD
.endm

/*******************************************************************************
* End of macro definitions
*******************************************************************************/

PROLOGUE

INIT

cmp N, xzr
ble nrm2_kernel_zero
cmp INC_X, xzr
ble nrm2_kernel_zero
cmp INC_X, #1
bne nrm2_kernel_S_BEGIN

nrm2_kernel_F_BEGIN:

asr I, N, #6
cmp I, xzr
beq nrm2_kernel_S_BEGIN

.align 5
nrm2_kernel_F64:

KERNEL_F32
KERNEL_F32

subs I, I, #1
bne nrm2_kernel_F64

KERNEL_F32_FINALIZE

nrm2_kernel_F1:

ands I, N, #63
ble nrm2_kernel_L999

nrm2_kernel_F10:

KERNEL_F1

subs I, I, #1
bne nrm2_kernel_F10

b nrm2_kernel_L999

nrm2_kernel_S_BEGIN:

INIT_S

asr I, N, #2
cmp I, xzr
ble nrm2_kernel_S1

nrm2_kernel_S4:

KERNEL_S1
KERNEL_S1
KERNEL_S1
KERNEL_S1

subs I, I, #1
bne nrm2_kernel_S4

nrm2_kernel_S1:

ands I, N, #3
ble nrm2_kernel_L999

nrm2_kernel_S10:

KERNEL_S1

subs I, I, #1
bne nrm2_kernel_S10

nrm2_kernel_L999:
fsqrt SSQD, SSQD
fcvt SSQ, SSQD
ret

nrm2_kernel_zero:
fmov SSQ, wzr

ret

EPILOGUE

+ 6
- 6
param.h View File

@@ -2326,17 +2326,17 @@ USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#define ZGEMM_DEFAULT_UNROLL_M 4
#define ZGEMM_DEFAULT_UNROLL_N 4

#define SGEMM_DEFAULT_P 512
#define SGEMM_DEFAULT_P sgemm_p
#define DGEMM_DEFAULT_P dgemm_p
#define CGEMM_DEFAULT_P 256
#define ZGEMM_DEFAULT_P 128

#define SGEMM_DEFAULT_Q 1024
#define SGEMM_DEFAULT_Q sgemm_q
#define DGEMM_DEFAULT_Q dgemm_q
#define CGEMM_DEFAULT_Q 512
#define ZGEMM_DEFAULT_Q 512

#define SGEMM_DEFAULT_R 4096
#define SGEMM_DEFAULT_R sgemm_r
#define DGEMM_DEFAULT_R dgemm_r
#define CGEMM_DEFAULT_R 4096
#define ZGEMM_DEFAULT_R 2048
@@ -2482,17 +2482,17 @@ USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#define ZGEMM_DEFAULT_UNROLL_M 4
#define ZGEMM_DEFAULT_UNROLL_N 4

#define SGEMM_DEFAULT_P 512
#define SGEMM_DEFAULT_P sgemm_p
#define DGEMM_DEFAULT_P dgemm_p
#define CGEMM_DEFAULT_P 256
#define ZGEMM_DEFAULT_P 128

#define SGEMM_DEFAULT_Q 1024
#define SGEMM_DEFAULT_Q sgemm_q
#define DGEMM_DEFAULT_Q dgemm_q
#define CGEMM_DEFAULT_Q 512
#define ZGEMM_DEFAULT_Q 512

#define SGEMM_DEFAULT_R 4096
#define SGEMM_DEFAULT_R sgemm_r
#define DGEMM_DEFAULT_R dgemm_r
#define CGEMM_DEFAULT_R 4096
#define ZGEMM_DEFAULT_R 2048


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