From 7b66330deada3236e2bcd0ccf3e919ab33a88e28 Mon Sep 17 00:00:00 2001 From: zanpeeters Date: Tue, 15 Apr 2025 17:12:03 -0700 Subject: [PATCH 1/3] hw.perflevel[01].cpusperl changed to hw.perflevel[01].cpusperl2 --- cpuid_arm64.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/cpuid_arm64.c b/cpuid_arm64.c index 20dbead23..03563a23b 100644 --- a/cpuid_arm64.c +++ b/cpuid_arm64.c @@ -378,9 +378,9 @@ int detect(void) cpulowperf=value64; sysctlbyname("hw.nperflevels",&value64,&length64,NULL,0); if (value64 > 1) { - sysctlbyname("hw.perflevel0.cpusperl",&value64,&length64,NULL,0); + sysctlbyname("hw.perflevel0.cpusperl2",&value64,&length64,NULL,0); cpuhiperf=value64; - sysctlbyname("hw.perflevel1.cpusperl",&value64,&length64,NULL,0); + sysctlbyname("hw.perflevel1.cpusperl2",&value64,&length64,NULL,0); cpulowperf=value64; } sysctlbyname("hw.cpufamily",&value64,&length64,NULL,0); From d1c2528aed50bac13ef6b41aba012d2fea30eb4b Mon Sep 17 00:00:00 2001 From: zanpeeters Date: Tue, 15 Apr 2025 17:14:19 -0700 Subject: [PATCH 2/3] Add L1_DATA_LINESIZE for ifdef __APPLE__ --- cpuid_arm64.c | 1 + 1 file changed, 1 insertion(+) diff --git a/cpuid_arm64.c b/cpuid_arm64.c index 03563a23b..95c1b9519 100644 --- a/cpuid_arm64.c +++ b/cpuid_arm64.c @@ -702,6 +702,7 @@ void get_cpuconfig(void) printf("#define L1_CODE_SIZE %lld \n",value64); sysctlbyname("hw.cachelinesize",&value64,&length64,NULL,0); printf("#define L1_CODE_LINESIZE %lld \n",value64); + printf("#define L1_DATA_LINESIZE %lld \n",value64); sysctlbyname("hw.l1dcachesize",&value64,&length64,NULL,0); printf("#define L1_DATA_SIZE %lld \n",value64); sysctlbyname("hw.l2cachesize",&value64,&length64,NULL,0); From acef78c778631ee23c8e23214b41226872e454f5 Mon Sep 17 00:00:00 2001 From: zanpeeters Date: Tue, 15 Apr 2025 17:17:17 -0700 Subject: [PATCH 3/3] Reset buffer length before every call to sysctlbyname. --- cpuid_arm64.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/cpuid_arm64.c b/cpuid_arm64.c index 95c1b9519..c60725828 100644 --- a/cpuid_arm64.c +++ b/cpuid_arm64.c @@ -374,15 +374,20 @@ int detect(void) } #else #ifdef __APPLE__ + length64 = sizeof(value64); sysctlbyname("hw.ncpu",&value64,&length64,NULL,0); cpulowperf=value64; + length64 = sizeof(value64); sysctlbyname("hw.nperflevels",&value64,&length64,NULL,0); if (value64 > 1) { + length64 = sizeof(value64); sysctlbyname("hw.perflevel0.cpusperl2",&value64,&length64,NULL,0); cpuhiperf=value64; + length64 = sizeof(value64); sysctlbyname("hw.perflevel1.cpusperl2",&value64,&length64,NULL,0); cpulowperf=value64; } + length64 = sizeof(value64); sysctlbyname("hw.cpufamily",&value64,&length64,NULL,0); if (value64 ==131287967|| value64 == 458787763 ) return CPU_VORTEX; //A12/M1 if (value64 == 3660830781) return CPU_VORTEX; //A15/M2 @@ -467,6 +472,7 @@ int n=0; printf("#define NUM_CORES_HP %d\n",cpuhiperf); #endif #ifdef __APPLE__ + length64 = sizeof(value64); sysctlbyname("hw.physicalcpu_max",&value,&length,NULL,0); printf("#define NUM_CORES %d\n",value); if (cpulowperf >0) @@ -698,13 +704,17 @@ void get_cpuconfig(void) case CPU_VORTEX: printf("#define VORTEX \n"); #ifdef __APPLE__ + length64 = sizeof(value64); sysctlbyname("hw.l1icachesize",&value64,&length64,NULL,0); printf("#define L1_CODE_SIZE %lld \n",value64); + length64 = sizeof(value64); sysctlbyname("hw.cachelinesize",&value64,&length64,NULL,0); printf("#define L1_CODE_LINESIZE %lld \n",value64); printf("#define L1_DATA_LINESIZE %lld \n",value64); + length64 = sizeof(value64); sysctlbyname("hw.l1dcachesize",&value64,&length64,NULL,0); printf("#define L1_DATA_SIZE %lld \n",value64); + length64 = sizeof(value64); sysctlbyname("hw.l2cachesize",&value64,&length64,NULL,0); printf("#define L2_SIZE %lld \n",value64); #endif