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Merge pull request #2553 from martin-frbg/issue2444

Add a read memory barrier to the traversal of the buffer slot list
tags/v0.3.10^2
Martin Kroeker GitHub 6 years ago
parent
commit
c861b2a7bd
No known key found for this signature in database GPG Key ID: 4AEE18F83AFDEB23
12 changed files with 16 additions and 3 deletions
  1. +1
    -0
      common_alpha.h
  2. +2
    -0
      common_arm.h
  3. +1
    -1
      common_arm64.h
  4. +1
    -0
      common_ia64.h
  5. +1
    -0
      common_mips.h
  6. +1
    -0
      common_mips64.h
  7. +2
    -0
      common_power.h
  8. +1
    -0
      common_sparc.h
  9. +1
    -0
      common_x86.h
  10. +3
    -0
      common_x86_64.h
  11. +1
    -2
      common_zarch.h
  12. +1
    -0
      driver/others/memory.c

+ 1
- 0
common_alpha.h View File

@@ -43,6 +43,7 @@

#define MB asm("mb")
#define WMB asm("wmb")
#define RMB asm("rmb")

static void __inline blas_lock(unsigned long *address){
#ifndef __DECC


+ 2
- 0
common_arm.h View File

@@ -37,11 +37,13 @@ USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

#define MB
#define WMB
#define RMB

#else

#define MB __asm__ __volatile__ ("dmb ish" : : : "memory")
#define WMB __asm__ __volatile__ ("dmb ishst" : : : "memory")
#define RMB __asm__ __volatile__ ("dmb ish" : : : "memory")

#endif



+ 1
- 1
common_arm64.h View File

@@ -35,7 +35,7 @@ USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

#define MB __asm__ __volatile__ ("dmb ish" : : : "memory")
#define WMB __asm__ __volatile__ ("dmb ishst" : : : "memory")
#define RMB __asm__ __volatile__ ("dmb ishld" : : : "memory")

#define INLINE inline



+ 1
- 0
common_ia64.h View File

@@ -47,6 +47,7 @@

#define MB
#define WMB
#define RMB

#ifdef __ECC
#include <ia64intrin.h>


+ 1
- 0
common_mips.h View File

@@ -35,6 +35,7 @@ USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

#define MB __sync_synchronize()
#define WMB __sync_synchronize()
#define RMB __sync_synchronize()

#define INLINE inline



+ 1
- 0
common_mips64.h View File

@@ -73,6 +73,7 @@ USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

#define MB __sync_synchronize()
#define WMB __sync_synchronize()
#define RMB __sync_synchronize()

#define INLINE inline



+ 2
- 0
common_power.h View File

@@ -71,9 +71,11 @@
#if defined(POWER8) || defined(POWER9)
#define MB __asm__ __volatile__ ("eieio":::"memory")
#define WMB __asm__ __volatile__ ("eieio":::"memory")
#define RMB __asm__ __volatile__ ("eieio":::"memory")
#else
#define MB __asm__ __volatile__ ("sync")
#define WMB __asm__ __volatile__ ("sync")
#define RMB __asm__ __volatile__ ("sync")
#endif

#define INLINE inline


+ 1
- 0
common_sparc.h View File

@@ -41,6 +41,7 @@

#define MB __asm__ __volatile__ ("nop")
#define WMB __asm__ __volatile__ ("nop")
#define RMB __asm__ __volatile__ ("nop")

#ifndef ASSEMBLER



+ 1
- 0
common_x86.h View File

@@ -47,6 +47,7 @@

#define MB
#define WMB
#define RMB

#ifdef C_SUN
#define __asm__ __asm


+ 3
- 0
common_x86_64.h View File

@@ -63,13 +63,16 @@
#ifdef __GNUC__
#define MB do { __asm__ __volatile__("": : :"memory"); } while (0)
#define WMB do { __asm__ __volatile__("": : :"memory"); } while (0)
#define RMB
#else
#define MB do {} while (0)
#define WMB do {} while (0)
#define RMB
#endif

static void __inline blas_lock(volatile BLASULONG *address){

#ifndef C_MSVC
int ret;
#else


+ 1
- 2
common_zarch.h View File

@@ -34,9 +34,8 @@ USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#define COMMON_ZARCH

#define MB
//__asm__ __volatile__ ("dmb ish" : : : "memory")
#define WMB
//__asm__ __volatile__ ("dmb ishst" : : : "memory")
#define RMB


#define INLINE inline


+ 1
- 0
driver/others/memory.c View File

@@ -2741,6 +2741,7 @@ void *blas_memory_alloc(int procpos){
LOCK_COMMAND(&alloc_lock);
#endif
do {
RMB;
#if defined(USE_OPENMP)
if (!memory[position].used) {
blas_lock(&memory[position].lock);


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