From c2271f20e769ca4bb7874d03361c52799c78f010 Mon Sep 17 00:00:00 2001
From: "tingbo.liao" <tingbo.liao@starfivetech.com>
Date: Tue, 31 Dec 2024 11:03:10 +0800
Subject: [PATCH] Correct the usage conditions of the macro RISCV_SIMD.

Signed-off-by: tingbo.liao <tingbo.liao@starfivetech.com>
---
 common_riscv64.h | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/common_riscv64.h b/common_riscv64.h
index eb339d63a..77fbeace8 100644
--- a/common_riscv64.h
+++ b/common_riscv64.h
@@ -91,8 +91,10 @@ static inline int blas_quickdivide(blasint x, blasint y){
 
 #if defined(C910V) || defined(RISCV64_ZVL256B) || defined(RISCV64_ZVL128B) || defined(x280)
 # include <riscv_vector.h>
+#if defined(x280)
 #define RISCV_SIMD
 #endif
+#endif
 
 #if defined( __riscv_xtheadc ) && defined( __riscv_v ) && ( __riscv_v <= 7000 )
 // t-head toolchain uses obsolete rvv intrinsics, can't build for C910V without this