Make it work on general MIPS64 processorstags/v0.3.22^2
| @@ -677,7 +677,12 @@ endif | |||
| endif | |||
| ifeq ($(ARCH), mips64) | |||
| DYNAMIC_CORE = LOONGSON3R3 LOONGSON3R4 | |||
| DYNAMIC_CORE = LOONGSON3R3 LOONGSON3R4 MIPS64_GENERIC | |||
| ifdef DYNAMIC_LIST | |||
| override DYNAMIC_CORE = MIPS64_GENERIC $(DYNAMIC_LIST) | |||
| XCCOMMON_OPT = -DDYNAMIC_LIST -DDYN_MIPS64_GENERIC | |||
| XCCOMMON_OPT += $(foreach dcore,$(DYNAMIC_LIST),-DDYN_$(dcore)) | |||
| endif | |||
| endif | |||
| ifeq ($(ARCH), loongarch64) | |||
| @@ -856,6 +861,11 @@ CCOMMON_OPT += -mabi=32 | |||
| BINARY_DEFINED = 1 | |||
| endif | |||
| ifneq (, $(filter $(CORE), MIPS64_GENERIC)) | |||
| CCOMMON_OPT += -DNO_MSA | |||
| FCOMMON_OPT += -DNO_MSA | |||
| endif | |||
| ifneq (, $(filter $(CORE),LOONGSON3R3 LOONGSON3R4)) | |||
| CCOMMON_OPT += -march=loongson3a | |||
| FCOMMON_OPT += -march=loongson3a | |||
| @@ -65,6 +65,7 @@ MIPS1004K | |||
| MIPS24K | |||
| 4.MIPS64 CPU: | |||
| MIPS64_GENERIC | |||
| SICORTEX | |||
| LOONGSON3A | |||
| LOONGSON3B | |||
| @@ -86,7 +86,9 @@ static inline unsigned int rpcc(void){ | |||
| //__asm__ __volatile__("dmfc0 %0, $25, 1": "=r"(tmp):: "memory"); | |||
| //ret=tmp; | |||
| __asm__ __volatile__(".set push \n" | |||
| #if !defined(__mips_isa_rev) || __mips_isa_rev < 2 | |||
| ".set mips32r2\n" | |||
| #endif | |||
| "rdhwr %0, $2\n" | |||
| ".set pop": "=r"(ret):: "memory"); | |||
| @@ -99,7 +101,9 @@ static inline unsigned int rpcc(void){ | |||
| static inline int WhereAmI(void){ | |||
| int ret=0; | |||
| __asm__ __volatile__(".set push \n" | |||
| #if !defined(__mips_isa_rev) || __mips_isa_rev < 2 | |||
| ".set mips32r2\n" | |||
| #endif | |||
| "rdhwr %0, $0\n" | |||
| ".set pop": "=r"(ret):: "memory"); | |||
| return ret; | |||
| @@ -197,9 +201,15 @@ static inline int blas_quickdivide(blasint x, blasint y){ | |||
| #if defined(ASSEMBLER) && !defined(NEEDPARAM) | |||
| #if defined(__mips_isa_rev) && __mips_isa_rev >= 6 | |||
| #define ASSEMBLER_ARCH mips64r6 | |||
| #else | |||
| #define ASSEMBLER_ARCH mips64 | |||
| #endif | |||
| #define PROLOGUE \ | |||
| .text ;\ | |||
| .set mips64 ;\ | |||
| .set ASSEMBLER_ARCH ;\ | |||
| .align 5 ;\ | |||
| .globl REALNAME ;\ | |||
| .ent REALNAME ;\ | |||
| @@ -70,16 +70,18 @@ USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | |||
| /* or implied, of The University of Texas at Austin. */ | |||
| /*********************************************************************/ | |||
| #define CPU_UNKNOWN 0 | |||
| #define CPU_SICORTEX 1 | |||
| #define CPU_LOONGSON3R3 2 | |||
| #define CPU_LOONGSON3R4 3 | |||
| #define CPU_I6400 4 | |||
| #define CPU_P6600 5 | |||
| #define CPU_I6500 6 | |||
| #define CPU_UNKNOWN 0 | |||
| #define CPU_MIPS64_GENERIC 1 | |||
| #define CPU_SICORTEX 2 | |||
| #define CPU_LOONGSON3R3 3 | |||
| #define CPU_LOONGSON3R4 4 | |||
| #define CPU_I6400 5 | |||
| #define CPU_P6600 6 | |||
| #define CPU_I6500 7 | |||
| static char *cpuname[] = { | |||
| "UNKNOWN", | |||
| "MIPS64_GENERIC" | |||
| "SICORTEX", | |||
| "LOONGSON3R3", | |||
| "LOONGSON3R4", | |||
| @@ -113,8 +115,11 @@ int detect(void){ | |||
| return CPU_SICORTEX; | |||
| } | |||
| } | |||
| return CPU_MIPS64_GENERIC; | |||
| #else | |||
| return CPU_UNKNOWN; | |||
| #endif | |||
| return CPU_UNKNOWN; | |||
| } | |||
| char *get_corename(void){ | |||
| @@ -136,9 +141,11 @@ void get_subarchitecture(void){ | |||
| printf("P6600"); | |||
| }else if(detect()==CPU_I6500){ | |||
| printf("I6500"); | |||
| }else{ | |||
| }else if(detect()==CPU_SICORTEX){ | |||
| printf("SICORTEX"); | |||
| } | |||
| }else{ | |||
| printf("MIPS64_GENERIC"); | |||
| } | |||
| } | |||
| void get_subdirname(void){ | |||
| @@ -215,8 +222,8 @@ void get_libname(void){ | |||
| printf("p6600\n"); | |||
| }else if(detect()==CPU_I6500) { | |||
| printf("i6500\n"); | |||
| }else{ | |||
| printf("mips64\n"); | |||
| }else { | |||
| printf("mips64_generic\n"); | |||
| } | |||
| } | |||
| @@ -38,22 +38,48 @@ USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | |||
| #include <sys/resource.h> | |||
| #include "common.h" | |||
| #if (defined OS_LINUX || defined OS_ANDROID) | |||
| #include <asm/hwcap.h> | |||
| #include <sys/auxv.h> | |||
| #ifndef HWCAP_LOONGSON_CPUCFG | |||
| #define HWCAP_LOONGSON_CPUCFG (1 << 14) | |||
| #endif | |||
| #endif | |||
| #ifdef DYNAMIC_LIST | |||
| extern gotoblas_t gotoblas_MIPS64_GENERIC; | |||
| #ifdef DYN_LOONGSON3R3 | |||
| extern gotoblas_t gotoblas_LOONGSON3R3; | |||
| #else | |||
| #define gotoblas_LOONGSON3R3 gotoblas_MIPS64_GENERIC | |||
| #endif | |||
| #ifdef DYN_LOONGSON3R4 | |||
| extern gotoblas_t gotoblas_LOONGSON3R4; | |||
| #else | |||
| #define gotoblas_LOONGSON3R4 gotoblas_MIPS64_GENERIC | |||
| #endif | |||
| #else | |||
| extern gotoblas_t gotoblas_LOONGSON3R3; | |||
| extern gotoblas_t gotoblas_LOONGSON3R4; | |||
| extern gotoblas_t gotoblas_MIPS64_GENERIC; | |||
| #endif | |||
| extern void openblas_warning(int verbose, const char * msg); | |||
| #define NUM_CORETYPES 2 | |||
| #define NUM_CORETYPES 3 | |||
| static char *corename[] = { | |||
| "MIPS64_GENERIC" | |||
| "loongson3r3", | |||
| "loongson3r4", | |||
| "UNKNOWN" | |||
| }; | |||
| char *gotoblas_corename(void) { | |||
| if (gotoblas == &gotoblas_LOONGSON3R3) return corename[0]; | |||
| if (gotoblas == &gotoblas_LOONGSON3R4) return corename[1]; | |||
| if (gotoblas == &gotoblas_MIPS64_GENERIC) return corename[0]; | |||
| if (gotoblas == &gotoblas_LOONGSON3R3) return corename[1]; | |||
| if (gotoblas == &gotoblas_LOONGSON3R4) return corename[2]; | |||
| return corename[NUM_CORETYPES]; | |||
| } | |||
| @@ -73,77 +99,32 @@ static gotoblas_t *force_coretype(char *coretype) { | |||
| switch (found) | |||
| { | |||
| case 0: return (&gotoblas_LOONGSON3R3); | |||
| case 1: return (&gotoblas_LOONGSON3R4); | |||
| case 0: return (&gotoblas_MIPS64_GENERIC); | |||
| case 1: return (&gotoblas_LOONGSON3R3); | |||
| case 2: return (&gotoblas_LOONGSON3R4); | |||
| } | |||
| snprintf(message, 128, "Core not found: %s\n", coretype); | |||
| openblas_warning(1, message); | |||
| return NULL; | |||
| } | |||
| #if (defined OS_LINUX || defined OS_ANDROID) | |||
| #define MMI_MASK 0x00000010 | |||
| #define MSA_MASK 0x00000020 | |||
| int fd[2]; | |||
| int support_cpucfg; | |||
| static void handler(int signum) | |||
| { | |||
| close(fd[1]); | |||
| exit(1); | |||
| } | |||
| /* Brief : Function to check if cpucfg supported on loongson | |||
| * Return: 1 supported | |||
| * 0 not supported | |||
| */ | |||
| static int cpucfg_test(void) { | |||
| pid_t pid; | |||
| int status = 0; | |||
| support_cpucfg = 0; | |||
| pipe(fd); | |||
| pid = fork(); | |||
| if (pid == 0) { /* Subprocess */ | |||
| struct sigaction act; | |||
| close(fd[0]); | |||
| /* Set signal action for SIGILL. */ | |||
| act.sa_handler = handler; | |||
| sigaction(SIGILL,&act,NULL); | |||
| /* Execute cpucfg in subprocess. */ | |||
| __asm__ volatile( | |||
| ".insn \n\t" | |||
| ".word (0xc8080118) \n\t" | |||
| ::: | |||
| ); | |||
| support_cpucfg = 1; | |||
| write(fd[1],&support_cpucfg,sizeof(support_cpucfg)); | |||
| close(fd[1]); | |||
| exit(0); | |||
| } else if (pid > 0){ /* Parent process*/ | |||
| close(fd[1]); | |||
| if ((waitpid(pid,&status,0) <= 0) || | |||
| (read(fd[0],&support_cpucfg,sizeof(support_cpucfg)) <= 0)) | |||
| support_cpucfg = 0; | |||
| close(fd[0]); | |||
| } else { | |||
| support_cpucfg = 0; | |||
| } | |||
| return support_cpucfg; | |||
| } | |||
| static gotoblas_t *get_coretype_from_cpucfg(void) { | |||
| int flag = 0; | |||
| __asm__ volatile( | |||
| ".set push \n\t" | |||
| ".set noat \n\t" | |||
| ".insn \n\t" | |||
| "dli $8, 0x01 \n\t" | |||
| ".word (0xc9084918) \n\t" | |||
| "usw $9, 0x00(%0) \n\t" | |||
| "dli $1, 0x01 \n\t" | |||
| ".word (0xc8080118) \n\t" | |||
| "move %0, $1 \n\t" | |||
| ".set pop \n\t" | |||
| : "=r"(flag) | |||
| : | |||
| : | |||
| : "r"(&flag) | |||
| : "memory" | |||
| ); | |||
| if (flag & MSA_MASK) | |||
| return (&gotoblas_LOONGSON3R4); | |||
| @@ -153,7 +134,7 @@ static gotoblas_t *get_coretype_from_cpucfg(void) { | |||
| } | |||
| static gotoblas_t *get_coretype_from_cpuinfo(void) { | |||
| #ifdef linux | |||
| #ifdef __linux | |||
| FILE *infile; | |||
| char buffer[512], *p; | |||
| @@ -176,17 +157,19 @@ static gotoblas_t *get_coretype_from_cpuinfo(void) { | |||
| return NULL; | |||
| } | |||
| #endif | |||
| return NULL; | |||
| return NULL; | |||
| } | |||
| #endif | |||
| static gotoblas_t *get_coretype(void) { | |||
| int ret = 0; | |||
| ret = cpucfg_test(); | |||
| if (ret == 1) | |||
| return get_coretype_from_cpucfg(); | |||
| else | |||
| return get_coretype_from_cpuinfo(); | |||
| #if (!defined OS_LINUX && !defined OS_ANDROID) | |||
| return NULL; | |||
| #else | |||
| if (!(getauxval(AT_HWCAP) & HWCAP_LOONGSON_CPUCFG)) | |||
| return get_coretype_from_cpucfg(); | |||
| else | |||
| return get_coretype_from_cpuinfo(); | |||
| #endif | |||
| } | |||
| void gotoblas_dynamic_init(void) { | |||
| @@ -208,9 +191,9 @@ void gotoblas_dynamic_init(void) { | |||
| if (gotoblas == NULL) | |||
| { | |||
| snprintf(coremsg, 128, "Falling back to loongson3r3 core\n"); | |||
| snprintf(coremsg, 128, "Falling back to MIPS64_GENEIRC\n"); | |||
| openblas_warning(1, coremsg); | |||
| gotoblas = &gotoblas_LOONGSON3R3; | |||
| gotoblas = &gotoblas_MIPS64_GENERIC; | |||
| } | |||
| if (gotoblas && gotoblas->init) { | |||
| @@ -131,6 +131,7 @@ USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | |||
| /* #define FORCE_PPC440 */ | |||
| /* #define FORCE_PPC440FP2 */ | |||
| /* #define FORCE_CELL */ | |||
| /* #define FORCE_MIPS64_GENERIC */ | |||
| /* #define FORCE_SICORTEX */ | |||
| /* #define FORCE_LOONGSON3R3 */ | |||
| /* #define FORCE_LOONGSON3R4 */ | |||
| @@ -918,6 +919,20 @@ USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | |||
| #define CORENAME "CELL" | |||
| #endif | |||
| #ifdef FORCE_MIPS64_GENERIC | |||
| #define FORCE | |||
| #define ARCHITECTURE "MIPS" | |||
| #define SUBARCHITECTURE "MIPS64_GENERIC" | |||
| #define SUBDIRNAME "mips64" | |||
| #define ARCHCONFIG "-DMIPS64_GENERIC " \ | |||
| "-DL1_DATA_SIZE=65536 -DL1_DATA_LINESIZE=32 " \ | |||
| "-DL2_SIZE=1048576 -DL2_LINESIZE=32 " \ | |||
| "-DDTB_DEFAULT_ENTRIES=64 -DDTB_SIZE=4096 -DL2_ASSOCIATIVE=8 " | |||
| #define LIBNAME "mips64_generic" | |||
| #define CORENAME "MIPS64_GENERIC" | |||
| #else | |||
| #endif | |||
| #ifdef FORCE_SICORTEX | |||
| #define FORCE | |||
| #define ARCHITECTURE "MIPS" | |||
| @@ -42,50 +42,58 @@ endif | |||
| ifndef SGEMMKERNEL | |||
| SGEMMKERNEL = gemm_kernel.S | |||
| ifneq ($(SGEMM_UNROLL_M), $(SGEMM_UNROLL_N)) | |||
| SGEMMINCOPY = ../generic/gemm_ncopy_2.c | |||
| SGEMMITCOPY = ../generic/gemm_tcopy_2.c | |||
| SGEMMINCOPYOBJ = sgemm_incopy$(TSUFFIX).$(SUFFIX) | |||
| SGEMMITCOPYOBJ = sgemm_itcopy$(TSUFFIX).$(SUFFIX) | |||
| endif | |||
| SGEMMONCOPY = ../generic/gemm_ncopy_8.c | |||
| SGEMMOTCOPY = ../generic/gemm_tcopy_8.c | |||
| SGEMMINCOPYOBJ = sgemm_incopy.o | |||
| SGEMMITCOPYOBJ = sgemm_itcopy.o | |||
| SGEMMONCOPYOBJ = sgemm_oncopy.o | |||
| SGEMMOTCOPYOBJ = sgemm_otcopy.o | |||
| SGEMMONCOPYOBJ = sgemm_oncopy$(TSUFFIX).$(SUFFIX) | |||
| SGEMMOTCOPYOBJ = sgemm_otcopy$(TSUFFIX).$(SUFFIX) | |||
| endif | |||
| ifndef DGEMMKERNEL | |||
| DGEMMKERNEL = gemm_kernel.S | |||
| ifneq ($(DGEMM_UNROLL_M), $(DGEMM_UNROLL_N)) | |||
| DGEMMINCOPY = ../generic/gemm_ncopy_2.c | |||
| DGEMMITCOPY = ../generic/gemm_tcopy_2.c | |||
| DGEMMINCOPYOBJ = dgemm_incopy$(TSUFFIX).$(SUFFIX) | |||
| DGEMMITCOPYOBJ = dgemm_itcopy$(TSUFFIX).$(SUFFIX) | |||
| endif | |||
| DGEMMONCOPY = ../generic/gemm_ncopy_8.c | |||
| DGEMMOTCOPY = ../generic/gemm_tcopy_8.c | |||
| DGEMMINCOPYOBJ = dgemm_incopy.o | |||
| DGEMMITCOPYOBJ = dgemm_itcopy.o | |||
| DGEMMONCOPYOBJ = dgemm_oncopy.o | |||
| DGEMMOTCOPYOBJ = dgemm_otcopy.o | |||
| DGEMMONCOPYOBJ = dgemm_oncopy$(TSUFFIX).$(SUFFIX) | |||
| DGEMMOTCOPYOBJ = dgemm_otcopy$(TSUFFIX).$(SUFFIX) | |||
| endif | |||
| ifndef CGEMMKERNEL | |||
| CGEMMKERNEL = zgemm_kernel.S | |||
| ifneq ($(CGEMM_UNROLL_M), $(CGEMM_UNROLL_N)) | |||
| CGEMMINCOPY = ../generic/zgemm_ncopy_1.c | |||
| CGEMMITCOPY = ../generic/zgemm_tcopy_1.c | |||
| CGEMMINCOPYOBJ = cgemm_incopy$(TSUFFIX).$(SUFFIX) | |||
| CGEMMITCOPYOBJ = cgemm_itcopy$(TSUFFIX).$(SUFFIX) | |||
| endif | |||
| CGEMMONCOPY = ../generic/zgemm_ncopy_4.c | |||
| CGEMMOTCOPY = ../generic/zgemm_tcopy_4.c | |||
| CGEMMINCOPYOBJ = cgemm_incopy.o | |||
| CGEMMITCOPYOBJ = cgemm_itcopy.o | |||
| CGEMMONCOPYOBJ = cgemm_oncopy.o | |||
| CGEMMOTCOPYOBJ = cgemm_otcopy.o | |||
| CGEMMONCOPYOBJ = cgemm_oncopy$(TSUFFIX).$(SUFFIX) | |||
| CGEMMOTCOPYOBJ = cgemm_otcopy$(TSUFFIX).$(SUFFIX) | |||
| endif | |||
| ifndef ZGEMMKERNEL | |||
| ZGEMMKERNEL = zgemm_kernel.S | |||
| ifneq ($(ZGEMM_UNROLL_M), $(ZGEMM_UNROLL_N)) | |||
| ZGEMMINCOPY = ../generic/zgemm_ncopy_1.c | |||
| ZGEMMITCOPY = ../generic/zgemm_tcopy_1.c | |||
| ZGEMMINCOPYOBJ = zgemm_incopy$(TSUFFIX).$(SUFFIX) | |||
| ZGEMMITCOPYOBJ = zgemm_itcopy$(TSUFFIX).$(SUFFIX) | |||
| endif | |||
| ZGEMMONCOPY = ../generic/zgemm_ncopy_4.c | |||
| ZGEMMOTCOPY = ../generic/zgemm_tcopy_4.c | |||
| ZGEMMINCOPYOBJ = zgemm_incopy.o | |||
| ZGEMMITCOPYOBJ = zgemm_itcopy.o | |||
| ZGEMMONCOPYOBJ = zgemm_oncopy.o | |||
| ZGEMMOTCOPYOBJ = zgemm_otcopy.o | |||
| ZGEMMONCOPYOBJ = zgemm_oncopy$(TSUFFIX).$(SUFFIX) | |||
| ZGEMMOTCOPYOBJ = zgemm_otcopy$(TSUFFIX).$(SUFFIX) | |||
| endif | |||
| ifndef SGEMM_BETA | |||
| @@ -2945,7 +2945,7 @@ USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | |||
| #define SYMV_P 16 | |||
| #endif | |||
| #if defined(P5600) || defined(MIPS1004K) || defined(MIPS24K) || defined(I6400) || defined(P6600) || defined(I6500) | |||
| #if defined(MIPS64_GENERIC) || defined(P5600) || defined(MIPS1004K) || defined(MIPS24K) || defined(I6400) || defined(P6600) || defined(I6500) | |||
| #define SNUMOPT 2 | |||
| #define DNUMOPT 2 | |||