add general compiler target for tt-ascalon-d8

ascalon d8 is the tenstorrent ascalon processor in it's 8 wide configuration featuring multiple RVV1.0 compliant, 256 bit wide vector units. 

It also support a number of optional extensions for RVV, inclusive of: Ascalon Vector unit is designed to enable V-extension with a handful of minor extensions required or optional of the RVA23 Profile.
V: Vector Extension for Application Processors
Zvfh: Vector Extension for Half-Precision Floating-Point
Zvkn: NIST Algorithm Suite
Zvkg: Vector GCM/GMAC
Zvbc: Vector Carryless Multiplication
Zvbb: Vector Basic Bit-manipulation
Zvfbfwma: Vector BF16 widening mul-add
Xsfvqdotq: Vector quad widening 4D Dot Product

Makefile.riscv64

@@ -1,3 +1,7 @@
+ifeq ($(CORE), tt-ascalon-d8)
+CCOMMON_OPT += -march=rv64imafdhcv_zba_zbb_zfh_zvl256b_zvfh_zvkn_zvkg_zvbc_zvbb_zvfbfwma_xsfvqdotq -mabi=lp64d 
+FCOMMON_OPT += -march=rv64imafdhcv_zba_zbb_zfh_zvl256b_zvfh_zvkn_zvkg_zvbc_zvbb_zvfbfwma_xsfvqdotq -mabi=lp64d -static
+endif
 ifeq ($(CORE), C910V)
 CCOMMON_OPT += -march=rv64imafdcv0p7_zfh_xtheadc -mabi=lp64d -mtune=c920
 FCOMMON_OPT += -march=rv64imafdcv0p7_zfh_xtheadc -mabi=lp64d -mtune=c920 -static