| @@ -51,7 +51,7 @@ | |||||
| #else | #else | ||||
| #define X r7 | #define X r7 | ||||
| #define INCX r8 | #define INCX r8 | ||||
| #define FLAG r12 | |||||
| #define FLAG r11 | |||||
| #endif | #endif | ||||
| #endif | #endif | ||||
| @@ -63,7 +63,7 @@ | |||||
| #else | #else | ||||
| #define X r7 | #define X r7 | ||||
| #define INCX r8 | #define INCX r8 | ||||
| #define FLAG r12 | |||||
| #define FLAG r11 | |||||
| #endif | #endif | ||||
| #endif | #endif | ||||
| @@ -91,7 +91,7 @@ | |||||
| fcmpu cr0, FZERO, ALPHA | fcmpu cr0, FZERO, ALPHA | ||||
| bne- cr0, LL(A1I1) | bne- cr0, LL(A1I1) | ||||
| LDLONG FLAG, 48+64+8(SP) | |||||
| LDLONG FLAG, 104(SP) | |||||
| cmpwi cr0, FLAG, 1 | cmpwi cr0, FLAG, 1 | ||||
| beq- cr0, LL(A1I1) | beq- cr0, LL(A1I1) | ||||