| @@ -1,5 +1,5 @@ | |||||
| /***************************************************************************** | /***************************************************************************** | ||||
| Copyright (c) 2011-2014, The OpenBLAS Project | |||||
| Copyright (c) 2011-2015, The OpenBLAS Project | |||||
| All rights reserved. | All rights reserved. | ||||
| Redistribution and use in source and binary forms, with or without | Redistribution and use in source and binary forms, with or without | ||||
| @@ -30,49 +30,12 @@ OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE | |||||
| USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | ||||
| **********************************************************************************/ | **********************************************************************************/ | ||||
| /*********************************************************************/ | |||||
| /* Copyright 2009, 2010 The University of Texas at Austin. */ | |||||
| /* All rights reserved. */ | |||||
| /* */ | |||||
| /* Redistribution and use in source and binary forms, with or */ | |||||
| /* without modification, are permitted provided that the following */ | |||||
| /* conditions are met: */ | |||||
| /* */ | |||||
| /* 1. Redistributions of source code must retain the above */ | |||||
| /* copyright notice, this list of conditions and the following */ | |||||
| /* disclaimer. */ | |||||
| /* */ | |||||
| /* 2. Redistributions in binary form must reproduce the above */ | |||||
| /* copyright notice, this list of conditions and the following */ | |||||
| /* disclaimer in the documentation and/or other materials */ | |||||
| /* provided with the distribution. */ | |||||
| /* */ | |||||
| /* THIS SOFTWARE IS PROVIDED BY THE UNIVERSITY OF TEXAS AT */ | |||||
| /* AUSTIN ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, */ | |||||
| /* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF */ | |||||
| /* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE */ | |||||
| /* DISCLAIMED. IN NO EVENT SHALL THE UNIVERSITY OF TEXAS AT */ | |||||
| /* AUSTIN OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, */ | |||||
| /* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES */ | |||||
| /* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE */ | |||||
| /* GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR */ | |||||
| /* BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF */ | |||||
| /* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT */ | |||||
| /* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT */ | |||||
| /* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE */ | |||||
| /* POSSIBILITY OF SUCH DAMAGE. */ | |||||
| /* */ | |||||
| /* The views and conclusions contained in the software and */ | |||||
| /* documentation are those of the authors and should not be */ | |||||
| /* interpreted as representing official policies, either expressed */ | |||||
| /* or implied, of The University of Texas at Austin. */ | |||||
| /*********************************************************************/ | |||||
| #ifndef COMMON_ARM64 | #ifndef COMMON_ARM64 | ||||
| #define COMMON_ARM64 | #define COMMON_ARM64 | ||||
| #define MB | |||||
| #define WMB | |||||
| #define MB __asm__ __volatile__ ("dmb ish" : : : "memory") | |||||
| #define WMB __asm__ __volatile__ ("dmb ishst" : : : "memory") | |||||
| #define INLINE inline | #define INLINE inline | ||||
| @@ -81,17 +44,20 @@ USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | |||||
| #ifndef ASSEMBLER | #ifndef ASSEMBLER | ||||
| static void __inline blas_lock(volatile BLASULONG *address){ | static void __inline blas_lock(volatile BLASULONG *address){ | ||||
| /* | |||||
| int register ret; | int register ret; | ||||
| do { | do { | ||||
| while (*address) {YIELDING;}; | while (*address) {YIELDING;}; | ||||
| __asm__ __volatile__( | __asm__ __volatile__( | ||||
| "1: \n\t" | |||||
| "ldrex r2, [%1] \n\t" | "ldrex r2, [%1] \n\t" | ||||
| "mov r2, #0 \n\t" | "mov r2, #0 \n\t" | ||||
| "strex r3, r2, [%1] \n\t" | "strex r3, r2, [%1] \n\t" | ||||
| "mov %0 , r3 \n\t" | |||||
| "cmp r3, #0 \n\t" | |||||
| "bne 1b \n\t" | |||||
| "mov %0 , r3 \n\t" | |||||
| : "=r"(ret), "=r"(address) | : "=r"(ret), "=r"(address) | ||||
| : "1"(address) | : "1"(address) | ||||
| : "memory", "r2" , "r3" | : "memory", "r2" , "r3" | ||||
| @@ -100,7 +66,7 @@ static void __inline blas_lock(volatile BLASULONG *address){ | |||||
| ); | ); | ||||
| } while (ret); | } while (ret); | ||||
| */ | |||||
| } | } | ||||
| @@ -166,3 +132,4 @@ REALNAME: | |||||
| #endif | #endif | ||||
| #endif | #endif | ||||