 rebase? (#1)
* With the Intel compiler on Linux, prefer ifort for the final link step
icc has known problems with mixed-language builds that ifort can handle just fine. Fixes #1956
* Rename operands to put lda on the input/output constraint list
* Fix wrong constraints in inline assembly
for #2009
* Fix inline assembly constraints
rework indices to allow marking argument lda4 as input and output. For #2009
* Fix inline assembly constraints
rework indices to allow marking argument lda as input and output.
* Fix inline assembly constraints
* Fix inline assembly constraints
* Fix inline assembly constraints in Bulldozer TRSM kernels
rework indices to allow marking i,as and bs as both input and output (marked operand n1 as well for simplicity). For #2009
* Correct range_n limiting
same bug as seen in #1388, somehow missed in corresponding PR #1389
* Allow multithreading TRMV again
revert workaround introduced for issue #1332 as the actual cause appears to be my incorrect fix from #1262 (see #1388)
* Fix error introduced during cleanup
* Reduce list of kernels in the dynamic arch build
to make compilation complete reliably within the 1h limit again
* init
* move fix to right place
* Fix missing -c option in AVX512 test
* Fix AVX512 test always returning false due to missing compiler option
* Make x86_32 imply NO_AVX2, NO_AVX512 in addition to NO_AVX
fixes #2033
* Keep xcode8.3 for osx BINARY=32 build
as xcode10 deprecated i386
* Make sure that AVX512 is disabled in 32bit builds
for #2033
* Improve handling of NO_STATIC and NO_SHARED
to avoid surprises from defining either as zero. Fixes #2035 by addressing some concerns from #1422
* init
* address warning introed with #1814 et al
* Restore locking optimizations for OpenMP case
restore another accidentally dropped part of #1468 that was missed in #2004 to address performance regression reported in #1461
* HiSilicon tsv110 CPUs optimization branch
add HiSilicon tsv110 CPUs optimization branch
* add TARGET support for HiSilicon tsv110 CPUs
* add TARGET support for HiSilicon tsv110 CPUs
* add TARGET support for HiSilicon tsv110 CPUs
* Fix module definition conflicts between LAPACK and ReLAPACK
for #2043
* Do not compile in AVX512 check if AVX support is disabled
xgetbv is function depends on NO_AVX being undefined - we could change that too, but that combo is unlikely to work anyway
* ctest.c : add __POWERPC__ for PowerMac
* Fix crash in sgemm SSE/nano kernel on x86_64
Fix bug #2047.
Signed-off-by: Celelibi <celelibi@gmail.com>
* param.h : enable defines for PPC970 on DarwinOS
fixes:
gemm.c: In function 'sgemm_':
../common_param.h:981:18: error: 'SGEMM_DEFAULT_P' undeclared (first use in this function)
#define SGEMM_P SGEMM_DEFAULT_P
^
* common_power.h: force DCBT_ARG 0 on PPC970 Darwin
without this, we see
../kernel/power/gemv_n.S:427:Parameter syntax error
and many more similar entries
that relates to this assembly command
dcbt 8, r24, r18
this change makes the DCBT_ARG = 0
and openblas builds through to completion on PowerMac 970
Tests pass
* Make TARGET=GENERIC compatible with DYNAMIC_ARCH=1
for issue #2048
* make DYNAMIC_ARCH=1 package work on TSV110.
* make DYNAMIC_ARCH=1 package work on TSV110
* Add Intel Denverton
for #2048
* Add Intel Denverton
* Change 64-bit detection as explained in #2056
* Trivial typo fix
as suggested in #2022
* Disable the AVX512 DGEMM kernel (again)
Due to as yet unresolved errors seen in #1955 and #2029
* Use POSIX getenv on Cygwin
The Windows-native GetEnvironmentVariable cannot be relied on, as
Cygwin does not always copy environment variables set through Cygwin
to the Windows environment block, particularly after fork().
* Fix for #2063: The DllMain used in Cygwin did not run the thread memory
pool cleanup upon THREAD_DETACH which is needed when compiled with
USE_TLS=1.
* Also call CloseHandle on each thread, as well as on the event so as to not leak thread handles.
* AIX asm syntax changes needed for shared object creation
* power9 makefile. dgemm based on power8 kernel with following changes : 32x unrolled 16x4 kernel and 8x4 kernel using (lxv stxv butterfly rank1 update). improvement from 17 to 22-23gflops. dtrmm cases were added into dgemm itself
* Expose CBLAS interfaces for I?MIN and I?MAX
* Build CBLAS interfaces for I?MIN and I?MAX
* Add declarations for ?sum and cblas_?sum
* Add interface for ?sum (derived from ?asum)
* Add ?sum
* Add implementations of ssum/dsum and csum/zsum
as trivial copies of asum/zsasum with the fabs calls replaced by fmov to preserve code structure
* Add ARM implementations of ?sum
(trivial copies of the respective ?asum with the fabs calls removed)
* Add ARM64 implementations of ?sum
as trivial copies of the respective ?asum kernels with the fabs calls removed
* Add ia64 implementation of ?sum
as trivial copy of asum with the fabs calls removed
* Add MIPS implementation of ?sum
as trivial copy of ?asum with the fabs calls removed
* Add MIPS64 implementation of ?sum
as trivial copy of ?asum with the fabs replaced by mov to preserve code structure
* Add POWER implementation of ?sum
as trivial copy of ?asum with the fabs replaced by fmr to preserve code structure
* Add SPARC implementation of ?sum
as trivial copy of ?asum with the fabs replaced by fmov to preserve code structure
* Add x86 implementation of ?sum
as trivial copy of ?asum with the fabs calls removed
* Add x86_64 implementation of ?sum
as trivial copy of ?asum with the fabs calls removed
* Add ZARCH implementation of ?sum
as trivial copies of the respective ?asum kernels with the ABS and vflpsb calls removed
* Detect 32bit environment on 64bit ARM hardware
for #2056, using same approach as #2058
* Add cmake defaults for ?sum kernels
* Add ?sum
* Add ?sum definitions for generic kernel
* Add declarations for ?sum
* Add -lm and disable EXPRECISION support on *BSD
fixes #2075
* Add in runtime CPU detection for POWER.
* snprintf define consolidated to common.h
* Support INTERFACE64=1
* Add support for INTERFACE64 and fix XERBLA calls
1. Replaced all instances of "int" with "blasint"
2. Added string length as "hidden" third parameter in calls to fortran XERBLA
* Correct length of name string in xerbla call
* Avoid out-of-bounds accesses in LAPACK EIG tests
see https://github.com/Reference-LAPACK/lapack/issues/333
* Correct INFO=4 condition
* Disable reallocation of work array in xSYTRF
as it appears to cause memory management problems (seen in the LAPACK tests)
* Disable repeated recursion on Ab_BR in ReLAPACK xGBTRF
due to crashes in LAPACK tests
* sgemm/strmm
* Update Changelog with changes from 0.3.6
* Increment version to 0.3.7.dev
* Increment version to 0.3.7.dev
* Misc. typo fixes
Found via `codespell -q 3 -w -L ith,als,dum,nd,amin,nto,wis,ba -S ./relapack,./kernel,./lapack-netlib`
* Correct argument of CPU_ISSET for glibc <2.5
fixes #2104
* conflict resolve
* Revert reference/ fixes
* Revert Changelog.txt typos
* Disable the SkyLakeX DGEMMITCOPY kernel as well
as a stopgap measure for https://github.com/numpy/numpy/issues/13401 as mentioned in #1955
* Disable DGEMMINCOPY as well for now
#1955
* init
* Fix errors in cpu enumeration with glibc 2.6
for #2114
* Change two http links to https
Closes #2109
* remove redundant code #2113
* Set up CI with Azure Pipelines
[skip ci]
* TST: add native POWER8 to CI
* add native POWER8 testing to
Travis CI matrix with ppc64le
os entry
* Update link to IBM MASS library, update cpu support status
* first try migrating one of the arm builds from travis
* fix tabbing in azure commands
* Update azure-pipelines.yml
take out offending lines (although stolen from https://github.com/conda-forge/opencv-feedstock azure-pipelines fiie)
* Update azure-pipelines.yml
* Update azure-pipelines.yml
* Update azure-pipelines.yml
* Update azure-pipelines.yml
* DOC: Add Azure CI status badge
* Add ARMV6 build to azure CI setup (#2122)
using aytekinar's Alpine image and docker script from the Travis setup
[skip ci]
* TST: Azure manylinux1 & clean-up
* remove some of the steps & comments
from the original Azure yml template
* modify the trigger section to use
develop since OpenBLAS primarily uses
this branch; use the same batching
behavior as downstream projects NumPy/
SciPy
* remove Travis emulated ARMv6 gcc build
because this now happens in Azure
* use documented Ubuntu vmImage name for Azure
and add in a manylinux1 test run to the matrix
[skip appveyor]
* Add NO_AFFINITY to available options on Linux, and set it to ON
to match the gmake default. Fixes second part of #2114
* Replace ISMIN and ISAMIN kernels on all x86_64 platforms (#2125)
* Mark iamax_sse.S as unsuitable for MIN due to issue #2116
* Use iamax.S rather than iamax_sse.S for ISMIN/ISAMIN on all x86_64 as workaround for #2116
* Move ARMv8 gcc build from Travis to Azure
* Move ARMv8 gcc build from Travis to Azure
* Update .travis.yml
* Test drone CI
* install make
* remove sudo
* Install gcc
* Install perl
* Install gfortran and add a clang job
* gfortran->gcc-gfortran
* Switch to ubuntu and parallel jobs
* apt update
* Fix typo
* update yes
* no need of gcc in clang build
* Add a cmake build as well
* Add cmake builds and print options
* build without lapack on cmake
* parallel build
* See if ubuntu 19.04 fixes the ICE
* Remove qemu armv8 builds
* arm32 build
* Fix typo
* TST: add SkylakeX AVX512 CI test
* adapt the C-level reproducer code for some
recent SkylakeX AVX512 kernel issues, provided
by Isuru Fernando and modified by Martin Kroeker,
for usage in the utest suite
* add an Intel SDE SkylakeX emulation utest run to
the Azure CI matrix; a custom Docker build was required
because Ubuntu image provided by Azure does not support
AVX512VL instructions
* Add option USE_LOCKING for single-threaded build with locking support
for calling from concurrent threads
* Add option USE_LOCKING for single-threaded build with locking support
* Add option USE_LOCKING for SMP-like locking in USE_THREAD=0 builds
* Add option USE_LOCKING but keep default settings intact
* Remove unrelated change
* Do not try ancient PGI hacks with recent versions of that compiler
should fix #2139
* Build and run utests in any case, they do their own checks for fortran availability
* Add softfp support in min/max kernels
fix for #1912
* Revert "Add softfp support in min/max kernels"
* Separate implementations of AMAX and IAMAX on arm
As noted in #1912 and comment on #1942, the combined implementation happens to "do the right thing" on hardfp, but cannot return both value and index on softfp where they would have to share the return register
* Ensure correct output for DAMAX with softfp
* Use generic kernels for complex (I)AMAX to support softfp
* improved zgemm power9 based on power8
* upload thread safety test folder
* hook up c++ thread safety test (main Makefile)
* add c++ thread test option to Makefile.rule
* Document NO_AVX512
for #2151
* sgemm pipeline improved, zgemm rewritten without inner packs, ABI lxvx v20 fixed with vs52
* Fix detection of AVX512 capable compilers in getarch
21eda8b5 introduced a check in getarch.c to test if the compiler is capable of
AVX512. This check currently fails, since the used __AVX2__ macro is only
defined if getarch itself was compiled with AVX2/AVX512 support. Make sure this
is the case by building getarch with -march=native on x86_64. It is only
supposed to run on the build host anyway.
* c_check: Unlink correct file
* power9 zgemm ztrmm optimized
* conflict resolve
* Add gfortran workaround for ABI violations in LAPACKE
for #2154 (see gcc bug 90329)
* Add gfortran workaround for ABI violations
for #2154 (see gcc bug 90329)
* Add gfortran workaround for potential ABI violation
for #2154
* Update fc.cmake
* Remove any inadvertent use of -march=native from DYNAMIC_ARCH builds
from #2143, -march=native precludes use of more specific options like -march=skylake-avx512 in individual kernels, and defeats the purpose of dynamic arch anyway.
* Avoid unintentional activation of TLS code via USE_TLS=0
fixes #2149
* Do not force gcc options on non-gcc compilers
fixes compile failure with pgi 18.10 as reported on OpenBLAS-users
* Update Makefile.x86_64
* Zero ecx with a mov instruction
PGI assembler does not like the initialization in the constraints.
* Fix mov syntax
* new sgemm 8x16
* Update dtrmm_kernel_16x4_power8.S
* PGI compiler does not like -march=native
* Fix build on FreeBSD/powerpc64.
Signed-off-by: Piotr Kubaj <pkubaj@anongoth.pl>
* Fix build for PPC970 on FreeBSD pt. 1
FreeBSD needs DCBT_ARG=0 as well.
* Fix build for PPC970 on FreeBSD pt.2
FreeBSD needs those macros too.
* cgemm/ctrmm power9
* Utest needs CBLAS but not necessarily FORTRAN
* Add mingw builds to Appveyor config
* Add getarch flags to disable AVX on x86
(and other small fixes to match Makefile behaviour)
* Make disabling DYNAMIC_ARCH on unsupported systems work
needs to be unset in the cache for the change to have any effect
* Mingw32 needs leading underscore on object names
(also copy BUNDERSCORE settings for FORTRAN from the corresponding Makefile)
7 years ago  rebase? (#1)
* With the Intel compiler on Linux, prefer ifort for the final link step
icc has known problems with mixed-language builds that ifort can handle just fine. Fixes #1956
* Rename operands to put lda on the input/output constraint list
* Fix wrong constraints in inline assembly
for #2009
* Fix inline assembly constraints
rework indices to allow marking argument lda4 as input and output. For #2009
* Fix inline assembly constraints
rework indices to allow marking argument lda as input and output.
* Fix inline assembly constraints
* Fix inline assembly constraints
* Fix inline assembly constraints in Bulldozer TRSM kernels
rework indices to allow marking i,as and bs as both input and output (marked operand n1 as well for simplicity). For #2009
* Correct range_n limiting
same bug as seen in #1388, somehow missed in corresponding PR #1389
* Allow multithreading TRMV again
revert workaround introduced for issue #1332 as the actual cause appears to be my incorrect fix from #1262 (see #1388)
* Fix error introduced during cleanup
* Reduce list of kernels in the dynamic arch build
to make compilation complete reliably within the 1h limit again
* init
* move fix to right place
* Fix missing -c option in AVX512 test
* Fix AVX512 test always returning false due to missing compiler option
* Make x86_32 imply NO_AVX2, NO_AVX512 in addition to NO_AVX
fixes #2033
* Keep xcode8.3 for osx BINARY=32 build
as xcode10 deprecated i386
* Make sure that AVX512 is disabled in 32bit builds
for #2033
* Improve handling of NO_STATIC and NO_SHARED
to avoid surprises from defining either as zero. Fixes #2035 by addressing some concerns from #1422
* init
* address warning introed with #1814 et al
* Restore locking optimizations for OpenMP case
restore another accidentally dropped part of #1468 that was missed in #2004 to address performance regression reported in #1461
* HiSilicon tsv110 CPUs optimization branch
add HiSilicon tsv110 CPUs optimization branch
* add TARGET support for HiSilicon tsv110 CPUs
* add TARGET support for HiSilicon tsv110 CPUs
* add TARGET support for HiSilicon tsv110 CPUs
* Fix module definition conflicts between LAPACK and ReLAPACK
for #2043
* Do not compile in AVX512 check if AVX support is disabled
xgetbv is function depends on NO_AVX being undefined - we could change that too, but that combo is unlikely to work anyway
* ctest.c : add __POWERPC__ for PowerMac
* Fix crash in sgemm SSE/nano kernel on x86_64
Fix bug #2047.
Signed-off-by: Celelibi <celelibi@gmail.com>
* param.h : enable defines for PPC970 on DarwinOS
fixes:
gemm.c: In function 'sgemm_':
../common_param.h:981:18: error: 'SGEMM_DEFAULT_P' undeclared (first use in this function)
#define SGEMM_P SGEMM_DEFAULT_P
^
* common_power.h: force DCBT_ARG 0 on PPC970 Darwin
without this, we see
../kernel/power/gemv_n.S:427:Parameter syntax error
and many more similar entries
that relates to this assembly command
dcbt 8, r24, r18
this change makes the DCBT_ARG = 0
and openblas builds through to completion on PowerMac 970
Tests pass
* Make TARGET=GENERIC compatible with DYNAMIC_ARCH=1
for issue #2048
* make DYNAMIC_ARCH=1 package work on TSV110.
* make DYNAMIC_ARCH=1 package work on TSV110
* Add Intel Denverton
for #2048
* Add Intel Denverton
* Change 64-bit detection as explained in #2056
* Trivial typo fix
as suggested in #2022
* Disable the AVX512 DGEMM kernel (again)
Due to as yet unresolved errors seen in #1955 and #2029
* Use POSIX getenv on Cygwin
The Windows-native GetEnvironmentVariable cannot be relied on, as
Cygwin does not always copy environment variables set through Cygwin
to the Windows environment block, particularly after fork().
* Fix for #2063: The DllMain used in Cygwin did not run the thread memory
pool cleanup upon THREAD_DETACH which is needed when compiled with
USE_TLS=1.
* Also call CloseHandle on each thread, as well as on the event so as to not leak thread handles.
* AIX asm syntax changes needed for shared object creation
* power9 makefile. dgemm based on power8 kernel with following changes : 32x unrolled 16x4 kernel and 8x4 kernel using (lxv stxv butterfly rank1 update). improvement from 17 to 22-23gflops. dtrmm cases were added into dgemm itself
* Expose CBLAS interfaces for I?MIN and I?MAX
* Build CBLAS interfaces for I?MIN and I?MAX
* Add declarations for ?sum and cblas_?sum
* Add interface for ?sum (derived from ?asum)
* Add ?sum
* Add implementations of ssum/dsum and csum/zsum
as trivial copies of asum/zsasum with the fabs calls replaced by fmov to preserve code structure
* Add ARM implementations of ?sum
(trivial copies of the respective ?asum with the fabs calls removed)
* Add ARM64 implementations of ?sum
as trivial copies of the respective ?asum kernels with the fabs calls removed
* Add ia64 implementation of ?sum
as trivial copy of asum with the fabs calls removed
* Add MIPS implementation of ?sum
as trivial copy of ?asum with the fabs calls removed
* Add MIPS64 implementation of ?sum
as trivial copy of ?asum with the fabs replaced by mov to preserve code structure
* Add POWER implementation of ?sum
as trivial copy of ?asum with the fabs replaced by fmr to preserve code structure
* Add SPARC implementation of ?sum
as trivial copy of ?asum with the fabs replaced by fmov to preserve code structure
* Add x86 implementation of ?sum
as trivial copy of ?asum with the fabs calls removed
* Add x86_64 implementation of ?sum
as trivial copy of ?asum with the fabs calls removed
* Add ZARCH implementation of ?sum
as trivial copies of the respective ?asum kernels with the ABS and vflpsb calls removed
* Detect 32bit environment on 64bit ARM hardware
for #2056, using same approach as #2058
* Add cmake defaults for ?sum kernels
* Add ?sum
* Add ?sum definitions for generic kernel
* Add declarations for ?sum
* Add -lm and disable EXPRECISION support on *BSD
fixes #2075
* Add in runtime CPU detection for POWER.
* snprintf define consolidated to common.h
* Support INTERFACE64=1
* Add support for INTERFACE64 and fix XERBLA calls
1. Replaced all instances of "int" with "blasint"
2. Added string length as "hidden" third parameter in calls to fortran XERBLA
* Correct length of name string in xerbla call
* Avoid out-of-bounds accesses in LAPACK EIG tests
see https://github.com/Reference-LAPACK/lapack/issues/333
* Correct INFO=4 condition
* Disable reallocation of work array in xSYTRF
as it appears to cause memory management problems (seen in the LAPACK tests)
* Disable repeated recursion on Ab_BR in ReLAPACK xGBTRF
due to crashes in LAPACK tests
* sgemm/strmm
* Update Changelog with changes from 0.3.6
* Increment version to 0.3.7.dev
* Increment version to 0.3.7.dev
* Misc. typo fixes
Found via `codespell -q 3 -w -L ith,als,dum,nd,amin,nto,wis,ba -S ./relapack,./kernel,./lapack-netlib`
* Correct argument of CPU_ISSET for glibc <2.5
fixes #2104
* conflict resolve
* Revert reference/ fixes
* Revert Changelog.txt typos
* Disable the SkyLakeX DGEMMITCOPY kernel as well
as a stopgap measure for https://github.com/numpy/numpy/issues/13401 as mentioned in #1955
* Disable DGEMMINCOPY as well for now
#1955
* init
* Fix errors in cpu enumeration with glibc 2.6
for #2114
* Change two http links to https
Closes #2109
* remove redundant code #2113
* Set up CI with Azure Pipelines
[skip ci]
* TST: add native POWER8 to CI
* add native POWER8 testing to
Travis CI matrix with ppc64le
os entry
* Update link to IBM MASS library, update cpu support status
* first try migrating one of the arm builds from travis
* fix tabbing in azure commands
* Update azure-pipelines.yml
take out offending lines (although stolen from https://github.com/conda-forge/opencv-feedstock azure-pipelines fiie)
* Update azure-pipelines.yml
* Update azure-pipelines.yml
* Update azure-pipelines.yml
* Update azure-pipelines.yml
* DOC: Add Azure CI status badge
* Add ARMV6 build to azure CI setup (#2122)
using aytekinar's Alpine image and docker script from the Travis setup
[skip ci]
* TST: Azure manylinux1 & clean-up
* remove some of the steps & comments
from the original Azure yml template
* modify the trigger section to use
develop since OpenBLAS primarily uses
this branch; use the same batching
behavior as downstream projects NumPy/
SciPy
* remove Travis emulated ARMv6 gcc build
because this now happens in Azure
* use documented Ubuntu vmImage name for Azure
and add in a manylinux1 test run to the matrix
[skip appveyor]
* Add NO_AFFINITY to available options on Linux, and set it to ON
to match the gmake default. Fixes second part of #2114
* Replace ISMIN and ISAMIN kernels on all x86_64 platforms (#2125)
* Mark iamax_sse.S as unsuitable for MIN due to issue #2116
* Use iamax.S rather than iamax_sse.S for ISMIN/ISAMIN on all x86_64 as workaround for #2116
* Move ARMv8 gcc build from Travis to Azure
* Move ARMv8 gcc build from Travis to Azure
* Update .travis.yml
* Test drone CI
* install make
* remove sudo
* Install gcc
* Install perl
* Install gfortran and add a clang job
* gfortran->gcc-gfortran
* Switch to ubuntu and parallel jobs
* apt update
* Fix typo
* update yes
* no need of gcc in clang build
* Add a cmake build as well
* Add cmake builds and print options
* build without lapack on cmake
* parallel build
* See if ubuntu 19.04 fixes the ICE
* Remove qemu armv8 builds
* arm32 build
* Fix typo
* TST: add SkylakeX AVX512 CI test
* adapt the C-level reproducer code for some
recent SkylakeX AVX512 kernel issues, provided
by Isuru Fernando and modified by Martin Kroeker,
for usage in the utest suite
* add an Intel SDE SkylakeX emulation utest run to
the Azure CI matrix; a custom Docker build was required
because Ubuntu image provided by Azure does not support
AVX512VL instructions
* Add option USE_LOCKING for single-threaded build with locking support
for calling from concurrent threads
* Add option USE_LOCKING for single-threaded build with locking support
* Add option USE_LOCKING for SMP-like locking in USE_THREAD=0 builds
* Add option USE_LOCKING but keep default settings intact
* Remove unrelated change
* Do not try ancient PGI hacks with recent versions of that compiler
should fix #2139
* Build and run utests in any case, they do their own checks for fortran availability
* Add softfp support in min/max kernels
fix for #1912
* Revert "Add softfp support in min/max kernels"
* Separate implementations of AMAX and IAMAX on arm
As noted in #1912 and comment on #1942, the combined implementation happens to "do the right thing" on hardfp, but cannot return both value and index on softfp where they would have to share the return register
* Ensure correct output for DAMAX with softfp
* Use generic kernels for complex (I)AMAX to support softfp
* improved zgemm power9 based on power8
* upload thread safety test folder
* hook up c++ thread safety test (main Makefile)
* add c++ thread test option to Makefile.rule
* Document NO_AVX512
for #2151
* sgemm pipeline improved, zgemm rewritten without inner packs, ABI lxvx v20 fixed with vs52
* Fix detection of AVX512 capable compilers in getarch
21eda8b5 introduced a check in getarch.c to test if the compiler is capable of
AVX512. This check currently fails, since the used __AVX2__ macro is only
defined if getarch itself was compiled with AVX2/AVX512 support. Make sure this
is the case by building getarch with -march=native on x86_64. It is only
supposed to run on the build host anyway.
* c_check: Unlink correct file
* power9 zgemm ztrmm optimized
* conflict resolve
* Add gfortran workaround for ABI violations in LAPACKE
for #2154 (see gcc bug 90329)
* Add gfortran workaround for ABI violations
for #2154 (see gcc bug 90329)
* Add gfortran workaround for potential ABI violation
for #2154
* Update fc.cmake
* Remove any inadvertent use of -march=native from DYNAMIC_ARCH builds
from #2143, -march=native precludes use of more specific options like -march=skylake-avx512 in individual kernels, and defeats the purpose of dynamic arch anyway.
* Avoid unintentional activation of TLS code via USE_TLS=0
fixes #2149
* Do not force gcc options on non-gcc compilers
fixes compile failure with pgi 18.10 as reported on OpenBLAS-users
* Update Makefile.x86_64
* Zero ecx with a mov instruction
PGI assembler does not like the initialization in the constraints.
* Fix mov syntax
* new sgemm 8x16
* Update dtrmm_kernel_16x4_power8.S
* PGI compiler does not like -march=native
* Fix build on FreeBSD/powerpc64.
Signed-off-by: Piotr Kubaj <pkubaj@anongoth.pl>
* Fix build for PPC970 on FreeBSD pt. 1
FreeBSD needs DCBT_ARG=0 as well.
* Fix build for PPC970 on FreeBSD pt.2
FreeBSD needs those macros too.
* cgemm/ctrmm power9
* Utest needs CBLAS but not necessarily FORTRAN
* Add mingw builds to Appveyor config
* Add getarch flags to disable AVX on x86
(and other small fixes to match Makefile behaviour)
* Make disabling DYNAMIC_ARCH on unsupported systems work
needs to be unset in the cache for the change to have any effect
* Mingw32 needs leading underscore on object names
(also copy BUNDERSCORE settings for FORTRAN from the corresponding Makefile)
7 years ago  Simplifying ARMv8 build parameters
ARMv8 builds were a bit mixed up, with ThunderX2 code in ARMv8 mode
(which is not right because TX2 is ARMv8.1) as well as requiring a few
redundancies in the defines, making it harder to maintain and understand
what core has what. A few other minor issues were also fixed.
Tests were made on the following cores: A53, A57, A72, Falkor, ThunderX,
ThunderX2, and XGene.
Tests were: OpenBLAS/test, OpenBLAS/benchmark, BLAS-Tester.
A summary:
* Removed TX2 code from ARMv8 build, to make sure it is compatible with
all ARMv8 cores, not just v8.1. Also, the TX2 code has actually
harmed performance on big cores.
* Commoned up ARMv8 architectures' defines in params.h, to make sure
that all will benefit from ARMv8 settings, in addition to their own.
* Adding a few more cores, using ARMv8's include strategy, to benefit
from compiler optimisations using mtune. Also updated cache
information from the manuals, making sure we set good conservative
values by default. Removed Vulcan, as it's an alias to TX2.
* Auto-detecting most of those cores, but also updating the forced
compilation in getarch.c, to make sure the parameters are the same
whether compiled natively or forced arch.
Benefits:
* ARMv8 build is now guaranteed to work on all ARMv8 cores
* Improved performance for ARMv8 builds on some cores (A72, Falkor,
ThunderX1 and 2: up to 11%) over current develop
* Improved performance for *all* cores comparing to develop branch
before TX2's patch (9% ~ 36%)
* ThunderX1 builds are 14% faster than ARMv8 on TX1, 9% faster than
current develop's branch and 8% faster than deveop before tx2 patches
Issues:
* Regression from current develop branch for A53 (-12%) and A57 (-3%)
with ARMv8 builds, but still faster than before TX2's commit (+15%
and +24% respectively). This can be improved with a simplification of
TX2's code, to be done in future patches. At least the code is
guaranteed to be ARMv8.0 now.
Comments:
* CortexA57 builds are unchanged on A57 hardware from develop's branch,
which makes sense, as it's untouched.
* CortexA72 builds improve over A57 on A72 hardware, even if they're
using the same includes due to new compiler tunning in the makefile.
7 years ago  Simplifying ARMv8 build parameters
ARMv8 builds were a bit mixed up, with ThunderX2 code in ARMv8 mode
(which is not right because TX2 is ARMv8.1) as well as requiring a few
redundancies in the defines, making it harder to maintain and understand
what core has what. A few other minor issues were also fixed.
Tests were made on the following cores: A53, A57, A72, Falkor, ThunderX,
ThunderX2, and XGene.
Tests were: OpenBLAS/test, OpenBLAS/benchmark, BLAS-Tester.
A summary:
* Removed TX2 code from ARMv8 build, to make sure it is compatible with
all ARMv8 cores, not just v8.1. Also, the TX2 code has actually
harmed performance on big cores.
* Commoned up ARMv8 architectures' defines in params.h, to make sure
that all will benefit from ARMv8 settings, in addition to their own.
* Adding a few more cores, using ARMv8's include strategy, to benefit
from compiler optimisations using mtune. Also updated cache
information from the manuals, making sure we set good conservative
values by default. Removed Vulcan, as it's an alias to TX2.
* Auto-detecting most of those cores, but also updating the forced
compilation in getarch.c, to make sure the parameters are the same
whether compiled natively or forced arch.
Benefits:
* ARMv8 build is now guaranteed to work on all ARMv8 cores
* Improved performance for ARMv8 builds on some cores (A72, Falkor,
ThunderX1 and 2: up to 11%) over current develop
* Improved performance for *all* cores comparing to develop branch
before TX2's patch (9% ~ 36%)
* ThunderX1 builds are 14% faster than ARMv8 on TX1, 9% faster than
current develop's branch and 8% faster than deveop before tx2 patches
Issues:
* Regression from current develop branch for A53 (-12%) and A57 (-3%)
with ARMv8 builds, but still faster than before TX2's commit (+15%
and +24% respectively). This can be improved with a simplification of
TX2's code, to be done in future patches. At least the code is
guaranteed to be ARMv8.0 now.
Comments:
* CortexA57 builds are unchanged on A57 hardware from develop's branch,
which makes sense, as it's untouched.
* CortexA72 builds improve over A57 on A72 hardware, even if they're
using the same includes due to new compiler tunning in the makefile.
7 years ago  Simplifying ARMv8 build parameters
ARMv8 builds were a bit mixed up, with ThunderX2 code in ARMv8 mode
(which is not right because TX2 is ARMv8.1) as well as requiring a few
redundancies in the defines, making it harder to maintain and understand
what core has what. A few other minor issues were also fixed.
Tests were made on the following cores: A53, A57, A72, Falkor, ThunderX,
ThunderX2, and XGene.
Tests were: OpenBLAS/test, OpenBLAS/benchmark, BLAS-Tester.
A summary:
* Removed TX2 code from ARMv8 build, to make sure it is compatible with
all ARMv8 cores, not just v8.1. Also, the TX2 code has actually
harmed performance on big cores.
* Commoned up ARMv8 architectures' defines in params.h, to make sure
that all will benefit from ARMv8 settings, in addition to their own.
* Adding a few more cores, using ARMv8's include strategy, to benefit
from compiler optimisations using mtune. Also updated cache
information from the manuals, making sure we set good conservative
values by default. Removed Vulcan, as it's an alias to TX2.
* Auto-detecting most of those cores, but also updating the forced
compilation in getarch.c, to make sure the parameters are the same
whether compiled natively or forced arch.
Benefits:
* ARMv8 build is now guaranteed to work on all ARMv8 cores
* Improved performance for ARMv8 builds on some cores (A72, Falkor,
ThunderX1 and 2: up to 11%) over current develop
* Improved performance for *all* cores comparing to develop branch
before TX2's patch (9% ~ 36%)
* ThunderX1 builds are 14% faster than ARMv8 on TX1, 9% faster than
current develop's branch and 8% faster than deveop before tx2 patches
Issues:
* Regression from current develop branch for A53 (-12%) and A57 (-3%)
with ARMv8 builds, but still faster than before TX2's commit (+15%
and +24% respectively). This can be improved with a simplification of
TX2's code, to be done in future patches. At least the code is
guaranteed to be ARMv8.0 now.
Comments:
* CortexA57 builds are unchanged on A57 hardware from develop's branch,
which makes sense, as it's untouched.
* CortexA72 builds improve over A57 on A72 hardware, even if they're
using the same includes due to new compiler tunning in the makefile.
7 years ago  Simplifying ARMv8 build parameters
ARMv8 builds were a bit mixed up, with ThunderX2 code in ARMv8 mode
(which is not right because TX2 is ARMv8.1) as well as requiring a few
redundancies in the defines, making it harder to maintain and understand
what core has what. A few other minor issues were also fixed.
Tests were made on the following cores: A53, A57, A72, Falkor, ThunderX,
ThunderX2, and XGene.
Tests were: OpenBLAS/test, OpenBLAS/benchmark, BLAS-Tester.
A summary:
* Removed TX2 code from ARMv8 build, to make sure it is compatible with
all ARMv8 cores, not just v8.1. Also, the TX2 code has actually
harmed performance on big cores.
* Commoned up ARMv8 architectures' defines in params.h, to make sure
that all will benefit from ARMv8 settings, in addition to their own.
* Adding a few more cores, using ARMv8's include strategy, to benefit
from compiler optimisations using mtune. Also updated cache
information from the manuals, making sure we set good conservative
values by default. Removed Vulcan, as it's an alias to TX2.
* Auto-detecting most of those cores, but also updating the forced
compilation in getarch.c, to make sure the parameters are the same
whether compiled natively or forced arch.
Benefits:
* ARMv8 build is now guaranteed to work on all ARMv8 cores
* Improved performance for ARMv8 builds on some cores (A72, Falkor,
ThunderX1 and 2: up to 11%) over current develop
* Improved performance for *all* cores comparing to develop branch
before TX2's patch (9% ~ 36%)
* ThunderX1 builds are 14% faster than ARMv8 on TX1, 9% faster than
current develop's branch and 8% faster than deveop before tx2 patches
Issues:
* Regression from current develop branch for A53 (-12%) and A57 (-3%)
with ARMv8 builds, but still faster than before TX2's commit (+15%
and +24% respectively). This can be improved with a simplification of
TX2's code, to be done in future patches. At least the code is
guaranteed to be ARMv8.0 now.
Comments:
* CortexA57 builds are unchanged on A57 hardware from develop's branch,
which makes sense, as it's untouched.
* CortexA72 builds improve over A57 on A72 hardware, even if they're
using the same includes due to new compiler tunning in the makefile.
7 years ago  rebase? (#1)
* With the Intel compiler on Linux, prefer ifort for the final link step
icc has known problems with mixed-language builds that ifort can handle just fine. Fixes #1956
* Rename operands to put lda on the input/output constraint list
* Fix wrong constraints in inline assembly
for #2009
* Fix inline assembly constraints
rework indices to allow marking argument lda4 as input and output. For #2009
* Fix inline assembly constraints
rework indices to allow marking argument lda as input and output.
* Fix inline assembly constraints
* Fix inline assembly constraints
* Fix inline assembly constraints in Bulldozer TRSM kernels
rework indices to allow marking i,as and bs as both input and output (marked operand n1 as well for simplicity). For #2009
* Correct range_n limiting
same bug as seen in #1388, somehow missed in corresponding PR #1389
* Allow multithreading TRMV again
revert workaround introduced for issue #1332 as the actual cause appears to be my incorrect fix from #1262 (see #1388)
* Fix error introduced during cleanup
* Reduce list of kernels in the dynamic arch build
to make compilation complete reliably within the 1h limit again
* init
* move fix to right place
* Fix missing -c option in AVX512 test
* Fix AVX512 test always returning false due to missing compiler option
* Make x86_32 imply NO_AVX2, NO_AVX512 in addition to NO_AVX
fixes #2033
* Keep xcode8.3 for osx BINARY=32 build
as xcode10 deprecated i386
* Make sure that AVX512 is disabled in 32bit builds
for #2033
* Improve handling of NO_STATIC and NO_SHARED
to avoid surprises from defining either as zero. Fixes #2035 by addressing some concerns from #1422
* init
* address warning introed with #1814 et al
* Restore locking optimizations for OpenMP case
restore another accidentally dropped part of #1468 that was missed in #2004 to address performance regression reported in #1461
* HiSilicon tsv110 CPUs optimization branch
add HiSilicon tsv110 CPUs optimization branch
* add TARGET support for HiSilicon tsv110 CPUs
* add TARGET support for HiSilicon tsv110 CPUs
* add TARGET support for HiSilicon tsv110 CPUs
* Fix module definition conflicts between LAPACK and ReLAPACK
for #2043
* Do not compile in AVX512 check if AVX support is disabled
xgetbv is function depends on NO_AVX being undefined - we could change that too, but that combo is unlikely to work anyway
* ctest.c : add __POWERPC__ for PowerMac
* Fix crash in sgemm SSE/nano kernel on x86_64
Fix bug #2047.
Signed-off-by: Celelibi <celelibi@gmail.com>
* param.h : enable defines for PPC970 on DarwinOS
fixes:
gemm.c: In function 'sgemm_':
../common_param.h:981:18: error: 'SGEMM_DEFAULT_P' undeclared (first use in this function)
#define SGEMM_P SGEMM_DEFAULT_P
^
* common_power.h: force DCBT_ARG 0 on PPC970 Darwin
without this, we see
../kernel/power/gemv_n.S:427:Parameter syntax error
and many more similar entries
that relates to this assembly command
dcbt 8, r24, r18
this change makes the DCBT_ARG = 0
and openblas builds through to completion on PowerMac 970
Tests pass
* Make TARGET=GENERIC compatible with DYNAMIC_ARCH=1
for issue #2048
* make DYNAMIC_ARCH=1 package work on TSV110.
* make DYNAMIC_ARCH=1 package work on TSV110
* Add Intel Denverton
for #2048
* Add Intel Denverton
* Change 64-bit detection as explained in #2056
* Trivial typo fix
as suggested in #2022
* Disable the AVX512 DGEMM kernel (again)
Due to as yet unresolved errors seen in #1955 and #2029
* Use POSIX getenv on Cygwin
The Windows-native GetEnvironmentVariable cannot be relied on, as
Cygwin does not always copy environment variables set through Cygwin
to the Windows environment block, particularly after fork().
* Fix for #2063: The DllMain used in Cygwin did not run the thread memory
pool cleanup upon THREAD_DETACH which is needed when compiled with
USE_TLS=1.
* Also call CloseHandle on each thread, as well as on the event so as to not leak thread handles.
* AIX asm syntax changes needed for shared object creation
* power9 makefile. dgemm based on power8 kernel with following changes : 32x unrolled 16x4 kernel and 8x4 kernel using (lxv stxv butterfly rank1 update). improvement from 17 to 22-23gflops. dtrmm cases were added into dgemm itself
* Expose CBLAS interfaces for I?MIN and I?MAX
* Build CBLAS interfaces for I?MIN and I?MAX
* Add declarations for ?sum and cblas_?sum
* Add interface for ?sum (derived from ?asum)
* Add ?sum
* Add implementations of ssum/dsum and csum/zsum
as trivial copies of asum/zsasum with the fabs calls replaced by fmov to preserve code structure
* Add ARM implementations of ?sum
(trivial copies of the respective ?asum with the fabs calls removed)
* Add ARM64 implementations of ?sum
as trivial copies of the respective ?asum kernels with the fabs calls removed
* Add ia64 implementation of ?sum
as trivial copy of asum with the fabs calls removed
* Add MIPS implementation of ?sum
as trivial copy of ?asum with the fabs calls removed
* Add MIPS64 implementation of ?sum
as trivial copy of ?asum with the fabs replaced by mov to preserve code structure
* Add POWER implementation of ?sum
as trivial copy of ?asum with the fabs replaced by fmr to preserve code structure
* Add SPARC implementation of ?sum
as trivial copy of ?asum with the fabs replaced by fmov to preserve code structure
* Add x86 implementation of ?sum
as trivial copy of ?asum with the fabs calls removed
* Add x86_64 implementation of ?sum
as trivial copy of ?asum with the fabs calls removed
* Add ZARCH implementation of ?sum
as trivial copies of the respective ?asum kernels with the ABS and vflpsb calls removed
* Detect 32bit environment on 64bit ARM hardware
for #2056, using same approach as #2058
* Add cmake defaults for ?sum kernels
* Add ?sum
* Add ?sum definitions for generic kernel
* Add declarations for ?sum
* Add -lm and disable EXPRECISION support on *BSD
fixes #2075
* Add in runtime CPU detection for POWER.
* snprintf define consolidated to common.h
* Support INTERFACE64=1
* Add support for INTERFACE64 and fix XERBLA calls
1. Replaced all instances of "int" with "blasint"
2. Added string length as "hidden" third parameter in calls to fortran XERBLA
* Correct length of name string in xerbla call
* Avoid out-of-bounds accesses in LAPACK EIG tests
see https://github.com/Reference-LAPACK/lapack/issues/333
* Correct INFO=4 condition
* Disable reallocation of work array in xSYTRF
as it appears to cause memory management problems (seen in the LAPACK tests)
* Disable repeated recursion on Ab_BR in ReLAPACK xGBTRF
due to crashes in LAPACK tests
* sgemm/strmm
* Update Changelog with changes from 0.3.6
* Increment version to 0.3.7.dev
* Increment version to 0.3.7.dev
* Misc. typo fixes
Found via `codespell -q 3 -w -L ith,als,dum,nd,amin,nto,wis,ba -S ./relapack,./kernel,./lapack-netlib`
* Correct argument of CPU_ISSET for glibc <2.5
fixes #2104
* conflict resolve
* Revert reference/ fixes
* Revert Changelog.txt typos
* Disable the SkyLakeX DGEMMITCOPY kernel as well
as a stopgap measure for https://github.com/numpy/numpy/issues/13401 as mentioned in #1955
* Disable DGEMMINCOPY as well for now
#1955
* init
* Fix errors in cpu enumeration with glibc 2.6
for #2114
* Change two http links to https
Closes #2109
* remove redundant code #2113
* Set up CI with Azure Pipelines
[skip ci]
* TST: add native POWER8 to CI
* add native POWER8 testing to
Travis CI matrix with ppc64le
os entry
* Update link to IBM MASS library, update cpu support status
* first try migrating one of the arm builds from travis
* fix tabbing in azure commands
* Update azure-pipelines.yml
take out offending lines (although stolen from https://github.com/conda-forge/opencv-feedstock azure-pipelines fiie)
* Update azure-pipelines.yml
* Update azure-pipelines.yml
* Update azure-pipelines.yml
* Update azure-pipelines.yml
* DOC: Add Azure CI status badge
* Add ARMV6 build to azure CI setup (#2122)
using aytekinar's Alpine image and docker script from the Travis setup
[skip ci]
* TST: Azure manylinux1 & clean-up
* remove some of the steps & comments
from the original Azure yml template
* modify the trigger section to use
develop since OpenBLAS primarily uses
this branch; use the same batching
behavior as downstream projects NumPy/
SciPy
* remove Travis emulated ARMv6 gcc build
because this now happens in Azure
* use documented Ubuntu vmImage name for Azure
and add in a manylinux1 test run to the matrix
[skip appveyor]
* Add NO_AFFINITY to available options on Linux, and set it to ON
to match the gmake default. Fixes second part of #2114
* Replace ISMIN and ISAMIN kernels on all x86_64 platforms (#2125)
* Mark iamax_sse.S as unsuitable for MIN due to issue #2116
* Use iamax.S rather than iamax_sse.S for ISMIN/ISAMIN on all x86_64 as workaround for #2116
* Move ARMv8 gcc build from Travis to Azure
* Move ARMv8 gcc build from Travis to Azure
* Update .travis.yml
* Test drone CI
* install make
* remove sudo
* Install gcc
* Install perl
* Install gfortran and add a clang job
* gfortran->gcc-gfortran
* Switch to ubuntu and parallel jobs
* apt update
* Fix typo
* update yes
* no need of gcc in clang build
* Add a cmake build as well
* Add cmake builds and print options
* build without lapack on cmake
* parallel build
* See if ubuntu 19.04 fixes the ICE
* Remove qemu armv8 builds
* arm32 build
* Fix typo
* TST: add SkylakeX AVX512 CI test
* adapt the C-level reproducer code for some
recent SkylakeX AVX512 kernel issues, provided
by Isuru Fernando and modified by Martin Kroeker,
for usage in the utest suite
* add an Intel SDE SkylakeX emulation utest run to
the Azure CI matrix; a custom Docker build was required
because Ubuntu image provided by Azure does not support
AVX512VL instructions
* Add option USE_LOCKING for single-threaded build with locking support
for calling from concurrent threads
* Add option USE_LOCKING for single-threaded build with locking support
* Add option USE_LOCKING for SMP-like locking in USE_THREAD=0 builds
* Add option USE_LOCKING but keep default settings intact
* Remove unrelated change
* Do not try ancient PGI hacks with recent versions of that compiler
should fix #2139
* Build and run utests in any case, they do their own checks for fortran availability
* Add softfp support in min/max kernels
fix for #1912
* Revert "Add softfp support in min/max kernels"
* Separate implementations of AMAX and IAMAX on arm
As noted in #1912 and comment on #1942, the combined implementation happens to "do the right thing" on hardfp, but cannot return both value and index on softfp where they would have to share the return register
* Ensure correct output for DAMAX with softfp
* Use generic kernels for complex (I)AMAX to support softfp
* improved zgemm power9 based on power8
* upload thread safety test folder
* hook up c++ thread safety test (main Makefile)
* add c++ thread test option to Makefile.rule
* Document NO_AVX512
for #2151
* sgemm pipeline improved, zgemm rewritten without inner packs, ABI lxvx v20 fixed with vs52
* Fix detection of AVX512 capable compilers in getarch
21eda8b5 introduced a check in getarch.c to test if the compiler is capable of
AVX512. This check currently fails, since the used __AVX2__ macro is only
defined if getarch itself was compiled with AVX2/AVX512 support. Make sure this
is the case by building getarch with -march=native on x86_64. It is only
supposed to run on the build host anyway.
* c_check: Unlink correct file
* power9 zgemm ztrmm optimized
* conflict resolve
* Add gfortran workaround for ABI violations in LAPACKE
for #2154 (see gcc bug 90329)
* Add gfortran workaround for ABI violations
for #2154 (see gcc bug 90329)
* Add gfortran workaround for potential ABI violation
for #2154
* Update fc.cmake
* Remove any inadvertent use of -march=native from DYNAMIC_ARCH builds
from #2143, -march=native precludes use of more specific options like -march=skylake-avx512 in individual kernels, and defeats the purpose of dynamic arch anyway.
* Avoid unintentional activation of TLS code via USE_TLS=0
fixes #2149
* Do not force gcc options on non-gcc compilers
fixes compile failure with pgi 18.10 as reported on OpenBLAS-users
* Update Makefile.x86_64
* Zero ecx with a mov instruction
PGI assembler does not like the initialization in the constraints.
* Fix mov syntax
* new sgemm 8x16
* Update dtrmm_kernel_16x4_power8.S
* PGI compiler does not like -march=native
* Fix build on FreeBSD/powerpc64.
Signed-off-by: Piotr Kubaj <pkubaj@anongoth.pl>
* Fix build for PPC970 on FreeBSD pt. 1
FreeBSD needs DCBT_ARG=0 as well.
* Fix build for PPC970 on FreeBSD pt.2
FreeBSD needs those macros too.
* cgemm/ctrmm power9
* Utest needs CBLAS but not necessarily FORTRAN
* Add mingw builds to Appveyor config
* Add getarch flags to disable AVX on x86
(and other small fixes to match Makefile behaviour)
* Make disabling DYNAMIC_ARCH on unsupported systems work
needs to be unset in the cache for the change to have any effect
* Mingw32 needs leading underscore on object names
(also copy BUNDERSCORE settings for FORTRAN from the corresponding Makefile)
7 years ago  Simplifying ARMv8 build parameters
ARMv8 builds were a bit mixed up, with ThunderX2 code in ARMv8 mode
(which is not right because TX2 is ARMv8.1) as well as requiring a few
redundancies in the defines, making it harder to maintain and understand
what core has what. A few other minor issues were also fixed.
Tests were made on the following cores: A53, A57, A72, Falkor, ThunderX,
ThunderX2, and XGene.
Tests were: OpenBLAS/test, OpenBLAS/benchmark, BLAS-Tester.
A summary:
* Removed TX2 code from ARMv8 build, to make sure it is compatible with
all ARMv8 cores, not just v8.1. Also, the TX2 code has actually
harmed performance on big cores.
* Commoned up ARMv8 architectures' defines in params.h, to make sure
that all will benefit from ARMv8 settings, in addition to their own.
* Adding a few more cores, using ARMv8's include strategy, to benefit
from compiler optimisations using mtune. Also updated cache
information from the manuals, making sure we set good conservative
values by default. Removed Vulcan, as it's an alias to TX2.
* Auto-detecting most of those cores, but also updating the forced
compilation in getarch.c, to make sure the parameters are the same
whether compiled natively or forced arch.
Benefits:
* ARMv8 build is now guaranteed to work on all ARMv8 cores
* Improved performance for ARMv8 builds on some cores (A72, Falkor,
ThunderX1 and 2: up to 11%) over current develop
* Improved performance for *all* cores comparing to develop branch
before TX2's patch (9% ~ 36%)
* ThunderX1 builds are 14% faster than ARMv8 on TX1, 9% faster than
current develop's branch and 8% faster than deveop before tx2 patches
Issues:
* Regression from current develop branch for A53 (-12%) and A57 (-3%)
with ARMv8 builds, but still faster than before TX2's commit (+15%
and +24% respectively). This can be improved with a simplification of
TX2's code, to be done in future patches. At least the code is
guaranteed to be ARMv8.0 now.
Comments:
* CortexA57 builds are unchanged on A57 hardware from develop's branch,
which makes sense, as it's untouched.
* CortexA72 builds improve over A57 on A72 hardware, even if they're
using the same includes due to new compiler tunning in the makefile.
7 years ago  Simplifying ARMv8 build parameters
ARMv8 builds were a bit mixed up, with ThunderX2 code in ARMv8 mode
(which is not right because TX2 is ARMv8.1) as well as requiring a few
redundancies in the defines, making it harder to maintain and understand
what core has what. A few other minor issues were also fixed.
Tests were made on the following cores: A53, A57, A72, Falkor, ThunderX,
ThunderX2, and XGene.
Tests were: OpenBLAS/test, OpenBLAS/benchmark, BLAS-Tester.
A summary:
* Removed TX2 code from ARMv8 build, to make sure it is compatible with
all ARMv8 cores, not just v8.1. Also, the TX2 code has actually
harmed performance on big cores.
* Commoned up ARMv8 architectures' defines in params.h, to make sure
that all will benefit from ARMv8 settings, in addition to their own.
* Adding a few more cores, using ARMv8's include strategy, to benefit
from compiler optimisations using mtune. Also updated cache
information from the manuals, making sure we set good conservative
values by default. Removed Vulcan, as it's an alias to TX2.
* Auto-detecting most of those cores, but also updating the forced
compilation in getarch.c, to make sure the parameters are the same
whether compiled natively or forced arch.
Benefits:
* ARMv8 build is now guaranteed to work on all ARMv8 cores
* Improved performance for ARMv8 builds on some cores (A72, Falkor,
ThunderX1 and 2: up to 11%) over current develop
* Improved performance for *all* cores comparing to develop branch
before TX2's patch (9% ~ 36%)
* ThunderX1 builds are 14% faster than ARMv8 on TX1, 9% faster than
current develop's branch and 8% faster than deveop before tx2 patches
Issues:
* Regression from current develop branch for A53 (-12%) and A57 (-3%)
with ARMv8 builds, but still faster than before TX2's commit (+15%
and +24% respectively). This can be improved with a simplification of
TX2's code, to be done in future patches. At least the code is
guaranteed to be ARMv8.0 now.
Comments:
* CortexA57 builds are unchanged on A57 hardware from develop's branch,
which makes sense, as it's untouched.
* CortexA72 builds improve over A57 on A72 hardware, even if they're
using the same includes due to new compiler tunning in the makefile.
7 years ago  Simplifying ARMv8 build parameters
ARMv8 builds were a bit mixed up, with ThunderX2 code in ARMv8 mode
(which is not right because TX2 is ARMv8.1) as well as requiring a few
redundancies in the defines, making it harder to maintain and understand
what core has what. A few other minor issues were also fixed.
Tests were made on the following cores: A53, A57, A72, Falkor, ThunderX,
ThunderX2, and XGene.
Tests were: OpenBLAS/test, OpenBLAS/benchmark, BLAS-Tester.
A summary:
* Removed TX2 code from ARMv8 build, to make sure it is compatible with
all ARMv8 cores, not just v8.1. Also, the TX2 code has actually
harmed performance on big cores.
* Commoned up ARMv8 architectures' defines in params.h, to make sure
that all will benefit from ARMv8 settings, in addition to their own.
* Adding a few more cores, using ARMv8's include strategy, to benefit
from compiler optimisations using mtune. Also updated cache
information from the manuals, making sure we set good conservative
values by default. Removed Vulcan, as it's an alias to TX2.
* Auto-detecting most of those cores, but also updating the forced
compilation in getarch.c, to make sure the parameters are the same
whether compiled natively or forced arch.
Benefits:
* ARMv8 build is now guaranteed to work on all ARMv8 cores
* Improved performance for ARMv8 builds on some cores (A72, Falkor,
ThunderX1 and 2: up to 11%) over current develop
* Improved performance for *all* cores comparing to develop branch
before TX2's patch (9% ~ 36%)
* ThunderX1 builds are 14% faster than ARMv8 on TX1, 9% faster than
current develop's branch and 8% faster than deveop before tx2 patches
Issues:
* Regression from current develop branch for A53 (-12%) and A57 (-3%)
with ARMv8 builds, but still faster than before TX2's commit (+15%
and +24% respectively). This can be improved with a simplification of
TX2's code, to be done in future patches. At least the code is
guaranteed to be ARMv8.0 now.
Comments:
* CortexA57 builds are unchanged on A57 hardware from develop's branch,
which makes sense, as it's untouched.
* CortexA72 builds improve over A57 on A72 hardware, even if they're
using the same includes due to new compiler tunning in the makefile.
7 years ago  Simplifying ARMv8 build parameters
ARMv8 builds were a bit mixed up, with ThunderX2 code in ARMv8 mode
(which is not right because TX2 is ARMv8.1) as well as requiring a few
redundancies in the defines, making it harder to maintain and understand
what core has what. A few other minor issues were also fixed.
Tests were made on the following cores: A53, A57, A72, Falkor, ThunderX,
ThunderX2, and XGene.
Tests were: OpenBLAS/test, OpenBLAS/benchmark, BLAS-Tester.
A summary:
* Removed TX2 code from ARMv8 build, to make sure it is compatible with
all ARMv8 cores, not just v8.1. Also, the TX2 code has actually
harmed performance on big cores.
* Commoned up ARMv8 architectures' defines in params.h, to make sure
that all will benefit from ARMv8 settings, in addition to their own.
* Adding a few more cores, using ARMv8's include strategy, to benefit
from compiler optimisations using mtune. Also updated cache
information from the manuals, making sure we set good conservative
values by default. Removed Vulcan, as it's an alias to TX2.
* Auto-detecting most of those cores, but also updating the forced
compilation in getarch.c, to make sure the parameters are the same
whether compiled natively or forced arch.
Benefits:
* ARMv8 build is now guaranteed to work on all ARMv8 cores
* Improved performance for ARMv8 builds on some cores (A72, Falkor,
ThunderX1 and 2: up to 11%) over current develop
* Improved performance for *all* cores comparing to develop branch
before TX2's patch (9% ~ 36%)
* ThunderX1 builds are 14% faster than ARMv8 on TX1, 9% faster than
current develop's branch and 8% faster than deveop before tx2 patches
Issues:
* Regression from current develop branch for A53 (-12%) and A57 (-3%)
with ARMv8 builds, but still faster than before TX2's commit (+15%
and +24% respectively). This can be improved with a simplification of
TX2's code, to be done in future patches. At least the code is
guaranteed to be ARMv8.0 now.
Comments:
* CortexA57 builds are unchanged on A57 hardware from develop's branch,
which makes sense, as it's untouched.
* CortexA72 builds improve over A57 on A72 hardware, even if they're
using the same includes due to new compiler tunning in the makefile.
7 years ago  Simplifying ARMv8 build parameters
ARMv8 builds were a bit mixed up, with ThunderX2 code in ARMv8 mode
(which is not right because TX2 is ARMv8.1) as well as requiring a few
redundancies in the defines, making it harder to maintain and understand
what core has what. A few other minor issues were also fixed.
Tests were made on the following cores: A53, A57, A72, Falkor, ThunderX,
ThunderX2, and XGene.
Tests were: OpenBLAS/test, OpenBLAS/benchmark, BLAS-Tester.
A summary:
* Removed TX2 code from ARMv8 build, to make sure it is compatible with
all ARMv8 cores, not just v8.1. Also, the TX2 code has actually
harmed performance on big cores.
* Commoned up ARMv8 architectures' defines in params.h, to make sure
that all will benefit from ARMv8 settings, in addition to their own.
* Adding a few more cores, using ARMv8's include strategy, to benefit
from compiler optimisations using mtune. Also updated cache
information from the manuals, making sure we set good conservative
values by default. Removed Vulcan, as it's an alias to TX2.
* Auto-detecting most of those cores, but also updating the forced
compilation in getarch.c, to make sure the parameters are the same
whether compiled natively or forced arch.
Benefits:
* ARMv8 build is now guaranteed to work on all ARMv8 cores
* Improved performance for ARMv8 builds on some cores (A72, Falkor,
ThunderX1 and 2: up to 11%) over current develop
* Improved performance for *all* cores comparing to develop branch
before TX2's patch (9% ~ 36%)
* ThunderX1 builds are 14% faster than ARMv8 on TX1, 9% faster than
current develop's branch and 8% faster than deveop before tx2 patches
Issues:
* Regression from current develop branch for A53 (-12%) and A57 (-3%)
with ARMv8 builds, but still faster than before TX2's commit (+15%
and +24% respectively). This can be improved with a simplification of
TX2's code, to be done in future patches. At least the code is
guaranteed to be ARMv8.0 now.
Comments:
* CortexA57 builds are unchanged on A57 hardware from develop's branch,
which makes sense, as it's untouched.
* CortexA72 builds improve over A57 on A72 hardware, even if they're
using the same includes due to new compiler tunning in the makefile.
7 years ago  Simplifying ARMv8 build parameters
ARMv8 builds were a bit mixed up, with ThunderX2 code in ARMv8 mode
(which is not right because TX2 is ARMv8.1) as well as requiring a few
redundancies in the defines, making it harder to maintain and understand
what core has what. A few other minor issues were also fixed.
Tests were made on the following cores: A53, A57, A72, Falkor, ThunderX,
ThunderX2, and XGene.
Tests were: OpenBLAS/test, OpenBLAS/benchmark, BLAS-Tester.
A summary:
* Removed TX2 code from ARMv8 build, to make sure it is compatible with
all ARMv8 cores, not just v8.1. Also, the TX2 code has actually
harmed performance on big cores.
* Commoned up ARMv8 architectures' defines in params.h, to make sure
that all will benefit from ARMv8 settings, in addition to their own.
* Adding a few more cores, using ARMv8's include strategy, to benefit
from compiler optimisations using mtune. Also updated cache
information from the manuals, making sure we set good conservative
values by default. Removed Vulcan, as it's an alias to TX2.
* Auto-detecting most of those cores, but also updating the forced
compilation in getarch.c, to make sure the parameters are the same
whether compiled natively or forced arch.
Benefits:
* ARMv8 build is now guaranteed to work on all ARMv8 cores
* Improved performance for ARMv8 builds on some cores (A72, Falkor,
ThunderX1 and 2: up to 11%) over current develop
* Improved performance for *all* cores comparing to develop branch
before TX2's patch (9% ~ 36%)
* ThunderX1 builds are 14% faster than ARMv8 on TX1, 9% faster than
current develop's branch and 8% faster than deveop before tx2 patches
Issues:
* Regression from current develop branch for A53 (-12%) and A57 (-3%)
with ARMv8 builds, but still faster than before TX2's commit (+15%
and +24% respectively). This can be improved with a simplification of
TX2's code, to be done in future patches. At least the code is
guaranteed to be ARMv8.0 now.
Comments:
* CortexA57 builds are unchanged on A57 hardware from develop's branch,
which makes sense, as it's untouched.
* CortexA72 builds improve over A57 on A72 hardware, even if they're
using the same includes due to new compiler tunning in the makefile.
7 years ago  Simplifying ARMv8 build parameters
ARMv8 builds were a bit mixed up, with ThunderX2 code in ARMv8 mode
(which is not right because TX2 is ARMv8.1) as well as requiring a few
redundancies in the defines, making it harder to maintain and understand
what core has what. A few other minor issues were also fixed.
Tests were made on the following cores: A53, A57, A72, Falkor, ThunderX,
ThunderX2, and XGene.
Tests were: OpenBLAS/test, OpenBLAS/benchmark, BLAS-Tester.
A summary:
* Removed TX2 code from ARMv8 build, to make sure it is compatible with
all ARMv8 cores, not just v8.1. Also, the TX2 code has actually
harmed performance on big cores.
* Commoned up ARMv8 architectures' defines in params.h, to make sure
that all will benefit from ARMv8 settings, in addition to their own.
* Adding a few more cores, using ARMv8's include strategy, to benefit
from compiler optimisations using mtune. Also updated cache
information from the manuals, making sure we set good conservative
values by default. Removed Vulcan, as it's an alias to TX2.
* Auto-detecting most of those cores, but also updating the forced
compilation in getarch.c, to make sure the parameters are the same
whether compiled natively or forced arch.
Benefits:
* ARMv8 build is now guaranteed to work on all ARMv8 cores
* Improved performance for ARMv8 builds on some cores (A72, Falkor,
ThunderX1 and 2: up to 11%) over current develop
* Improved performance for *all* cores comparing to develop branch
before TX2's patch (9% ~ 36%)
* ThunderX1 builds are 14% faster than ARMv8 on TX1, 9% faster than
current develop's branch and 8% faster than deveop before tx2 patches
Issues:
* Regression from current develop branch for A53 (-12%) and A57 (-3%)
with ARMv8 builds, but still faster than before TX2's commit (+15%
and +24% respectively). This can be improved with a simplification of
TX2's code, to be done in future patches. At least the code is
guaranteed to be ARMv8.0 now.
Comments:
* CortexA57 builds are unchanged on A57 hardware from develop's branch,
which makes sense, as it's untouched.
* CortexA72 builds improve over A57 on A72 hardware, even if they're
using the same includes due to new compiler tunning in the makefile.
7 years ago  Simplifying ARMv8 build parameters
ARMv8 builds were a bit mixed up, with ThunderX2 code in ARMv8 mode
(which is not right because TX2 is ARMv8.1) as well as requiring a few
redundancies in the defines, making it harder to maintain and understand
what core has what. A few other minor issues were also fixed.
Tests were made on the following cores: A53, A57, A72, Falkor, ThunderX,
ThunderX2, and XGene.
Tests were: OpenBLAS/test, OpenBLAS/benchmark, BLAS-Tester.
A summary:
* Removed TX2 code from ARMv8 build, to make sure it is compatible with
all ARMv8 cores, not just v8.1. Also, the TX2 code has actually
harmed performance on big cores.
* Commoned up ARMv8 architectures' defines in params.h, to make sure
that all will benefit from ARMv8 settings, in addition to their own.
* Adding a few more cores, using ARMv8's include strategy, to benefit
from compiler optimisations using mtune. Also updated cache
information from the manuals, making sure we set good conservative
values by default. Removed Vulcan, as it's an alias to TX2.
* Auto-detecting most of those cores, but also updating the forced
compilation in getarch.c, to make sure the parameters are the same
whether compiled natively or forced arch.
Benefits:
* ARMv8 build is now guaranteed to work on all ARMv8 cores
* Improved performance for ARMv8 builds on some cores (A72, Falkor,
ThunderX1 and 2: up to 11%) over current develop
* Improved performance for *all* cores comparing to develop branch
before TX2's patch (9% ~ 36%)
* ThunderX1 builds are 14% faster than ARMv8 on TX1, 9% faster than
current develop's branch and 8% faster than deveop before tx2 patches
Issues:
* Regression from current develop branch for A53 (-12%) and A57 (-3%)
with ARMv8 builds, but still faster than before TX2's commit (+15%
and +24% respectively). This can be improved with a simplification of
TX2's code, to be done in future patches. At least the code is
guaranteed to be ARMv8.0 now.
Comments:
* CortexA57 builds are unchanged on A57 hardware from develop's branch,
which makes sense, as it's untouched.
* CortexA72 builds improve over A57 on A72 hardware, even if they're
using the same includes due to new compiler tunning in the makefile.
7 years ago  Simplifying ARMv8 build parameters
ARMv8 builds were a bit mixed up, with ThunderX2 code in ARMv8 mode
(which is not right because TX2 is ARMv8.1) as well as requiring a few
redundancies in the defines, making it harder to maintain and understand
what core has what. A few other minor issues were also fixed.
Tests were made on the following cores: A53, A57, A72, Falkor, ThunderX,
ThunderX2, and XGene.
Tests were: OpenBLAS/test, OpenBLAS/benchmark, BLAS-Tester.
A summary:
* Removed TX2 code from ARMv8 build, to make sure it is compatible with
all ARMv8 cores, not just v8.1. Also, the TX2 code has actually
harmed performance on big cores.
* Commoned up ARMv8 architectures' defines in params.h, to make sure
that all will benefit from ARMv8 settings, in addition to their own.
* Adding a few more cores, using ARMv8's include strategy, to benefit
from compiler optimisations using mtune. Also updated cache
information from the manuals, making sure we set good conservative
values by default. Removed Vulcan, as it's an alias to TX2.
* Auto-detecting most of those cores, but also updating the forced
compilation in getarch.c, to make sure the parameters are the same
whether compiled natively or forced arch.
Benefits:
* ARMv8 build is now guaranteed to work on all ARMv8 cores
* Improved performance for ARMv8 builds on some cores (A72, Falkor,
ThunderX1 and 2: up to 11%) over current develop
* Improved performance for *all* cores comparing to develop branch
before TX2's patch (9% ~ 36%)
* ThunderX1 builds are 14% faster than ARMv8 on TX1, 9% faster than
current develop's branch and 8% faster than deveop before tx2 patches
Issues:
* Regression from current develop branch for A53 (-12%) and A57 (-3%)
with ARMv8 builds, but still faster than before TX2's commit (+15%
and +24% respectively). This can be improved with a simplification of
TX2's code, to be done in future patches. At least the code is
guaranteed to be ARMv8.0 now.
Comments:
* CortexA57 builds are unchanged on A57 hardware from develop's branch,
which makes sense, as it's untouched.
* CortexA72 builds improve over A57 on A72 hardware, even if they're
using the same includes due to new compiler tunning in the makefile.
7 years ago  rebase? (#1)
* With the Intel compiler on Linux, prefer ifort for the final link step
icc has known problems with mixed-language builds that ifort can handle just fine. Fixes #1956
* Rename operands to put lda on the input/output constraint list
* Fix wrong constraints in inline assembly
for #2009
* Fix inline assembly constraints
rework indices to allow marking argument lda4 as input and output. For #2009
* Fix inline assembly constraints
rework indices to allow marking argument lda as input and output.
* Fix inline assembly constraints
* Fix inline assembly constraints
* Fix inline assembly constraints in Bulldozer TRSM kernels
rework indices to allow marking i,as and bs as both input and output (marked operand n1 as well for simplicity). For #2009
* Correct range_n limiting
same bug as seen in #1388, somehow missed in corresponding PR #1389
* Allow multithreading TRMV again
revert workaround introduced for issue #1332 as the actual cause appears to be my incorrect fix from #1262 (see #1388)
* Fix error introduced during cleanup
* Reduce list of kernels in the dynamic arch build
to make compilation complete reliably within the 1h limit again
* init
* move fix to right place
* Fix missing -c option in AVX512 test
* Fix AVX512 test always returning false due to missing compiler option
* Make x86_32 imply NO_AVX2, NO_AVX512 in addition to NO_AVX
fixes #2033
* Keep xcode8.3 for osx BINARY=32 build
as xcode10 deprecated i386
* Make sure that AVX512 is disabled in 32bit builds
for #2033
* Improve handling of NO_STATIC and NO_SHARED
to avoid surprises from defining either as zero. Fixes #2035 by addressing some concerns from #1422
* init
* address warning introed with #1814 et al
* Restore locking optimizations for OpenMP case
restore another accidentally dropped part of #1468 that was missed in #2004 to address performance regression reported in #1461
* HiSilicon tsv110 CPUs optimization branch
add HiSilicon tsv110 CPUs optimization branch
* add TARGET support for HiSilicon tsv110 CPUs
* add TARGET support for HiSilicon tsv110 CPUs
* add TARGET support for HiSilicon tsv110 CPUs
* Fix module definition conflicts between LAPACK and ReLAPACK
for #2043
* Do not compile in AVX512 check if AVX support is disabled
xgetbv is function depends on NO_AVX being undefined - we could change that too, but that combo is unlikely to work anyway
* ctest.c : add __POWERPC__ for PowerMac
* Fix crash in sgemm SSE/nano kernel on x86_64
Fix bug #2047.
Signed-off-by: Celelibi <celelibi@gmail.com>
* param.h : enable defines for PPC970 on DarwinOS
fixes:
gemm.c: In function 'sgemm_':
../common_param.h:981:18: error: 'SGEMM_DEFAULT_P' undeclared (first use in this function)
#define SGEMM_P SGEMM_DEFAULT_P
^
* common_power.h: force DCBT_ARG 0 on PPC970 Darwin
without this, we see
../kernel/power/gemv_n.S:427:Parameter syntax error
and many more similar entries
that relates to this assembly command
dcbt 8, r24, r18
this change makes the DCBT_ARG = 0
and openblas builds through to completion on PowerMac 970
Tests pass
* Make TARGET=GENERIC compatible with DYNAMIC_ARCH=1
for issue #2048
* make DYNAMIC_ARCH=1 package work on TSV110.
* make DYNAMIC_ARCH=1 package work on TSV110
* Add Intel Denverton
for #2048
* Add Intel Denverton
* Change 64-bit detection as explained in #2056
* Trivial typo fix
as suggested in #2022
* Disable the AVX512 DGEMM kernel (again)
Due to as yet unresolved errors seen in #1955 and #2029
* Use POSIX getenv on Cygwin
The Windows-native GetEnvironmentVariable cannot be relied on, as
Cygwin does not always copy environment variables set through Cygwin
to the Windows environment block, particularly after fork().
* Fix for #2063: The DllMain used in Cygwin did not run the thread memory
pool cleanup upon THREAD_DETACH which is needed when compiled with
USE_TLS=1.
* Also call CloseHandle on each thread, as well as on the event so as to not leak thread handles.
* AIX asm syntax changes needed for shared object creation
* power9 makefile. dgemm based on power8 kernel with following changes : 32x unrolled 16x4 kernel and 8x4 kernel using (lxv stxv butterfly rank1 update). improvement from 17 to 22-23gflops. dtrmm cases were added into dgemm itself
* Expose CBLAS interfaces for I?MIN and I?MAX
* Build CBLAS interfaces for I?MIN and I?MAX
* Add declarations for ?sum and cblas_?sum
* Add interface for ?sum (derived from ?asum)
* Add ?sum
* Add implementations of ssum/dsum and csum/zsum
as trivial copies of asum/zsasum with the fabs calls replaced by fmov to preserve code structure
* Add ARM implementations of ?sum
(trivial copies of the respective ?asum with the fabs calls removed)
* Add ARM64 implementations of ?sum
as trivial copies of the respective ?asum kernels with the fabs calls removed
* Add ia64 implementation of ?sum
as trivial copy of asum with the fabs calls removed
* Add MIPS implementation of ?sum
as trivial copy of ?asum with the fabs calls removed
* Add MIPS64 implementation of ?sum
as trivial copy of ?asum with the fabs replaced by mov to preserve code structure
* Add POWER implementation of ?sum
as trivial copy of ?asum with the fabs replaced by fmr to preserve code structure
* Add SPARC implementation of ?sum
as trivial copy of ?asum with the fabs replaced by fmov to preserve code structure
* Add x86 implementation of ?sum
as trivial copy of ?asum with the fabs calls removed
* Add x86_64 implementation of ?sum
as trivial copy of ?asum with the fabs calls removed
* Add ZARCH implementation of ?sum
as trivial copies of the respective ?asum kernels with the ABS and vflpsb calls removed
* Detect 32bit environment on 64bit ARM hardware
for #2056, using same approach as #2058
* Add cmake defaults for ?sum kernels
* Add ?sum
* Add ?sum definitions for generic kernel
* Add declarations for ?sum
* Add -lm and disable EXPRECISION support on *BSD
fixes #2075
* Add in runtime CPU detection for POWER.
* snprintf define consolidated to common.h
* Support INTERFACE64=1
* Add support for INTERFACE64 and fix XERBLA calls
1. Replaced all instances of "int" with "blasint"
2. Added string length as "hidden" third parameter in calls to fortran XERBLA
* Correct length of name string in xerbla call
* Avoid out-of-bounds accesses in LAPACK EIG tests
see https://github.com/Reference-LAPACK/lapack/issues/333
* Correct INFO=4 condition
* Disable reallocation of work array in xSYTRF
as it appears to cause memory management problems (seen in the LAPACK tests)
* Disable repeated recursion on Ab_BR in ReLAPACK xGBTRF
due to crashes in LAPACK tests
* sgemm/strmm
* Update Changelog with changes from 0.3.6
* Increment version to 0.3.7.dev
* Increment version to 0.3.7.dev
* Misc. typo fixes
Found via `codespell -q 3 -w -L ith,als,dum,nd,amin,nto,wis,ba -S ./relapack,./kernel,./lapack-netlib`
* Correct argument of CPU_ISSET for glibc <2.5
fixes #2104
* conflict resolve
* Revert reference/ fixes
* Revert Changelog.txt typos
* Disable the SkyLakeX DGEMMITCOPY kernel as well
as a stopgap measure for https://github.com/numpy/numpy/issues/13401 as mentioned in #1955
* Disable DGEMMINCOPY as well for now
#1955
* init
* Fix errors in cpu enumeration with glibc 2.6
for #2114
* Change two http links to https
Closes #2109
* remove redundant code #2113
* Set up CI with Azure Pipelines
[skip ci]
* TST: add native POWER8 to CI
* add native POWER8 testing to
Travis CI matrix with ppc64le
os entry
* Update link to IBM MASS library, update cpu support status
* first try migrating one of the arm builds from travis
* fix tabbing in azure commands
* Update azure-pipelines.yml
take out offending lines (although stolen from https://github.com/conda-forge/opencv-feedstock azure-pipelines fiie)
* Update azure-pipelines.yml
* Update azure-pipelines.yml
* Update azure-pipelines.yml
* Update azure-pipelines.yml
* DOC: Add Azure CI status badge
* Add ARMV6 build to azure CI setup (#2122)
using aytekinar's Alpine image and docker script from the Travis setup
[skip ci]
* TST: Azure manylinux1 & clean-up
* remove some of the steps & comments
from the original Azure yml template
* modify the trigger section to use
develop since OpenBLAS primarily uses
this branch; use the same batching
behavior as downstream projects NumPy/
SciPy
* remove Travis emulated ARMv6 gcc build
because this now happens in Azure
* use documented Ubuntu vmImage name for Azure
and add in a manylinux1 test run to the matrix
[skip appveyor]
* Add NO_AFFINITY to available options on Linux, and set it to ON
to match the gmake default. Fixes second part of #2114
* Replace ISMIN and ISAMIN kernels on all x86_64 platforms (#2125)
* Mark iamax_sse.S as unsuitable for MIN due to issue #2116
* Use iamax.S rather than iamax_sse.S for ISMIN/ISAMIN on all x86_64 as workaround for #2116
* Move ARMv8 gcc build from Travis to Azure
* Move ARMv8 gcc build from Travis to Azure
* Update .travis.yml
* Test drone CI
* install make
* remove sudo
* Install gcc
* Install perl
* Install gfortran and add a clang job
* gfortran->gcc-gfortran
* Switch to ubuntu and parallel jobs
* apt update
* Fix typo
* update yes
* no need of gcc in clang build
* Add a cmake build as well
* Add cmake builds and print options
* build without lapack on cmake
* parallel build
* See if ubuntu 19.04 fixes the ICE
* Remove qemu armv8 builds
* arm32 build
* Fix typo
* TST: add SkylakeX AVX512 CI test
* adapt the C-level reproducer code for some
recent SkylakeX AVX512 kernel issues, provided
by Isuru Fernando and modified by Martin Kroeker,
for usage in the utest suite
* add an Intel SDE SkylakeX emulation utest run to
the Azure CI matrix; a custom Docker build was required
because Ubuntu image provided by Azure does not support
AVX512VL instructions
* Add option USE_LOCKING for single-threaded build with locking support
for calling from concurrent threads
* Add option USE_LOCKING for single-threaded build with locking support
* Add option USE_LOCKING for SMP-like locking in USE_THREAD=0 builds
* Add option USE_LOCKING but keep default settings intact
* Remove unrelated change
* Do not try ancient PGI hacks with recent versions of that compiler
should fix #2139
* Build and run utests in any case, they do their own checks for fortran availability
* Add softfp support in min/max kernels
fix for #1912
* Revert "Add softfp support in min/max kernels"
* Separate implementations of AMAX and IAMAX on arm
As noted in #1912 and comment on #1942, the combined implementation happens to "do the right thing" on hardfp, but cannot return both value and index on softfp where they would have to share the return register
* Ensure correct output for DAMAX with softfp
* Use generic kernels for complex (I)AMAX to support softfp
* improved zgemm power9 based on power8
* upload thread safety test folder
* hook up c++ thread safety test (main Makefile)
* add c++ thread test option to Makefile.rule
* Document NO_AVX512
for #2151
* sgemm pipeline improved, zgemm rewritten without inner packs, ABI lxvx v20 fixed with vs52
* Fix detection of AVX512 capable compilers in getarch
21eda8b5 introduced a check in getarch.c to test if the compiler is capable of
AVX512. This check currently fails, since the used __AVX2__ macro is only
defined if getarch itself was compiled with AVX2/AVX512 support. Make sure this
is the case by building getarch with -march=native on x86_64. It is only
supposed to run on the build host anyway.
* c_check: Unlink correct file
* power9 zgemm ztrmm optimized
* conflict resolve
* Add gfortran workaround for ABI violations in LAPACKE
for #2154 (see gcc bug 90329)
* Add gfortran workaround for ABI violations
for #2154 (see gcc bug 90329)
* Add gfortran workaround for potential ABI violation
for #2154
* Update fc.cmake
* Remove any inadvertent use of -march=native from DYNAMIC_ARCH builds
from #2143, -march=native precludes use of more specific options like -march=skylake-avx512 in individual kernels, and defeats the purpose of dynamic arch anyway.
* Avoid unintentional activation of TLS code via USE_TLS=0
fixes #2149
* Do not force gcc options on non-gcc compilers
fixes compile failure with pgi 18.10 as reported on OpenBLAS-users
* Update Makefile.x86_64
* Zero ecx with a mov instruction
PGI assembler does not like the initialization in the constraints.
* Fix mov syntax
* new sgemm 8x16
* Update dtrmm_kernel_16x4_power8.S
* PGI compiler does not like -march=native
* Fix build on FreeBSD/powerpc64.
Signed-off-by: Piotr Kubaj <pkubaj@anongoth.pl>
* Fix build for PPC970 on FreeBSD pt. 1
FreeBSD needs DCBT_ARG=0 as well.
* Fix build for PPC970 on FreeBSD pt.2
FreeBSD needs those macros too.
* cgemm/ctrmm power9
* Utest needs CBLAS but not necessarily FORTRAN
* Add mingw builds to Appveyor config
* Add getarch flags to disable AVX on x86
(and other small fixes to match Makefile behaviour)
* Make disabling DYNAMIC_ARCH on unsupported systems work
needs to be unset in the cache for the change to have any effect
* Mingw32 needs leading underscore on object names
(also copy BUNDERSCORE settings for FORTRAN from the corresponding Makefile)
7 years ago |
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- /*****************************************************************************
- Copyright (c) 2011-2014, The OpenBLAS Project
- All rights reserved.
-
- Redistribution and use in source and binary forms, with or without
- modification, are permitted provided that the following conditions are
- met:
-
- 1. Redistributions of source code must retain the above copyright
- notice, this list of conditions and the following disclaimer.
-
- 2. Redistributions in binary form must reproduce the above copyright
- notice, this list of conditions and the following disclaimer in
- the documentation and/or other materials provided with the
- distribution.
- 3. Neither the name of the OpenBLAS project nor the names of
- its contributors may be used to endorse or promote products
- derived from this software without specific prior written
- permission.
-
- THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
- LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
- SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
- CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
- OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
- USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-
- **********************************************************************************/
-
- /*********************************************************************/
- /* Copyright 2009, 2010 The University of Texas at Austin. */
- /* All rights reserved. */
- /* */
- /* Redistribution and use in source and binary forms, with or */
- /* without modification, are permitted provided that the following */
- /* conditions are met: */
- /* */
- /* 1. Redistributions of source code must retain the above */
- /* copyright notice, this list of conditions and the following */
- /* disclaimer. */
- /* */
- /* 2. Redistributions in binary form must reproduce the above */
- /* copyright notice, this list of conditions and the following */
- /* disclaimer in the documentation and/or other materials */
- /* provided with the distribution. */
- /* */
- /* THIS SOFTWARE IS PROVIDED BY THE UNIVERSITY OF TEXAS AT */
- /* AUSTIN ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, */
- /* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF */
- /* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE */
- /* DISCLAIMED. IN NO EVENT SHALL THE UNIVERSITY OF TEXAS AT */
- /* AUSTIN OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, */
- /* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES */
- /* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE */
- /* GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR */
- /* BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF */
- /* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT */
- /* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT */
- /* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE */
- /* POSSIBILITY OF SUCH DAMAGE. */
- /* */
- /* The views and conclusions contained in the software and */
- /* documentation are those of the authors and should not be */
- /* interpreted as representing official policies, either expressed */
- /* or implied, of The University of Texas at Austin. */
- /*********************************************************************/
-
- #ifndef PARAM_H
- #define PARAM_H
-
- #ifdef OPTERON
-
- #define SNUMOPT 4
- #define DNUMOPT 2
-
- #define GEMM_DEFAULT_OFFSET_A 64
- #define GEMM_DEFAULT_OFFSET_B 256
- #define GEMM_DEFAULT_ALIGN 0x01ffffUL
-
- #define SGEMM_DEFAULT_UNROLL_N 4
- #define DGEMM_DEFAULT_UNROLL_N 4
- #define QGEMM_DEFAULT_UNROLL_N 2
- #define CGEMM_DEFAULT_UNROLL_N 2
- #define ZGEMM_DEFAULT_UNROLL_N 2
- #define XGEMM_DEFAULT_UNROLL_N 1
-
- #ifdef ARCH_X86
- #define SGEMM_DEFAULT_UNROLL_M 4
- #define DGEMM_DEFAULT_UNROLL_M 2
- #define QGEMM_DEFAULT_UNROLL_M 2
- #define CGEMM_DEFAULT_UNROLL_M 2
- #define ZGEMM_DEFAULT_UNROLL_M 1
- #define XGEMM_DEFAULT_UNROLL_M 1
- #else
- #define SGEMM_DEFAULT_UNROLL_M 8
- #define DGEMM_DEFAULT_UNROLL_M 4
- #define QGEMM_DEFAULT_UNROLL_M 2
- #define CGEMM_DEFAULT_UNROLL_M 4
- #define ZGEMM_DEFAULT_UNROLL_M 2
- #define XGEMM_DEFAULT_UNROLL_M 1
- #endif
-
- #define SGEMM_DEFAULT_P sgemm_p
- #define DGEMM_DEFAULT_P dgemm_p
- #define QGEMM_DEFAULT_P qgemm_p
- #define CGEMM_DEFAULT_P cgemm_p
- #define ZGEMM_DEFAULT_P zgemm_p
- #define XGEMM_DEFAULT_P xgemm_p
-
- #define SGEMM_DEFAULT_R sgemm_r
- #define DGEMM_DEFAULT_R dgemm_r
- #define QGEMM_DEFAULT_R qgemm_r
- #define CGEMM_DEFAULT_R cgemm_r
- #define ZGEMM_DEFAULT_R zgemm_r
- #define XGEMM_DEFAULT_R xgemm_r
-
- #ifdef ALLOC_HUGETLB
-
- #define SGEMM_DEFAULT_Q 248
- #define DGEMM_DEFAULT_Q 248
- #define QGEMM_DEFAULT_Q 248
- #define CGEMM_DEFAULT_Q 248
- #define ZGEMM_DEFAULT_Q 248
- #define XGEMM_DEFAULT_Q 248
-
- #else
-
- #define SGEMM_DEFAULT_Q 240
- #define DGEMM_DEFAULT_Q 240
- #define QGEMM_DEFAULT_Q 240
- #define CGEMM_DEFAULT_Q 240
- #define ZGEMM_DEFAULT_Q 240
- #define XGEMM_DEFAULT_Q 240
-
- #endif
-
-
- #define SYMV_P 16
- #define HAVE_EXCLUSIVE_CACHE
-
- #endif
-
- #if defined(BARCELONA) || defined(SHANGHAI) || defined(BOBCAT)
-
- #define SNUMOPT 8
- #define DNUMOPT 4
-
- #define GEMM_DEFAULT_OFFSET_A 64
- #define GEMM_DEFAULT_OFFSET_B 832
- #define GEMM_DEFAULT_ALIGN 0x0fffUL
-
- #define SGEMM_DEFAULT_UNROLL_N 4
- #define DGEMM_DEFAULT_UNROLL_N 4
- #define QGEMM_DEFAULT_UNROLL_N 2
- #define CGEMM_DEFAULT_UNROLL_N 2
- #define ZGEMM_DEFAULT_UNROLL_N 2
- #define XGEMM_DEFAULT_UNROLL_N 1
-
- #ifdef ARCH_X86
- #define SGEMM_DEFAULT_UNROLL_M 4
- #define DGEMM_DEFAULT_UNROLL_M 2
- #define QGEMM_DEFAULT_UNROLL_M 2
- #define CGEMM_DEFAULT_UNROLL_M 2
- #define ZGEMM_DEFAULT_UNROLL_M 1
- #define XGEMM_DEFAULT_UNROLL_M 1
- #else
- #define SGEMM_DEFAULT_UNROLL_M 8
- #define DGEMM_DEFAULT_UNROLL_M 4
- #define QGEMM_DEFAULT_UNROLL_M 2
- #define CGEMM_DEFAULT_UNROLL_M 4
- #define ZGEMM_DEFAULT_UNROLL_M 2
- #define XGEMM_DEFAULT_UNROLL_M 1
- #endif
-
- #if 0
- #define SGEMM_DEFAULT_P 496
- #define DGEMM_DEFAULT_P 248
- #define QGEMM_DEFAULT_P 124
- #define CGEMM_DEFAULT_P 248
- #define ZGEMM_DEFAULT_P 124
- #define XGEMM_DEFAULT_P 62
-
- #define SGEMM_DEFAULT_Q 248
- #define DGEMM_DEFAULT_Q 248
- #define QGEMM_DEFAULT_Q 248
- #define CGEMM_DEFAULT_Q 248
- #define ZGEMM_DEFAULT_Q 248
- #define XGEMM_DEFAULT_Q 248
-
- #else
-
- #define SGEMM_DEFAULT_P 448
- #define DGEMM_DEFAULT_P 224
- #define QGEMM_DEFAULT_P 112
- #define CGEMM_DEFAULT_P 224
- #define ZGEMM_DEFAULT_P 112
- #define XGEMM_DEFAULT_P 56
-
- #define SGEMM_DEFAULT_Q 224
- #define DGEMM_DEFAULT_Q 224
- #define QGEMM_DEFAULT_Q 224
- #define CGEMM_DEFAULT_Q 224
- #define ZGEMM_DEFAULT_Q 224
- #define XGEMM_DEFAULT_Q 224
-
- #endif
-
- #define SGEMM_DEFAULT_R sgemm_r
- #define QGEMM_DEFAULT_R qgemm_r
- #define DGEMM_DEFAULT_R dgemm_r
- #define CGEMM_DEFAULT_R cgemm_r
- #define ZGEMM_DEFAULT_R zgemm_r
- #define XGEMM_DEFAULT_R xgemm_r
-
- #define SYMV_P 16
- #define HAVE_EXCLUSIVE_CACHE
-
- #define GEMM_THREAD gemm_thread_mn
-
- #endif
-
-
- #ifdef BULLDOZER
-
- #define SNUMOPT 8
- #define DNUMOPT 4
-
- #define GEMM_DEFAULT_OFFSET_A 64
- #define GEMM_DEFAULT_OFFSET_B 832
- #define GEMM_DEFAULT_ALIGN 0x0fffUL
-
-
-
- #define QGEMM_DEFAULT_UNROLL_N 2
- #define CGEMM_DEFAULT_UNROLL_N 2
- #define ZGEMM_DEFAULT_UNROLL_N 2
- #define XGEMM_DEFAULT_UNROLL_N 1
-
- #ifdef ARCH_X86
- #define SGEMM_DEFAULT_UNROLL_N 4
- #define DGEMM_DEFAULT_UNROLL_N 4
- #define SGEMM_DEFAULT_UNROLL_M 4
- #define DGEMM_DEFAULT_UNROLL_M 2
- #define QGEMM_DEFAULT_UNROLL_M 2
- #define CGEMM_DEFAULT_UNROLL_M 2
- #define ZGEMM_DEFAULT_UNROLL_M 1
- #define XGEMM_DEFAULT_UNROLL_M 1
- #else
- #define SGEMM_DEFAULT_UNROLL_N 2
- #define DGEMM_DEFAULT_UNROLL_N 2
- #define SGEMM_DEFAULT_UNROLL_M 16
- #define DGEMM_DEFAULT_UNROLL_M 8
- #define QGEMM_DEFAULT_UNROLL_M 2
- #define CGEMM_DEFAULT_UNROLL_M 4
- #define ZGEMM_DEFAULT_UNROLL_M 2
- #define XGEMM_DEFAULT_UNROLL_M 1
- #define CGEMM3M_DEFAULT_UNROLL_N 4
- #define CGEMM3M_DEFAULT_UNROLL_M 8
- #define ZGEMM3M_DEFAULT_UNROLL_N 4
- #define ZGEMM3M_DEFAULT_UNROLL_M 4
-
- #define DGEMM_DEFAULT_UNROLL_MN 16
- #define GEMV_UNROLL 8
- #endif
-
-
- #if defined(ARCH_X86_64)
- #define SGEMM_DEFAULT_P 768
- #define DGEMM_DEFAULT_P 384
- #else
- #define SGEMM_DEFAULT_P 448
- #define DGEMM_DEFAULT_P 224
- #endif
-
- #define QGEMM_DEFAULT_P 112
- #define CGEMM_DEFAULT_P 224
- #define ZGEMM_DEFAULT_P 112
- #define XGEMM_DEFAULT_P 56
-
- #if defined(ARCH_X86_64)
- #define SGEMM_DEFAULT_Q 168
- #define DGEMM_DEFAULT_Q 168
- #else
- #define SGEMM_DEFAULT_Q 224
- #define DGEMM_DEFAULT_Q 224
- #endif
-
- #define QGEMM_DEFAULT_Q 224
- #define CGEMM_DEFAULT_Q 224
- #define ZGEMM_DEFAULT_Q 224
- #define XGEMM_DEFAULT_Q 224
-
- #define CGEMM3M_DEFAULT_P 448
- #define ZGEMM3M_DEFAULT_P 224
- #define XGEMM3M_DEFAULT_P 112
- #define CGEMM3M_DEFAULT_Q 224
- #define ZGEMM3M_DEFAULT_Q 224
- #define XGEMM3M_DEFAULT_Q 224
- #define CGEMM3M_DEFAULT_R 12288
- #define ZGEMM3M_DEFAULT_R 12288
- #define XGEMM3M_DEFAULT_R 12288
-
- #define SGEMM_DEFAULT_R sgemm_r
- #define QGEMM_DEFAULT_R qgemm_r
- #define DGEMM_DEFAULT_R dgemm_r
- #define CGEMM_DEFAULT_R cgemm_r
- #define ZGEMM_DEFAULT_R zgemm_r
- #define XGEMM_DEFAULT_R xgemm_r
-
- #define SYMV_P 16
- #define HAVE_EXCLUSIVE_CACHE
-
- #define GEMM_THREAD gemm_thread_mn
-
- #endif
-
- #ifdef PILEDRIVER
- #define SNUMOPT 8
- #define DNUMOPT 4
-
- #define GEMM_DEFAULT_OFFSET_A 64
- #define GEMM_DEFAULT_OFFSET_B 832
- #define GEMM_DEFAULT_ALIGN 0x0fffUL
-
-
-
- #define QGEMM_DEFAULT_UNROLL_N 2
- #define CGEMM_DEFAULT_UNROLL_N 2
- #define ZGEMM_DEFAULT_UNROLL_N 2
- #define XGEMM_DEFAULT_UNROLL_N 1
-
- #ifdef ARCH_X86
- #define SGEMM_DEFAULT_UNROLL_N 4
- #define DGEMM_DEFAULT_UNROLL_N 4
- #define SGEMM_DEFAULT_UNROLL_M 4
- #define DGEMM_DEFAULT_UNROLL_M 2
- #define QGEMM_DEFAULT_UNROLL_M 2
- #define CGEMM_DEFAULT_UNROLL_M 2
- #define ZGEMM_DEFAULT_UNROLL_M 1
- #define XGEMM_DEFAULT_UNROLL_M 1
- #else
- #define SGEMM_DEFAULT_UNROLL_N 2
- #define DGEMM_DEFAULT_UNROLL_N 2
- #define SGEMM_DEFAULT_UNROLL_M 16
- #define DGEMM_DEFAULT_UNROLL_M 8
- #define QGEMM_DEFAULT_UNROLL_M 2
- #define CGEMM_DEFAULT_UNROLL_M 4
- #define ZGEMM_DEFAULT_UNROLL_M 2
- #define XGEMM_DEFAULT_UNROLL_M 1
- #define CGEMM3M_DEFAULT_UNROLL_N 4
- #define CGEMM3M_DEFAULT_UNROLL_M 8
- #define ZGEMM3M_DEFAULT_UNROLL_N 4
- #define ZGEMM3M_DEFAULT_UNROLL_M 4
- #define GEMV_UNROLL 8
- #endif
-
- #if defined(ARCH_X86_64)
- #define SGEMM_DEFAULT_P 768
- #define DGEMM_DEFAULT_P 768
- #define ZGEMM_DEFAULT_P 384
- #define CGEMM_DEFAULT_P 768
- #else
- #define SGEMM_DEFAULT_P 448
- #define DGEMM_DEFAULT_P 480
- #define ZGEMM_DEFAULT_P 112
- #define CGEMM_DEFAULT_P 224
- #endif
- #define QGEMM_DEFAULT_P 112
- #define XGEMM_DEFAULT_P 56
-
- #if defined(ARCH_X86_64)
- #define SGEMM_DEFAULT_Q 192
- #define DGEMM_DEFAULT_Q 168
- #define ZGEMM_DEFAULT_Q 168
- #define CGEMM_DEFAULT_Q 168
- #else
- #define SGEMM_DEFAULT_Q 224
- #define DGEMM_DEFAULT_Q 224
- #define ZGEMM_DEFAULT_Q 224
- #define CGEMM_DEFAULT_Q 224
- #endif
- #define QGEMM_DEFAULT_Q 224
- #define XGEMM_DEFAULT_Q 224
-
- #define CGEMM3M_DEFAULT_P 448
- #define ZGEMM3M_DEFAULT_P 224
- #define XGEMM3M_DEFAULT_P 112
- #define CGEMM3M_DEFAULT_Q 224
- #define ZGEMM3M_DEFAULT_Q 224
- #define XGEMM3M_DEFAULT_Q 224
- #define CGEMM3M_DEFAULT_R 12288
- #define ZGEMM3M_DEFAULT_R 12288
- #define XGEMM3M_DEFAULT_R 12288
-
- #define SGEMM_DEFAULT_R 12288
- #define QGEMM_DEFAULT_R qgemm_r
- #define DGEMM_DEFAULT_R 12288
- #define CGEMM_DEFAULT_R cgemm_r
- #define ZGEMM_DEFAULT_R zgemm_r
- #define XGEMM_DEFAULT_R xgemm_r
-
- #define SYMV_P 16
- #define HAVE_EXCLUSIVE_CACHE
-
- #define GEMM_THREAD gemm_thread_mn
-
- #endif
-
- #ifdef STEAMROLLER
- #define SNUMOPT 8
- #define DNUMOPT 4
-
- #define GEMM_DEFAULT_OFFSET_A 64
- #define GEMM_DEFAULT_OFFSET_B 832
- #define GEMM_DEFAULT_ALIGN 0x0fffUL
-
-
-
- #define QGEMM_DEFAULT_UNROLL_N 2
- #define CGEMM_DEFAULT_UNROLL_N 2
- #define ZGEMM_DEFAULT_UNROLL_N 2
- #define XGEMM_DEFAULT_UNROLL_N 1
-
- #ifdef ARCH_X86
- #define SGEMM_DEFAULT_UNROLL_N 4
- #define DGEMM_DEFAULT_UNROLL_N 4
- #define SGEMM_DEFAULT_UNROLL_M 4
- #define DGEMM_DEFAULT_UNROLL_M 2
- #define QGEMM_DEFAULT_UNROLL_M 2
- #define CGEMM_DEFAULT_UNROLL_M 2
- #define ZGEMM_DEFAULT_UNROLL_M 1
- #define XGEMM_DEFAULT_UNROLL_M 1
- #else
- #define SGEMM_DEFAULT_UNROLL_N 2
- #define DGEMM_DEFAULT_UNROLL_N 2
- #define SGEMM_DEFAULT_UNROLL_M 16
- #define DGEMM_DEFAULT_UNROLL_M 8
- #define QGEMM_DEFAULT_UNROLL_M 2
- #define CGEMM_DEFAULT_UNROLL_M 4
- #define ZGEMM_DEFAULT_UNROLL_M 2
- #define XGEMM_DEFAULT_UNROLL_M 1
- #define CGEMM3M_DEFAULT_UNROLL_N 4
- #define CGEMM3M_DEFAULT_UNROLL_M 8
- #define ZGEMM3M_DEFAULT_UNROLL_N 4
- #define ZGEMM3M_DEFAULT_UNROLL_M 4
- #define GEMV_UNROLL 8
- #endif
-
- #if defined(ARCH_X86_64)
- #define SGEMM_DEFAULT_P 768
- #define DGEMM_DEFAULT_P 576
- #define ZGEMM_DEFAULT_P 288
- #define CGEMM_DEFAULT_P 576
- #else
- #define SGEMM_DEFAULT_P 448
- #define DGEMM_DEFAULT_P 480
- #define ZGEMM_DEFAULT_P 112
- #define CGEMM_DEFAULT_P 224
- #endif
- #define QGEMM_DEFAULT_P 112
- #define XGEMM_DEFAULT_P 56
-
- #if defined(ARCH_X86_64)
- #define SGEMM_DEFAULT_Q 192
- #define DGEMM_DEFAULT_Q 160
- #define ZGEMM_DEFAULT_Q 160
- #define CGEMM_DEFAULT_Q 160
- #else
- #define SGEMM_DEFAULT_Q 224
- #define DGEMM_DEFAULT_Q 224
- #define ZGEMM_DEFAULT_Q 224
- #define CGEMM_DEFAULT_Q 224
- #endif
- #define QGEMM_DEFAULT_Q 224
- #define XGEMM_DEFAULT_Q 224
-
- #define CGEMM3M_DEFAULT_P 448
- #define ZGEMM3M_DEFAULT_P 224
- #define XGEMM3M_DEFAULT_P 112
- #define CGEMM3M_DEFAULT_Q 224
- #define ZGEMM3M_DEFAULT_Q 224
- #define XGEMM3M_DEFAULT_Q 224
- #define CGEMM3M_DEFAULT_R 12288
- #define ZGEMM3M_DEFAULT_R 12288
- #define XGEMM3M_DEFAULT_R 12288
-
- #define SGEMM_DEFAULT_R 12288
- #define QGEMM_DEFAULT_R qgemm_r
- #define DGEMM_DEFAULT_R 12288
- #define CGEMM_DEFAULT_R cgemm_r
- #define ZGEMM_DEFAULT_R zgemm_r
- #define XGEMM_DEFAULT_R xgemm_r
-
- #define SYMV_P 16
- #define HAVE_EXCLUSIVE_CACHE
-
- #define GEMM_THREAD gemm_thread_mn
-
- #endif
-
-
- #ifdef EXCAVATOR
- #define SNUMOPT 8
- #define DNUMOPT 4
-
- #define GEMM_DEFAULT_OFFSET_A 64
- #define GEMM_DEFAULT_OFFSET_B 832
- #define GEMM_DEFAULT_ALIGN 0x0fffUL
-
-
-
- #define QGEMM_DEFAULT_UNROLL_N 2
- #define CGEMM_DEFAULT_UNROLL_N 2
- #define ZGEMM_DEFAULT_UNROLL_N 2
- #define XGEMM_DEFAULT_UNROLL_N 1
-
- #ifdef ARCH_X86
- #define SGEMM_DEFAULT_UNROLL_N 4
- #define DGEMM_DEFAULT_UNROLL_N 4
- #define SGEMM_DEFAULT_UNROLL_M 4
- #define DGEMM_DEFAULT_UNROLL_M 2
- #define QGEMM_DEFAULT_UNROLL_M 2
- #define CGEMM_DEFAULT_UNROLL_M 2
- #define ZGEMM_DEFAULT_UNROLL_M 1
- #define XGEMM_DEFAULT_UNROLL_M 1
- #else
- #define SGEMM_DEFAULT_UNROLL_N 2
- #define DGEMM_DEFAULT_UNROLL_N 2
- #define SGEMM_DEFAULT_UNROLL_M 16
- #define DGEMM_DEFAULT_UNROLL_M 8
- #define QGEMM_DEFAULT_UNROLL_M 2
- #define CGEMM_DEFAULT_UNROLL_M 4
- #define ZGEMM_DEFAULT_UNROLL_M 2
- #define XGEMM_DEFAULT_UNROLL_M 1
- #define CGEMM3M_DEFAULT_UNROLL_N 4
- #define CGEMM3M_DEFAULT_UNROLL_M 8
- #define ZGEMM3M_DEFAULT_UNROLL_N 4
- #define ZGEMM3M_DEFAULT_UNROLL_M 4
- #define GEMV_UNROLL 8
- #endif
-
- #if defined(ARCH_X86_64)
- #define SGEMM_DEFAULT_P 768
- #define DGEMM_DEFAULT_P 576
- #define ZGEMM_DEFAULT_P 288
- #define CGEMM_DEFAULT_P 576
- #else
- #define SGEMM_DEFAULT_P 448
- #define DGEMM_DEFAULT_P 480
- #define ZGEMM_DEFAULT_P 112
- #define CGEMM_DEFAULT_P 224
- #endif
- #define QGEMM_DEFAULT_P 112
- #define XGEMM_DEFAULT_P 56
-
- #if defined(ARCH_X86_64)
- #define SGEMM_DEFAULT_Q 192
- #define DGEMM_DEFAULT_Q 160
- #define ZGEMM_DEFAULT_Q 160
- #define CGEMM_DEFAULT_Q 160
- #else
- #define SGEMM_DEFAULT_Q 224
- #define DGEMM_DEFAULT_Q 224
- #define ZGEMM_DEFAULT_Q 224
- #define CGEMM_DEFAULT_Q 224
- #endif
- #define QGEMM_DEFAULT_Q 224
- #define XGEMM_DEFAULT_Q 224
-
- #define CGEMM3M_DEFAULT_P 448
- #define ZGEMM3M_DEFAULT_P 224
- #define XGEMM3M_DEFAULT_P 112
- #define CGEMM3M_DEFAULT_Q 224
- #define ZGEMM3M_DEFAULT_Q 224
- #define XGEMM3M_DEFAULT_Q 224
- #define CGEMM3M_DEFAULT_R 12288
- #define ZGEMM3M_DEFAULT_R 12288
- #define XGEMM3M_DEFAULT_R 12288
-
- #define SGEMM_DEFAULT_R 12288
- #define QGEMM_DEFAULT_R qgemm_r
- #define DGEMM_DEFAULT_R 12288
- #define CGEMM_DEFAULT_R cgemm_r
- #define ZGEMM_DEFAULT_R zgemm_r
- #define XGEMM_DEFAULT_R xgemm_r
-
- #define SYMV_P 16
- #define HAVE_EXCLUSIVE_CACHE
-
- #define GEMM_THREAD gemm_thread_mn
-
- #endif
-
- #ifdef ZEN
- #define SNUMOPT 16
- #define DNUMOPT 8
-
- #define GEMM_DEFAULT_OFFSET_A 0
- #define GEMM_DEFAULT_OFFSET_B 0
- #define GEMM_DEFAULT_ALIGN 0x03fffUL
-
- #define SYMV_P 8
-
- #define SWITCH_RATIO 16
-
- #ifdef ARCH_X86
-
- #define SGEMM_DEFAULT_UNROLL_M 4
- #define DGEMM_DEFAULT_UNROLL_M 2
- #define QGEMM_DEFAULT_UNROLL_M 2
- #define CGEMM_DEFAULT_UNROLL_M 2
- #define ZGEMM_DEFAULT_UNROLL_M 1
- #define XGEMM_DEFAULT_UNROLL_M 1
-
- #define SGEMM_DEFAULT_UNROLL_N 4
- #define DGEMM_DEFAULT_UNROLL_N 4
- #define QGEMM_DEFAULT_UNROLL_N 2
- #define CGEMM_DEFAULT_UNROLL_N 2
- #define ZGEMM_DEFAULT_UNROLL_N 2
- #define XGEMM_DEFAULT_UNROLL_N 1
-
- #else
-
- #define SGEMM_DEFAULT_UNROLL_M 16
- #define DGEMM_DEFAULT_UNROLL_M 4
- #define QGEMM_DEFAULT_UNROLL_M 2
- #define CGEMM_DEFAULT_UNROLL_M 8
- #define ZGEMM_DEFAULT_UNROLL_M 4
- #define XGEMM_DEFAULT_UNROLL_M 1
-
- #define SGEMM_DEFAULT_UNROLL_N 4
- #define DGEMM_DEFAULT_UNROLL_N 8
- #define QGEMM_DEFAULT_UNROLL_N 2
- #define CGEMM_DEFAULT_UNROLL_N 2
- #define ZGEMM_DEFAULT_UNROLL_N 2
- #define XGEMM_DEFAULT_UNROLL_N 1
-
- #define SGEMM_DEFAULT_UNROLL_MN 32
- #define DGEMM_DEFAULT_UNROLL_MN 32
- #endif
-
- #ifdef ARCH_X86
-
- #define SGEMM_DEFAULT_P 512
- #define SGEMM_DEFAULT_R sgemm_r
- #define DGEMM_DEFAULT_P 512
- #define DGEMM_DEFAULT_R dgemm_r
- #define QGEMM_DEFAULT_P 504
- #define QGEMM_DEFAULT_R qgemm_r
- #define CGEMM_DEFAULT_P 128
- #define CGEMM_DEFAULT_R 1024
- #define ZGEMM_DEFAULT_P 512
- #define ZGEMM_DEFAULT_R zgemm_r
- #define XGEMM_DEFAULT_P 252
- #define XGEMM_DEFAULT_R xgemm_r
- #define SGEMM_DEFAULT_Q 256
- #define DGEMM_DEFAULT_Q 256
- #define QGEMM_DEFAULT_Q 128
- #define CGEMM_DEFAULT_Q 256
- #define ZGEMM_DEFAULT_Q 192
- #define XGEMM_DEFAULT_Q 128
-
- #else
-
- #define SGEMM_DEFAULT_P 768
- #define DGEMM_DEFAULT_P 512
- #define CGEMM_DEFAULT_P 384
- #define ZGEMM_DEFAULT_P 256
-
- #ifdef WINDOWS_ABI
- #define SGEMM_DEFAULT_Q 320
- #define DGEMM_DEFAULT_Q 128
- #else
- #define SGEMM_DEFAULT_Q 384
- #define DGEMM_DEFAULT_Q 256
- #endif
- #define CGEMM_DEFAULT_Q 192
- #define ZGEMM_DEFAULT_Q 128
-
- #define SGEMM_DEFAULT_R sgemm_r
- #define DGEMM_DEFAULT_R 13824
- #define CGEMM_DEFAULT_R cgemm_r
- #define ZGEMM_DEFAULT_R zgemm_r
-
- #define QGEMM_DEFAULT_Q 128
- #define QGEMM_DEFAULT_P 504
- #define QGEMM_DEFAULT_R qgemm_r
- #define XGEMM_DEFAULT_P 252
- #define XGEMM_DEFAULT_R xgemm_r
- #define XGEMM_DEFAULT_Q 128
-
- #define CGEMM3M_DEFAULT_UNROLL_N 8
- #define CGEMM3M_DEFAULT_UNROLL_M 4
- #define ZGEMM3M_DEFAULT_UNROLL_N 8
- #define ZGEMM3M_DEFAULT_UNROLL_M 2
-
- #define CGEMM3M_DEFAULT_P 448
- #define ZGEMM3M_DEFAULT_P 224
- #define XGEMM3M_DEFAULT_P 112
- #define CGEMM3M_DEFAULT_Q 224
- #define ZGEMM3M_DEFAULT_Q 224
- #define XGEMM3M_DEFAULT_Q 224
- #define CGEMM3M_DEFAULT_R 12288
- #define ZGEMM3M_DEFAULT_R 12288
- #define XGEMM3M_DEFAULT_R 12288
-
- #endif
-
- #endif
-
- #ifdef ATHLON
-
- #define SNUMOPT 4
- #define DNUMOPT 2
-
- #define GEMM_DEFAULT_OFFSET_A 0
- #define GEMM_DEFAULT_OFFSET_B 384
- #define GEMM_DEFAULT_ALIGN 0x0ffffUL
-
- #define SGEMM_DEFAULT_UNROLL_N 4
- #define DGEMM_DEFAULT_UNROLL_N 4
- #define QGEMM_DEFAULT_UNROLL_N 2
- #define CGEMM_DEFAULT_UNROLL_N 2
- #define ZGEMM_DEFAULT_UNROLL_N 2
- #define XGEMM_DEFAULT_UNROLL_N 1
-
- #define SGEMM_DEFAULT_UNROLL_M 2
- #define DGEMM_DEFAULT_UNROLL_M 1
- #define QGEMM_DEFAULT_UNROLL_M 2
- #define CGEMM_DEFAULT_UNROLL_M 1
- #define ZGEMM_DEFAULT_UNROLL_M 1
- #define XGEMM_DEFAULT_UNROLL_M 1
-
- #define SGEMM_DEFAULT_R sgemm_r
- #define DGEMM_DEFAULT_R dgemm_r
- #define QGEMM_DEFAULT_R qgemm_r
- #define CGEMM_DEFAULT_R cgemm_r
- #define ZGEMM_DEFAULT_R zgemm_r
- #define XGEMM_DEFAULT_R xgemm_r
-
- #define SGEMM_DEFAULT_P 208
- #define DGEMM_DEFAULT_P 104
- #define QGEMM_DEFAULT_P 56
- #define CGEMM_DEFAULT_P 104
- #define ZGEMM_DEFAULT_P 56
- #define XGEMM_DEFAULT_P 28
-
- #define SGEMM_DEFAULT_Q 208
- #define DGEMM_DEFAULT_Q 208
- #define QGEMM_DEFAULT_Q 208
- #define CGEMM_DEFAULT_Q 208
- #define ZGEMM_DEFAULT_Q 208
- #define XGEMM_DEFAULT_Q 208
-
- #define SYMV_P 16
- #define HAVE_EXCLUSIVE_CACHE
- #endif
-
- #ifdef VIAC3
-
- #define SNUMOPT 2
- #define DNUMOPT 1
-
- #define GEMM_DEFAULT_OFFSET_A 0
- #define GEMM_DEFAULT_OFFSET_B 256
- #define GEMM_DEFAULT_ALIGN 0x0ffffUL
-
- #define SGEMM_DEFAULT_UNROLL_N 4
- #define DGEMM_DEFAULT_UNROLL_N 4
- #define QGEMM_DEFAULT_UNROLL_N 2
- #define CGEMM_DEFAULT_UNROLL_N 2
- #define ZGEMM_DEFAULT_UNROLL_N 2
- #define XGEMM_DEFAULT_UNROLL_N 1
-
- #define SGEMM_DEFAULT_UNROLL_M 2
- #define DGEMM_DEFAULT_UNROLL_M 1
- #define QGEMM_DEFAULT_UNROLL_M 2
- #define CGEMM_DEFAULT_UNROLL_M 1
- #define ZGEMM_DEFAULT_UNROLL_M 1
- #define XGEMM_DEFAULT_UNROLL_M 1
-
- #define SGEMM_DEFAULT_R sgemm_r
- #define DGEMM_DEFAULT_R dgemm_r
- #define QGEMM_DEFAULT_R qgemm_r
- #define CGEMM_DEFAULT_R cgemm_r
- #define ZGEMM_DEFAULT_R zgemm_r
- #define XGEMM_DEFAULT_R xgemm_r
-
- #define SGEMM_DEFAULT_P 128
- #define DGEMM_DEFAULT_P 128
- #define QGEMM_DEFAULT_P 128
- #define CGEMM_DEFAULT_P 128
- #define ZGEMM_DEFAULT_P 128
- #define XGEMM_DEFAULT_P 128
-
- #define SGEMM_DEFAULT_Q 512
- #define DGEMM_DEFAULT_Q 256
- #define QGEMM_DEFAULT_Q 256
- #define CGEMM_DEFAULT_Q 256
- #define ZGEMM_DEFAULT_Q 128
- #define XGEMM_DEFAULT_Q 128
-
- #define SYMV_P 16
- #endif
-
- #ifdef NANO
-
- #define SNUMOPT 4
- #define DNUMOPT 2
-
- #define GEMM_DEFAULT_OFFSET_A 64
- #define GEMM_DEFAULT_OFFSET_B 256
- #define GEMM_DEFAULT_ALIGN 0x01ffffUL
-
- #ifdef ARCH_X86
- #define SGEMM_DEFAULT_UNROLL_N 4
- #define DGEMM_DEFAULT_UNROLL_N 4
- #define QGEMM_DEFAULT_UNROLL_N 2
- #define CGEMM_DEFAULT_UNROLL_N 2
- #define ZGEMM_DEFAULT_UNROLL_N 2
- #define XGEMM_DEFAULT_UNROLL_N 1
-
- #define SGEMM_DEFAULT_UNROLL_M 4
- #define DGEMM_DEFAULT_UNROLL_M 2
- #define QGEMM_DEFAULT_UNROLL_M 2
- #define CGEMM_DEFAULT_UNROLL_M 2
- #define ZGEMM_DEFAULT_UNROLL_M 1
- #define XGEMM_DEFAULT_UNROLL_M 1
- #else
- #define SGEMM_DEFAULT_UNROLL_N 8
- #define DGEMM_DEFAULT_UNROLL_N 4
- #define QGEMM_DEFAULT_UNROLL_N 2
- #define CGEMM_DEFAULT_UNROLL_N 4
- #define ZGEMM_DEFAULT_UNROLL_N 2
- #define XGEMM_DEFAULT_UNROLL_N 1
-
- #define SGEMM_DEFAULT_UNROLL_M 4
- #define DGEMM_DEFAULT_UNROLL_M 4
- #define QGEMM_DEFAULT_UNROLL_M 2
- #define CGEMM_DEFAULT_UNROLL_M 2
- #define ZGEMM_DEFAULT_UNROLL_M 2
- #define XGEMM_DEFAULT_UNROLL_M 1
- #endif
-
- #define SGEMM_DEFAULT_P 288
- #define DGEMM_DEFAULT_P 288
- #define QGEMM_DEFAULT_P 288
- #define CGEMM_DEFAULT_P 288
- #define ZGEMM_DEFAULT_P 288
- #define XGEMM_DEFAULT_P 288
-
- #define SGEMM_DEFAULT_R sgemm_r
- #define DGEMM_DEFAULT_R dgemm_r
- #define QGEMM_DEFAULT_R qgemm_r
- #define CGEMM_DEFAULT_R cgemm_r
- #define ZGEMM_DEFAULT_R zgemm_r
- #define XGEMM_DEFAULT_R xgemm_r
-
- #define SGEMM_DEFAULT_Q 256
- #define DGEMM_DEFAULT_Q 128
- #define QGEMM_DEFAULT_Q 64
- #define CGEMM_DEFAULT_Q 128
- #define ZGEMM_DEFAULT_Q 64
- #define XGEMM_DEFAULT_Q 32
-
- #define SYMV_P 16
- #define HAVE_EXCLUSIVE_CACHE
-
- #endif
-
- #if defined(PENTIUM) || defined(PENTIUM2) || defined(PENTIUM3)
-
- #ifdef HAVE_SSE
- #define SNUMOPT 2
- #else
- #define SNUMOPT 1
- #endif
- #define DNUMOPT 1
-
- #define GEMM_DEFAULT_OFFSET_A 0
- #define GEMM_DEFAULT_OFFSET_B 0
- #define GEMM_DEFAULT_ALIGN 0x0ffffUL
-
- #ifdef HAVE_SSE
- #define SGEMM_DEFAULT_UNROLL_M 8
- #define CGEMM_DEFAULT_UNROLL_M 4
- #else
- #define SGEMM_DEFAULT_UNROLL_M 4
- #define CGEMM_DEFAULT_UNROLL_M 2
- #endif
- #define DGEMM_DEFAULT_UNROLL_M 2
- #define SGEMM_DEFAULT_UNROLL_N 2
- #define DGEMM_DEFAULT_UNROLL_N 2
- #define QGEMM_DEFAULT_UNROLL_M 2
- #define QGEMM_DEFAULT_UNROLL_N 2
- #define CGEMM_DEFAULT_UNROLL_N 1
- #define ZGEMM_DEFAULT_UNROLL_M 1
- #define ZGEMM_DEFAULT_UNROLL_N 1
- #define XGEMM_DEFAULT_UNROLL_M 1
- #define XGEMM_DEFAULT_UNROLL_N 1
-
- #define SGEMM_DEFAULT_P sgemm_p
- #define SGEMM_DEFAULT_Q 256
- #define SGEMM_DEFAULT_R sgemm_r
-
- #define DGEMM_DEFAULT_P dgemm_p
- #define DGEMM_DEFAULT_Q 256
- #define DGEMM_DEFAULT_R dgemm_r
-
- #define QGEMM_DEFAULT_P qgemm_p
- #define QGEMM_DEFAULT_Q 256
- #define QGEMM_DEFAULT_R qgemm_r
-
- #define CGEMM_DEFAULT_P cgemm_p
- #define CGEMM_DEFAULT_Q 256
- #define CGEMM_DEFAULT_R cgemm_r
-
- #define ZGEMM_DEFAULT_P zgemm_p
- #define ZGEMM_DEFAULT_Q 256
- #define ZGEMM_DEFAULT_R zgemm_r
-
- #define XGEMM_DEFAULT_P xgemm_p
- #define XGEMM_DEFAULT_Q 256
- #define XGEMM_DEFAULT_R xgemm_r
-
- #define SYMV_P 4
-
- #endif
-
- #ifdef PENTIUMM
-
- #define SNUMOPT 2
- #define DNUMOPT 1
-
- #define GEMM_DEFAULT_OFFSET_A 0
- #define GEMM_DEFAULT_OFFSET_B 0
- #define GEMM_DEFAULT_ALIGN 0x0ffffUL
-
- #ifdef CORE_YONAH
- #define SGEMM_DEFAULT_UNROLL_M 4
- #define SGEMM_DEFAULT_UNROLL_N 4
- #define DGEMM_DEFAULT_UNROLL_M 2
- #define DGEMM_DEFAULT_UNROLL_N 4
- #define QGEMM_DEFAULT_UNROLL_M 2
- #define QGEMM_DEFAULT_UNROLL_N 2
- #define CGEMM_DEFAULT_UNROLL_M 2
- #define CGEMM_DEFAULT_UNROLL_N 2
- #define ZGEMM_DEFAULT_UNROLL_M 1
- #define ZGEMM_DEFAULT_UNROLL_N 2
- #define XGEMM_DEFAULT_UNROLL_M 1
- #define XGEMM_DEFAULT_UNROLL_N 1
- #else
- #define SGEMM_DEFAULT_UNROLL_M 8
- #define SGEMM_DEFAULT_UNROLL_N 2
- #define DGEMM_DEFAULT_UNROLL_M 2
- #define DGEMM_DEFAULT_UNROLL_N 2
- #define QGEMM_DEFAULT_UNROLL_M 2
- #define QGEMM_DEFAULT_UNROLL_N 2
- #define CGEMM_DEFAULT_UNROLL_M 4
- #define CGEMM_DEFAULT_UNROLL_N 1
- #define ZGEMM_DEFAULT_UNROLL_M 1
- #define ZGEMM_DEFAULT_UNROLL_N 1
- #define XGEMM_DEFAULT_UNROLL_M 1
- #define XGEMM_DEFAULT_UNROLL_N 1
-
- #endif
-
- #define SGEMM_DEFAULT_P sgemm_p
- #define SGEMM_DEFAULT_Q 256
- #define SGEMM_DEFAULT_R sgemm_r
-
- #define DGEMM_DEFAULT_P dgemm_p
- #define DGEMM_DEFAULT_Q 256
- #define DGEMM_DEFAULT_R dgemm_r
-
- #define QGEMM_DEFAULT_P qgemm_p
- #define QGEMM_DEFAULT_Q 256
- #define QGEMM_DEFAULT_R qgemm_r
-
- #define CGEMM_DEFAULT_P cgemm_p
- #define CGEMM_DEFAULT_Q 256
- #define CGEMM_DEFAULT_R cgemm_r
-
- #define ZGEMM_DEFAULT_P zgemm_p
- #define ZGEMM_DEFAULT_Q 256
- #define ZGEMM_DEFAULT_R zgemm_r
-
- #define XGEMM_DEFAULT_P xgemm_p
- #define XGEMM_DEFAULT_Q 256
- #define XGEMM_DEFAULT_R xgemm_r
-
- #define SYMV_P 4
- #endif
-
- #ifdef CORE_NORTHWOOD
-
- #define SNUMOPT 4
- #define DNUMOPT 2
-
- #define GEMM_DEFAULT_OFFSET_A 0
- #define GEMM_DEFAULT_OFFSET_B 32
-
- #define GEMM_DEFAULT_ALIGN 0x0ffffUL
-
- #define SYMV_P 8
-
- #define SGEMM_DEFAULT_UNROLL_M 8
- #define DGEMM_DEFAULT_UNROLL_M 4
- #define QGEMM_DEFAULT_UNROLL_M 2
- #define CGEMM_DEFAULT_UNROLL_M 4
- #define ZGEMM_DEFAULT_UNROLL_M 2
- #define XGEMM_DEFAULT_UNROLL_M 1
-
- #define SGEMM_DEFAULT_UNROLL_N 2
- #define DGEMM_DEFAULT_UNROLL_N 2
- #define QGEMM_DEFAULT_UNROLL_N 2
- #define CGEMM_DEFAULT_UNROLL_N 1
- #define ZGEMM_DEFAULT_UNROLL_N 1
- #define XGEMM_DEFAULT_UNROLL_N 1
-
- #define SGEMM_DEFAULT_P sgemm_p
- #define SGEMM_DEFAULT_R sgemm_r
-
- #define DGEMM_DEFAULT_P dgemm_p
- #define DGEMM_DEFAULT_R dgemm_r
-
- #define QGEMM_DEFAULT_P qgemm_p
- #define QGEMM_DEFAULT_R qgemm_r
-
- #define CGEMM_DEFAULT_P cgemm_p
- #define CGEMM_DEFAULT_R cgemm_r
-
- #define ZGEMM_DEFAULT_P zgemm_p
- #define ZGEMM_DEFAULT_R zgemm_r
-
- #define XGEMM_DEFAULT_P xgemm_p
- #define XGEMM_DEFAULT_R xgemm_r
-
- #define SGEMM_DEFAULT_Q 128
- #define DGEMM_DEFAULT_Q 128
- #define QGEMM_DEFAULT_Q 128
- #define CGEMM_DEFAULT_Q 128
- #define ZGEMM_DEFAULT_Q 128
- #define XGEMM_DEFAULT_Q 128
- #endif
-
- #ifdef CORE_PRESCOTT
-
- #define SNUMOPT 4
- #define DNUMOPT 2
-
- #ifndef __64BIT__
- #define GEMM_DEFAULT_OFFSET_A 128
- #define GEMM_DEFAULT_OFFSET_B 192
- #else
- #define GEMM_DEFAULT_OFFSET_A 0
- #define GEMM_DEFAULT_OFFSET_B 256
- #endif
-
- #define GEMM_DEFAULT_ALIGN 0x0ffffUL
-
- #define SYMV_P 8
-
- #ifdef ARCH_X86
- #define SGEMM_DEFAULT_UNROLL_M 4
- #define DGEMM_DEFAULT_UNROLL_M 2
- #define QGEMM_DEFAULT_UNROLL_M 2
- #define CGEMM_DEFAULT_UNROLL_M 2
- #define ZGEMM_DEFAULT_UNROLL_M 1
- #define XGEMM_DEFAULT_UNROLL_M 1
- #else
- #define SGEMM_DEFAULT_UNROLL_M 8
- #define DGEMM_DEFAULT_UNROLL_M 4
- #define QGEMM_DEFAULT_UNROLL_M 2
- #define CGEMM_DEFAULT_UNROLL_M 4
- #define ZGEMM_DEFAULT_UNROLL_M 2
- #define XGEMM_DEFAULT_UNROLL_M 1
- #endif
-
- #define SGEMM_DEFAULT_UNROLL_N 4
- #define DGEMM_DEFAULT_UNROLL_N 4
- #define QGEMM_DEFAULT_UNROLL_N 2
- #define CGEMM_DEFAULT_UNROLL_N 2
- #define ZGEMM_DEFAULT_UNROLL_N 2
- #define XGEMM_DEFAULT_UNROLL_N 1
-
- #define SGEMM_DEFAULT_P sgemm_p
- #define SGEMM_DEFAULT_R sgemm_r
-
- #define DGEMM_DEFAULT_P dgemm_p
- #define DGEMM_DEFAULT_R dgemm_r
-
- #define QGEMM_DEFAULT_P qgemm_p
- #define QGEMM_DEFAULT_R qgemm_r
-
- #define CGEMM_DEFAULT_P cgemm_p
- #define CGEMM_DEFAULT_R cgemm_r
-
- #define ZGEMM_DEFAULT_P zgemm_p
- #define ZGEMM_DEFAULT_R zgemm_r
-
- #define XGEMM_DEFAULT_P xgemm_p
- #define XGEMM_DEFAULT_R xgemm_r
-
- #define SGEMM_DEFAULT_Q 128
- #define DGEMM_DEFAULT_Q 128
- #define QGEMM_DEFAULT_Q 128
- #define CGEMM_DEFAULT_Q 128
- #define ZGEMM_DEFAULT_Q 128
- #define XGEMM_DEFAULT_Q 128
- #endif
-
- #ifdef CORE2
-
- #define SNUMOPT 8
- #define DNUMOPT 4
-
- #define GEMM_DEFAULT_OFFSET_A 448
- #define GEMM_DEFAULT_OFFSET_B 128
- #define GEMM_DEFAULT_ALIGN 0x03fffUL
-
- #define SYMV_P 8
-
- #define SWITCH_RATIO 4
-
- #ifdef ARCH_X86
- #define SGEMM_DEFAULT_UNROLL_M 8
- #define DGEMM_DEFAULT_UNROLL_M 4
- #define QGEMM_DEFAULT_UNROLL_M 2
- #define CGEMM_DEFAULT_UNROLL_M 4
- #define ZGEMM_DEFAULT_UNROLL_M 2
- #define XGEMM_DEFAULT_UNROLL_M 1
-
- #define SGEMM_DEFAULT_UNROLL_N 2
- #define DGEMM_DEFAULT_UNROLL_N 2
- #define QGEMM_DEFAULT_UNROLL_N 2
- #define CGEMM_DEFAULT_UNROLL_N 1
- #define ZGEMM_DEFAULT_UNROLL_N 1
- #define XGEMM_DEFAULT_UNROLL_N 1
-
- #define MASK(a, b) ((((a) + (b) - 1) / (b)) * (b))
-
- #else
- #define SGEMM_DEFAULT_UNROLL_M 8
- #define DGEMM_DEFAULT_UNROLL_M 4
- #define QGEMM_DEFAULT_UNROLL_M 2
- #define CGEMM_DEFAULT_UNROLL_M 4
- #define ZGEMM_DEFAULT_UNROLL_M 2
- #define XGEMM_DEFAULT_UNROLL_M 1
-
- #define SGEMM_DEFAULT_UNROLL_N 4
- #define DGEMM_DEFAULT_UNROLL_N 4
- #define QGEMM_DEFAULT_UNROLL_N 2
- #define CGEMM_DEFAULT_UNROLL_N 2
- #define ZGEMM_DEFAULT_UNROLL_N 2
- #define XGEMM_DEFAULT_UNROLL_N 1
- #endif
-
- #define SGEMM_DEFAULT_P sgemm_p
- #define SGEMM_DEFAULT_R sgemm_r
-
- #define DGEMM_DEFAULT_P dgemm_p
- #define DGEMM_DEFAULT_R dgemm_r
-
- #define QGEMM_DEFAULT_P qgemm_p
- #define QGEMM_DEFAULT_R qgemm_r
-
- #define CGEMM_DEFAULT_P cgemm_p
- #define CGEMM_DEFAULT_R cgemm_r
-
- #define ZGEMM_DEFAULT_P zgemm_p
- #define ZGEMM_DEFAULT_R zgemm_r
-
- #define XGEMM_DEFAULT_P xgemm_p
- #define XGEMM_DEFAULT_R xgemm_r
-
- #define SGEMM_DEFAULT_Q 256
- #define DGEMM_DEFAULT_Q 256
- #define QGEMM_DEFAULT_Q 256
- #define CGEMM_DEFAULT_Q 256
- #define ZGEMM_DEFAULT_Q 256
- #define XGEMM_DEFAULT_Q 256
-
- #endif
-
- #ifdef PENRYN
-
- #define SNUMOPT 8
- #define DNUMOPT 4
-
- #define GEMM_DEFAULT_OFFSET_A 128
- #define GEMM_DEFAULT_OFFSET_B 0
- #define GEMM_DEFAULT_ALIGN 0x03fffUL
-
- #define SYMV_P 8
-
- #define SWITCH_RATIO 4
-
- #ifdef ARCH_X86
- #define SGEMM_DEFAULT_UNROLL_M 4
- #define DGEMM_DEFAULT_UNROLL_M 2
- #define QGEMM_DEFAULT_UNROLL_M 2
- #define CGEMM_DEFAULT_UNROLL_M 2
- #define ZGEMM_DEFAULT_UNROLL_M 1
- #define XGEMM_DEFAULT_UNROLL_M 1
-
- #define SGEMM_DEFAULT_UNROLL_N 4
- #define DGEMM_DEFAULT_UNROLL_N 4
- #define QGEMM_DEFAULT_UNROLL_N 2
- #define CGEMM_DEFAULT_UNROLL_N 2
- #define ZGEMM_DEFAULT_UNROLL_N 2
- #define XGEMM_DEFAULT_UNROLL_N 1
- #else
- #define SGEMM_DEFAULT_UNROLL_M 8
- #define DGEMM_DEFAULT_UNROLL_M 4
- #define QGEMM_DEFAULT_UNROLL_M 2
- #define CGEMM_DEFAULT_UNROLL_M 4
- #define ZGEMM_DEFAULT_UNROLL_M 2
- #define XGEMM_DEFAULT_UNROLL_M 1
-
- #define SGEMM_DEFAULT_UNROLL_N 4
- #define DGEMM_DEFAULT_UNROLL_N 4
- #define QGEMM_DEFAULT_UNROLL_N 2
- #define CGEMM_DEFAULT_UNROLL_N 2
- #define ZGEMM_DEFAULT_UNROLL_N 2
- #define XGEMM_DEFAULT_UNROLL_N 1
- #endif
-
- #define SGEMM_DEFAULT_P sgemm_p
- #define SGEMM_DEFAULT_R sgemm_r
-
- #define DGEMM_DEFAULT_P dgemm_p
- #define DGEMM_DEFAULT_R dgemm_r
-
- #define QGEMM_DEFAULT_P qgemm_p
- #define QGEMM_DEFAULT_R qgemm_r
-
- #define CGEMM_DEFAULT_P cgemm_p
- #define CGEMM_DEFAULT_R cgemm_r
-
- #define ZGEMM_DEFAULT_P zgemm_p
- #define ZGEMM_DEFAULT_R zgemm_r
-
- #define XGEMM_DEFAULT_P xgemm_p
- #define XGEMM_DEFAULT_R xgemm_r
-
- #define SGEMM_DEFAULT_Q 512
- #define DGEMM_DEFAULT_Q 256
- #define QGEMM_DEFAULT_Q 128
- #define CGEMM_DEFAULT_Q 512
- #define ZGEMM_DEFAULT_Q 256
- #define XGEMM_DEFAULT_Q 128
-
- #define GETRF_FACTOR 0.75
- #endif
-
- #ifdef DUNNINGTON
-
- #define SNUMOPT 8
- #define DNUMOPT 4
-
- #define GEMM_DEFAULT_OFFSET_A 128
- #define GEMM_DEFAULT_OFFSET_B 0
- #define GEMM_DEFAULT_ALIGN 0x03fffUL
-
- #define SYMV_P 8
-
- #define SWITCH_RATIO 4
-
- #ifdef ARCH_X86
- #define SGEMM_DEFAULT_UNROLL_M 4
- #define DGEMM_DEFAULT_UNROLL_M 2
- #define QGEMM_DEFAULT_UNROLL_M 2
- #define CGEMM_DEFAULT_UNROLL_M 2
- #define ZGEMM_DEFAULT_UNROLL_M 1
- #define XGEMM_DEFAULT_UNROLL_M 1
-
- #define SGEMM_DEFAULT_UNROLL_N 4
- #define DGEMM_DEFAULT_UNROLL_N 4
- #define QGEMM_DEFAULT_UNROLL_N 2
- #define CGEMM_DEFAULT_UNROLL_N 2
- #define ZGEMM_DEFAULT_UNROLL_N 2
- #define XGEMM_DEFAULT_UNROLL_N 1
- #else
- #define SGEMM_DEFAULT_UNROLL_M 8
- #define DGEMM_DEFAULT_UNROLL_M 4
- #define QGEMM_DEFAULT_UNROLL_M 2
- #define CGEMM_DEFAULT_UNROLL_M 4
- #define ZGEMM_DEFAULT_UNROLL_M 2
- #define XGEMM_DEFAULT_UNROLL_M 1
-
- #define SGEMM_DEFAULT_UNROLL_N 4
- #define DGEMM_DEFAULT_UNROLL_N 4
- #define QGEMM_DEFAULT_UNROLL_N 2
- #define CGEMM_DEFAULT_UNROLL_N 2
- #define ZGEMM_DEFAULT_UNROLL_N 2
- #define XGEMM_DEFAULT_UNROLL_N 1
- #endif
-
- #define SGEMM_DEFAULT_P sgemm_p
- #define SGEMM_DEFAULT_R sgemm_r
-
- #define DGEMM_DEFAULT_P dgemm_p
- #define DGEMM_DEFAULT_R dgemm_r
-
- #define QGEMM_DEFAULT_P qgemm_p
- #define QGEMM_DEFAULT_R qgemm_r
-
- #define CGEMM_DEFAULT_P cgemm_p
- #define CGEMM_DEFAULT_R cgemm_r
-
- #define ZGEMM_DEFAULT_P zgemm_p
- #define ZGEMM_DEFAULT_R zgemm_r
-
- #define XGEMM_DEFAULT_P xgemm_p
- #define XGEMM_DEFAULT_R xgemm_r
-
- #define SGEMM_DEFAULT_Q 768
- #define DGEMM_DEFAULT_Q 384
- #define QGEMM_DEFAULT_Q 192
- #define CGEMM_DEFAULT_Q 768
- #define ZGEMM_DEFAULT_Q 384
- #define XGEMM_DEFAULT_Q 192
-
- #define GETRF_FACTOR 0.75
- #define GEMM_THREAD gemm_thread_mn
- #endif
-
- #ifdef NEHALEM
-
- #define SNUMOPT 8
- #define DNUMOPT 4
-
- #define GEMM_DEFAULT_OFFSET_A 32
- #define GEMM_DEFAULT_OFFSET_B 0
- #define GEMM_DEFAULT_ALIGN 0x03fffUL
-
- #define SYMV_P 8
-
- #define SWITCH_RATIO 4
-
- #ifdef ARCH_X86
- #define SGEMM_DEFAULT_UNROLL_M 4
- #define DGEMM_DEFAULT_UNROLL_M 2
- #define QGEMM_DEFAULT_UNROLL_M 2
- #define CGEMM_DEFAULT_UNROLL_M 2
- #define ZGEMM_DEFAULT_UNROLL_M 1
- #define XGEMM_DEFAULT_UNROLL_M 1
-
- #define SGEMM_DEFAULT_UNROLL_N 4
- #define DGEMM_DEFAULT_UNROLL_N 4
- #define QGEMM_DEFAULT_UNROLL_N 2
- #define CGEMM_DEFAULT_UNROLL_N 2
- #define ZGEMM_DEFAULT_UNROLL_N 2
- #define XGEMM_DEFAULT_UNROLL_N 1
- #else
- #define SGEMM_DEFAULT_UNROLL_M 4
- #define DGEMM_DEFAULT_UNROLL_M 2
- #define QGEMM_DEFAULT_UNROLL_M 2
- #define CGEMM_DEFAULT_UNROLL_M 2
- #define ZGEMM_DEFAULT_UNROLL_M 1
- #define XGEMM_DEFAULT_UNROLL_M 1
-
- #define SGEMM_DEFAULT_UNROLL_N 8
- #define DGEMM_DEFAULT_UNROLL_N 8
- #define QGEMM_DEFAULT_UNROLL_N 2
- #define CGEMM_DEFAULT_UNROLL_N 4
- #define ZGEMM_DEFAULT_UNROLL_N 4
- #define XGEMM_DEFAULT_UNROLL_N 1
- #endif
-
- #define SGEMM_DEFAULT_P 504
- #define SGEMM_DEFAULT_R sgemm_r
-
- #define DGEMM_DEFAULT_P 504
- #define DGEMM_DEFAULT_R dgemm_r
-
- #define QGEMM_DEFAULT_P 504
- #define QGEMM_DEFAULT_R qgemm_r
-
- #define CGEMM_DEFAULT_P 252
- #define CGEMM_DEFAULT_R cgemm_r
-
- #define ZGEMM_DEFAULT_P 252
- #define ZGEMM_DEFAULT_R zgemm_r
-
- #define XGEMM_DEFAULT_P 252
- #define XGEMM_DEFAULT_R xgemm_r
-
- #define SGEMM_DEFAULT_Q 512
- #define DGEMM_DEFAULT_Q 256
- #define QGEMM_DEFAULT_Q 128
- #define CGEMM_DEFAULT_Q 512
- #define ZGEMM_DEFAULT_Q 256
- #define XGEMM_DEFAULT_Q 128
-
- #define GETRF_FACTOR 0.72
-
- #endif
-
-
- #ifdef SANDYBRIDGE
-
- #define SNUMOPT 8
- #define DNUMOPT 4
-
- #define GEMM_DEFAULT_OFFSET_A 0
- #define GEMM_DEFAULT_OFFSET_B 0
- #define GEMM_DEFAULT_ALIGN 0x03fffUL
-
- #define SYMV_P 8
-
- #define SWITCH_RATIO 4
-
- #ifdef ARCH_X86
- #define SGEMM_DEFAULT_UNROLL_M 4
- #define DGEMM_DEFAULT_UNROLL_M 2
- #define QGEMM_DEFAULT_UNROLL_M 2
- #define CGEMM_DEFAULT_UNROLL_M 2
- #define ZGEMM_DEFAULT_UNROLL_M 1
- #define XGEMM_DEFAULT_UNROLL_M 1
-
- #define SGEMM_DEFAULT_UNROLL_N 4
- #define DGEMM_DEFAULT_UNROLL_N 4
- #define QGEMM_DEFAULT_UNROLL_N 2
- #define CGEMM_DEFAULT_UNROLL_N 2
- #define ZGEMM_DEFAULT_UNROLL_N 2
- #define XGEMM_DEFAULT_UNROLL_N 1
- #else
- #define SGEMM_DEFAULT_UNROLL_M 16
- #define DGEMM_DEFAULT_UNROLL_M 8
- #define QGEMM_DEFAULT_UNROLL_M 2
- #define CGEMM_DEFAULT_UNROLL_M 8
- #define ZGEMM_DEFAULT_UNROLL_M 1
- #define XGEMM_DEFAULT_UNROLL_M 1
-
- #define SGEMM_DEFAULT_UNROLL_N 4
- #define DGEMM_DEFAULT_UNROLL_N 4
- #define QGEMM_DEFAULT_UNROLL_N 2
- #define CGEMM_DEFAULT_UNROLL_N 2
- #define ZGEMM_DEFAULT_UNROLL_N 4
- #define XGEMM_DEFAULT_UNROLL_N 1
- #endif
-
- #define SGEMM_DEFAULT_P 768
- #define SGEMM_DEFAULT_R sgemm_r
- //#define SGEMM_DEFAULT_R 1024
-
- #define DGEMM_DEFAULT_P 512
- #define DGEMM_DEFAULT_R dgemm_r
- //#define DGEMM_DEFAULT_R 1024
-
- #define QGEMM_DEFAULT_P 504
- #define QGEMM_DEFAULT_R qgemm_r
-
- #define CGEMM_DEFAULT_P 768
- #define CGEMM_DEFAULT_R cgemm_r
- //#define CGEMM_DEFAULT_R 1024
-
- #define ZGEMM_DEFAULT_P 512
- #define ZGEMM_DEFAULT_R zgemm_r
- //#define ZGEMM_DEFAULT_R 1024
-
- #define XGEMM_DEFAULT_P 252
- #define XGEMM_DEFAULT_R xgemm_r
-
- #define SGEMM_DEFAULT_Q 384
- #define DGEMM_DEFAULT_Q 256
- #define QGEMM_DEFAULT_Q 128
- #define CGEMM_DEFAULT_Q 512
- #define ZGEMM_DEFAULT_Q 192
- #define XGEMM_DEFAULT_Q 128
-
- #define CGEMM3M_DEFAULT_UNROLL_N 8
- #define CGEMM3M_DEFAULT_UNROLL_M 4
- #define ZGEMM3M_DEFAULT_UNROLL_N 8
- #define ZGEMM3M_DEFAULT_UNROLL_M 2
-
- #define CGEMM3M_DEFAULT_P 448
- #define ZGEMM3M_DEFAULT_P 224
- #define XGEMM3M_DEFAULT_P 112
- #define CGEMM3M_DEFAULT_Q 224
- #define ZGEMM3M_DEFAULT_Q 224
- #define XGEMM3M_DEFAULT_Q 224
- #define CGEMM3M_DEFAULT_R 12288
- #define ZGEMM3M_DEFAULT_R 12288
- #define XGEMM3M_DEFAULT_R 12288
-
-
-
- #define GETRF_FACTOR 0.72
-
- #endif
-
- #ifdef HASWELL
-
- #define SNUMOPT 16
- #define DNUMOPT 8
-
- #define GEMM_DEFAULT_OFFSET_A 0
- #define GEMM_DEFAULT_OFFSET_B 0
- #define GEMM_DEFAULT_ALIGN 0x03fffUL
-
- #define SYMV_P 8
-
- #define SWITCH_RATIO 32
- #define GEMM_PREFERED_SIZE 16
-
- #ifdef ARCH_X86
-
- #define SGEMM_DEFAULT_UNROLL_M 4
- #define DGEMM_DEFAULT_UNROLL_M 2
- #define QGEMM_DEFAULT_UNROLL_M 2
- #define CGEMM_DEFAULT_UNROLL_M 2
- #define ZGEMM_DEFAULT_UNROLL_M 1
- #define XGEMM_DEFAULT_UNROLL_M 1
-
- #define SGEMM_DEFAULT_UNROLL_N 4
- #define DGEMM_DEFAULT_UNROLL_N 4
- #define QGEMM_DEFAULT_UNROLL_N 2
- #define CGEMM_DEFAULT_UNROLL_N 2
- #define ZGEMM_DEFAULT_UNROLL_N 2
- #define XGEMM_DEFAULT_UNROLL_N 1
-
- #else
-
- #define SGEMM_DEFAULT_UNROLL_M 16
- #define DGEMM_DEFAULT_UNROLL_M 4
- #define QGEMM_DEFAULT_UNROLL_M 2
- #define CGEMM_DEFAULT_UNROLL_M 8
- #define ZGEMM_DEFAULT_UNROLL_M 4
- #define XGEMM_DEFAULT_UNROLL_M 1
-
- #define SGEMM_DEFAULT_UNROLL_N 4
- #define DGEMM_DEFAULT_UNROLL_N 8
- #define QGEMM_DEFAULT_UNROLL_N 2
- #define CGEMM_DEFAULT_UNROLL_N 2
- #define ZGEMM_DEFAULT_UNROLL_N 2
- #define XGEMM_DEFAULT_UNROLL_N 1
-
- #define SGEMM_DEFAULT_UNROLL_MN 32
- #define DGEMM_DEFAULT_UNROLL_MN 32
- #endif
-
- #ifdef ARCH_X86
-
- #define SGEMM_DEFAULT_P 512
- #define SGEMM_DEFAULT_R sgemm_r
- #define DGEMM_DEFAULT_P 512
- #define DGEMM_DEFAULT_R dgemm_r
- #define QGEMM_DEFAULT_P 504
- #define QGEMM_DEFAULT_R qgemm_r
- #define CGEMM_DEFAULT_P 128
- #define CGEMM_DEFAULT_R 1024
- #define ZGEMM_DEFAULT_P 512
- #define ZGEMM_DEFAULT_R zgemm_r
- #define XGEMM_DEFAULT_P 252
- #define XGEMM_DEFAULT_R xgemm_r
- #define SGEMM_DEFAULT_Q 256
- #define DGEMM_DEFAULT_Q 256
- #define QGEMM_DEFAULT_Q 128
- #define CGEMM_DEFAULT_Q 256
- #define ZGEMM_DEFAULT_Q 192
- #define XGEMM_DEFAULT_Q 128
-
- #else
-
- #define SGEMM_DEFAULT_P 768
- #define DGEMM_DEFAULT_P 512
- #define CGEMM_DEFAULT_P 384
- #define ZGEMM_DEFAULT_P 256
-
- #ifdef WINDOWS_ABI
- #define SGEMM_DEFAULT_Q 320
- #define DGEMM_DEFAULT_Q 128
- #else
- #define SGEMM_DEFAULT_Q 384
- #define DGEMM_DEFAULT_Q 256
- #endif
- #define CGEMM_DEFAULT_Q 192
- #define ZGEMM_DEFAULT_Q 128
-
- #define SGEMM_DEFAULT_R sgemm_r
- #define DGEMM_DEFAULT_R 13824
- #define CGEMM_DEFAULT_R cgemm_r
- #define ZGEMM_DEFAULT_R zgemm_r
-
- #define QGEMM_DEFAULT_Q 128
- #define QGEMM_DEFAULT_P 504
- #define QGEMM_DEFAULT_R qgemm_r
- #define XGEMM_DEFAULT_P 252
- #define XGEMM_DEFAULT_R xgemm_r
- #define XGEMM_DEFAULT_Q 128
-
- #define CGEMM3M_DEFAULT_UNROLL_N 8
- #define CGEMM3M_DEFAULT_UNROLL_M 4
- #define ZGEMM3M_DEFAULT_UNROLL_N 8
- #define ZGEMM3M_DEFAULT_UNROLL_M 2
-
- #define CGEMM3M_DEFAULT_P 448
- #define ZGEMM3M_DEFAULT_P 224
- #define XGEMM3M_DEFAULT_P 112
- #define CGEMM3M_DEFAULT_Q 224
- #define ZGEMM3M_DEFAULT_Q 224
- #define XGEMM3M_DEFAULT_Q 224
- #define CGEMM3M_DEFAULT_R 12288
- #define ZGEMM3M_DEFAULT_R 12288
- #define XGEMM3M_DEFAULT_R 12288
-
- #endif
-
-
- #endif
-
- #ifdef SKYLAKEX
-
- #define SNUMOPT 16
- #define DNUMOPT 8
-
- #define GEMM_DEFAULT_OFFSET_A 0
- #define GEMM_DEFAULT_OFFSET_B 0
- #define GEMM_DEFAULT_ALIGN 0x03fffUL
-
- #define SYMV_P 8
-
- #define SWITCH_RATIO 32
- #define GEMM_PREFERED_SIZE 32
- #define USE_SGEMM_KERNEL_DIRECT 1
-
- #ifdef ARCH_X86
-
- #define SGEMM_DEFAULT_UNROLL_M 4
- #define DGEMM_DEFAULT_UNROLL_M 2
- #define QGEMM_DEFAULT_UNROLL_M 2
- #define CGEMM_DEFAULT_UNROLL_M 2
- #define ZGEMM_DEFAULT_UNROLL_M 1
- #define XGEMM_DEFAULT_UNROLL_M 1
-
- #define SGEMM_DEFAULT_UNROLL_N 4
- #define DGEMM_DEFAULT_UNROLL_N 4
- #define QGEMM_DEFAULT_UNROLL_N 2
- #define CGEMM_DEFAULT_UNROLL_N 2
- #define ZGEMM_DEFAULT_UNROLL_N 2
- #define XGEMM_DEFAULT_UNROLL_N 1
-
- #else
-
- #define SGEMM_DEFAULT_UNROLL_M 16
- #define DGEMM_DEFAULT_UNROLL_M 4
- #define QGEMM_DEFAULT_UNROLL_M 2
- #define CGEMM_DEFAULT_UNROLL_M 8
- #define ZGEMM_DEFAULT_UNROLL_M 4
- #define XGEMM_DEFAULT_UNROLL_M 1
-
- #define SGEMM_DEFAULT_UNROLL_N 4
- #define DGEMM_DEFAULT_UNROLL_N 8
- #define QGEMM_DEFAULT_UNROLL_N 2
- #define CGEMM_DEFAULT_UNROLL_N 2
- #define ZGEMM_DEFAULT_UNROLL_N 2
- #define XGEMM_DEFAULT_UNROLL_N 1
-
- #define SGEMM_DEFAULT_UNROLL_MN 32
- #define DGEMM_DEFAULT_UNROLL_MN 32
- #endif
-
- #ifdef ARCH_X86
-
- #define SGEMM_DEFAULT_P 512
- #define SGEMM_DEFAULT_R sgemm_r
- #define DGEMM_DEFAULT_P 512
- #define DGEMM_DEFAULT_R dgemm_r
- #define QGEMM_DEFAULT_P 504
- #define QGEMM_DEFAULT_R qgemm_r
- #define CGEMM_DEFAULT_P 128
- #define CGEMM_DEFAULT_R 1024
- #define ZGEMM_DEFAULT_P 512
- #define ZGEMM_DEFAULT_R zgemm_r
- #define XGEMM_DEFAULT_P 252
- #define XGEMM_DEFAULT_R xgemm_r
- #define SGEMM_DEFAULT_Q 256
- #define DGEMM_DEFAULT_Q 256
- #define QGEMM_DEFAULT_Q 128
- #define CGEMM_DEFAULT_Q 256
- #define ZGEMM_DEFAULT_Q 192
- #define XGEMM_DEFAULT_Q 128
-
- #else
-
- #define SGEMM_DEFAULT_P 768
- #define DGEMM_DEFAULT_P 512
- #define CGEMM_DEFAULT_P 384
- #define ZGEMM_DEFAULT_P 256
-
- #ifdef WINDOWS_ABI
- #define SGEMM_DEFAULT_Q 320
- #define DGEMM_DEFAULT_Q 128
- #else
- #define SGEMM_DEFAULT_Q 384
- #define DGEMM_DEFAULT_Q 256
- #endif
- #define CGEMM_DEFAULT_Q 192
- #define ZGEMM_DEFAULT_Q 128
-
- #define SGEMM_DEFAULT_R sgemm_r
- #define DGEMM_DEFAULT_R 13824
- #define CGEMM_DEFAULT_R cgemm_r
- #define ZGEMM_DEFAULT_R zgemm_r
-
- #define QGEMM_DEFAULT_Q 128
- #define QGEMM_DEFAULT_P 504
- #define QGEMM_DEFAULT_R qgemm_r
- #define XGEMM_DEFAULT_P 252
- #define XGEMM_DEFAULT_R xgemm_r
- #define XGEMM_DEFAULT_Q 128
-
- #define CGEMM3M_DEFAULT_UNROLL_N 8
- #define CGEMM3M_DEFAULT_UNROLL_M 4
- #define ZGEMM3M_DEFAULT_UNROLL_N 8
- #define ZGEMM3M_DEFAULT_UNROLL_M 2
-
- #define CGEMM3M_DEFAULT_P 448
- #define ZGEMM3M_DEFAULT_P 224
- #define XGEMM3M_DEFAULT_P 112
- #define CGEMM3M_DEFAULT_Q 224
- #define ZGEMM3M_DEFAULT_Q 224
- #define XGEMM3M_DEFAULT_Q 224
- #define CGEMM3M_DEFAULT_R 12288
- #define ZGEMM3M_DEFAULT_R 12288
- #define XGEMM3M_DEFAULT_R 12288
-
- #endif
-
-
- #endif
-
-
-
- #ifdef ATOM
-
- #define SNUMOPT 2
- #define DNUMOPT 1
-
- #define GEMM_DEFAULT_OFFSET_A 64
- #define GEMM_DEFAULT_OFFSET_B 0
- #define GEMM_DEFAULT_ALIGN 0x0ffffUL
-
- #define SYMV_P 8
-
- #ifdef ARCH_X86
- #define SGEMM_DEFAULT_UNROLL_M 4
- #define DGEMM_DEFAULT_UNROLL_M 2
- #define QGEMM_DEFAULT_UNROLL_M 2
- #define CGEMM_DEFAULT_UNROLL_M 2
- #define ZGEMM_DEFAULT_UNROLL_M 1
- #define XGEMM_DEFAULT_UNROLL_M 1
- #else
- #define SGEMM_DEFAULT_UNROLL_M 8
- #define DGEMM_DEFAULT_UNROLL_M 4
- #define QGEMM_DEFAULT_UNROLL_M 2
- #define CGEMM_DEFAULT_UNROLL_M 4
- #define ZGEMM_DEFAULT_UNROLL_M 2
- #define XGEMM_DEFAULT_UNROLL_M 1
- #endif
-
- #define SGEMM_DEFAULT_UNROLL_N 4
- #define DGEMM_DEFAULT_UNROLL_N 2
- #define QGEMM_DEFAULT_UNROLL_N 2
- #define CGEMM_DEFAULT_UNROLL_N 2
- #define ZGEMM_DEFAULT_UNROLL_N 1
- #define XGEMM_DEFAULT_UNROLL_N 1
-
- #define SGEMM_DEFAULT_P sgemm_p
- #define SGEMM_DEFAULT_R sgemm_r
-
- #define DGEMM_DEFAULT_P dgemm_p
- #define DGEMM_DEFAULT_R dgemm_r
-
- #define QGEMM_DEFAULT_P qgemm_p
- #define QGEMM_DEFAULT_R qgemm_r
-
- #define CGEMM_DEFAULT_P cgemm_p
- #define CGEMM_DEFAULT_R cgemm_r
-
- #define ZGEMM_DEFAULT_P zgemm_p
- #define ZGEMM_DEFAULT_R zgemm_r
-
- #define XGEMM_DEFAULT_P xgemm_p
- #define XGEMM_DEFAULT_R xgemm_r
-
- #define SGEMM_DEFAULT_Q 256
- #define DGEMM_DEFAULT_Q 256
- #define QGEMM_DEFAULT_Q 256
- #define CGEMM_DEFAULT_Q 256
- #define ZGEMM_DEFAULT_Q 256
- #define XGEMM_DEFAULT_Q 256
-
- #endif
-
-
- #ifdef ITANIUM2
-
- #define SNUMOPT 4
- #define DNUMOPT 4
-
- #define GEMM_DEFAULT_OFFSET_A 0
- #define GEMM_DEFAULT_OFFSET_B 128
- #define GEMM_DEFAULT_ALIGN 0x03fffUL
-
- #define SGEMM_DEFAULT_UNROLL_M 8
- #define SGEMM_DEFAULT_UNROLL_N 8
- #define DGEMM_DEFAULT_UNROLL_M 8
- #define DGEMM_DEFAULT_UNROLL_N 8
- #define QGEMM_DEFAULT_UNROLL_M 8
- #define QGEMM_DEFAULT_UNROLL_N 8
- #define CGEMM_DEFAULT_UNROLL_M 4
- #define CGEMM_DEFAULT_UNROLL_N 4
- #define ZGEMM_DEFAULT_UNROLL_M 4
- #define ZGEMM_DEFAULT_UNROLL_N 4
- #define XGEMM_DEFAULT_UNROLL_M 4
- #define XGEMM_DEFAULT_UNROLL_N 4
-
- #define SGEMM_DEFAULT_P sgemm_p
- #define DGEMM_DEFAULT_P dgemm_p
- #define QGEMM_DEFAULT_P qgemm_p
- #define CGEMM_DEFAULT_P cgemm_p
- #define ZGEMM_DEFAULT_P zgemm_p
- #define XGEMM_DEFAULT_P xgemm_p
-
- #define SGEMM_DEFAULT_Q 1024
- #define DGEMM_DEFAULT_Q 1024
- #define QGEMM_DEFAULT_Q 1024
- #define CGEMM_DEFAULT_Q 1024
- #define ZGEMM_DEFAULT_Q 1024
- #define XGEMM_DEFAULT_Q 1024
-
- #define SGEMM_DEFAULT_R sgemm_r
- #define DGEMM_DEFAULT_R dgemm_r
- #define QGEMM_DEFAULT_R qgemm_r
- #define CGEMM_DEFAULT_R cgemm_r
- #define ZGEMM_DEFAULT_R zgemm_r
- #define XGEMM_DEFAULT_R xgemm_r
-
- #define SYMV_P 16
-
- #define GETRF_FACTOR 0.65
-
- #endif
-
- #if defined(EV4) || defined(EV5) || defined(EV6)
-
- #ifdef EV4
- #define SNUMOPT 1
- #define DNUMOPT 1
- #else
- #define SNUMOPT 2
- #define DNUMOPT 2
- #endif
-
- #define GEMM_DEFAULT_OFFSET_A 512
- #define GEMM_DEFAULT_OFFSET_B 512
- #define GEMM_DEFAULT_ALIGN 0x0ffffUL
-
- #define SGEMM_DEFAULT_UNROLL_M 4
- #define SGEMM_DEFAULT_UNROLL_N 4
- #define DGEMM_DEFAULT_UNROLL_M 4
- #define DGEMM_DEFAULT_UNROLL_N 4
- #define CGEMM_DEFAULT_UNROLL_M 2
- #define CGEMM_DEFAULT_UNROLL_N 2
- #define ZGEMM_DEFAULT_UNROLL_M 2
- #define ZGEMM_DEFAULT_UNROLL_N 2
-
- #define SYMV_P 8
-
- #ifdef EV4
- #define SGEMM_DEFAULT_P 32
- #define SGEMM_DEFAULT_Q 112
- #define SGEMM_DEFAULT_R 256
-
- #define DGEMM_DEFAULT_P 32
- #define DGEMM_DEFAULT_Q 56
- #define DGEMM_DEFAULT_R 256
-
- #define CGEMM_DEFAULT_P 32
- #define CGEMM_DEFAULT_Q 64
- #define CGEMM_DEFAULT_R 240
-
- #define ZGEMM_DEFAULT_P 32
- #define ZGEMM_DEFAULT_Q 32
- #define ZGEMM_DEFAULT_R 240
- #endif
-
- #ifdef EV5
- #define SGEMM_DEFAULT_P 64
- #define SGEMM_DEFAULT_Q 256
-
- #define DGEMM_DEFAULT_P 64
- #define DGEMM_DEFAULT_Q 128
-
- #define CGEMM_DEFAULT_P 64
- #define CGEMM_DEFAULT_Q 128
-
- #define ZGEMM_DEFAULT_P 64
- #define ZGEMM_DEFAULT_Q 64
- #endif
-
- #ifdef EV6
- #define SGEMM_DEFAULT_P 256
- #define SGEMM_DEFAULT_Q 512
-
- #define DGEMM_DEFAULT_P 256
- #define DGEMM_DEFAULT_Q 256
-
- #define CGEMM_DEFAULT_P 256
- #define CGEMM_DEFAULT_Q 256
-
- #define ZGEMM_DEFAULT_P 128
- #define ZGEMM_DEFAULT_Q 256
- #endif
-
- #endif
-
- #ifdef CELL
-
- #define SNUMOPT 2
- #define DNUMOPT 2
-
- #define GEMM_DEFAULT_OFFSET_A 0
- #define GEMM_DEFAULT_OFFSET_B 8192
- #define GEMM_DEFAULT_ALIGN 0x0ffffUL
-
- #define SGEMM_DEFAULT_UNROLL_M 16
- #define SGEMM_DEFAULT_UNROLL_N 4
- #define DGEMM_DEFAULT_UNROLL_M 4
- #define DGEMM_DEFAULT_UNROLL_N 4
- #define CGEMM_DEFAULT_UNROLL_M 8
- #define CGEMM_DEFAULT_UNROLL_N 2
- #define ZGEMM_DEFAULT_UNROLL_M 2
- #define ZGEMM_DEFAULT_UNROLL_N 2
-
- #define SGEMM_DEFAULT_P 128
- #define DGEMM_DEFAULT_P 128
- #define CGEMM_DEFAULT_P 128
- #define ZGEMM_DEFAULT_P 128
-
- #define SGEMM_DEFAULT_Q 512
- #define DGEMM_DEFAULT_Q 256
- #define CGEMM_DEFAULT_Q 256
- #define ZGEMM_DEFAULT_Q 128
-
- #define SYMV_P 4
- #endif
-
- #ifdef PPCG4
- #define GEMM_DEFAULT_OFFSET_A 0
- #define GEMM_DEFAULT_OFFSET_B 1024
- #define GEMM_DEFAULT_ALIGN 0x0ffffUL
-
- #define SGEMM_DEFAULT_UNROLL_M 16
- #define SGEMM_DEFAULT_UNROLL_N 4
- #define DGEMM_DEFAULT_UNROLL_M 4
- #define DGEMM_DEFAULT_UNROLL_N 4
- #define CGEMM_DEFAULT_UNROLL_M 8
- #define CGEMM_DEFAULT_UNROLL_N 2
- #define ZGEMM_DEFAULT_UNROLL_M 2
- #define ZGEMM_DEFAULT_UNROLL_N 2
-
- #define SGEMM_DEFAULT_P 256
- #define DGEMM_DEFAULT_P 128
- #define CGEMM_DEFAULT_P 128
- #define ZGEMM_DEFAULT_P 64
-
- #define SGEMM_DEFAULT_Q 256
- #define DGEMM_DEFAULT_Q 256
- #define CGEMM_DEFAULT_Q 256
- #define ZGEMM_DEFAULT_Q 256
-
- #define SYMV_P 4
- #endif
-
- #ifdef PPC970
-
- #define SNUMOPT 4
- #define DNUMOPT 4
-
- #define GEMM_DEFAULT_OFFSET_A 2688
- #define GEMM_DEFAULT_OFFSET_B 3072
- #define GEMM_DEFAULT_ALIGN 0x03fffUL
-
- #define SGEMM_DEFAULT_UNROLL_M 16
- #define SGEMM_DEFAULT_UNROLL_N 4
- #define DGEMM_DEFAULT_UNROLL_M 4
- #define DGEMM_DEFAULT_UNROLL_N 4
- #define CGEMM_DEFAULT_UNROLL_M 8
- #define CGEMM_DEFAULT_UNROLL_N 2
- #define ZGEMM_DEFAULT_UNROLL_M 2
- #define ZGEMM_DEFAULT_UNROLL_N 2
-
- #if defined(OS_LINUX) || defined(OS_DARWIN) || defined(OS_FREEBSD)
- #if L2_SIZE == 1024976
- #define SGEMM_DEFAULT_P 320
- #define DGEMM_DEFAULT_P 256
- #define CGEMM_DEFAULT_P 256
- #define ZGEMM_DEFAULT_P 256
- #else
- #define SGEMM_DEFAULT_P 176
- #define DGEMM_DEFAULT_P 176
- #define CGEMM_DEFAULT_P 176
- #define ZGEMM_DEFAULT_P 176
- #endif
- #endif
-
- #define SGEMM_DEFAULT_Q 512
- #define DGEMM_DEFAULT_Q 256
- #define CGEMM_DEFAULT_Q 256
- #define ZGEMM_DEFAULT_Q 128
-
- #define SYMV_P 4
-
- #endif
-
- #ifdef PPC440
-
- #define SNUMOPT 2
- #define DNUMOPT 2
-
- #define GEMM_DEFAULT_OFFSET_A (32 * 0)
- #define GEMM_DEFAULT_OFFSET_B (32 * 0)
- #define GEMM_DEFAULT_ALIGN 0x0ffffUL
-
- #define SGEMM_DEFAULT_UNROLL_M 4
- #define SGEMM_DEFAULT_UNROLL_N 4
- #define DGEMM_DEFAULT_UNROLL_M 4
- #define DGEMM_DEFAULT_UNROLL_N 4
- #define CGEMM_DEFAULT_UNROLL_M 2
- #define CGEMM_DEFAULT_UNROLL_N 2
- #define ZGEMM_DEFAULT_UNROLL_M 2
- #define ZGEMM_DEFAULT_UNROLL_N 2
-
- #define SGEMM_DEFAULT_P 512
- #define DGEMM_DEFAULT_P 512
- #define CGEMM_DEFAULT_P 512
- #define ZGEMM_DEFAULT_P 512
-
- #define SGEMM_DEFAULT_Q 1024
- #define DGEMM_DEFAULT_Q 512
- #define CGEMM_DEFAULT_Q 512
- #define ZGEMM_DEFAULT_Q 256
-
- #define SGEMM_DEFAULT_R SGEMM_DEFAULT_P
- #define DGEMM_DEFAULT_R DGEMM_DEFAULT_P
- #define CGEMM_DEFAULT_R CGEMM_DEFAULT_P
- #define ZGEMM_DEFAULT_R ZGEMM_DEFAULT_P
-
- #define SYMV_P 4
- #endif
-
- #ifdef PPC440FP2
-
- #define SNUMOPT 4
- #define DNUMOPT 4
-
- #define GEMM_DEFAULT_OFFSET_A (32 * 0)
- #define GEMM_DEFAULT_OFFSET_B (32 * 0)
- #define GEMM_DEFAULT_ALIGN 0x0ffffUL
-
- #define SGEMM_DEFAULT_UNROLL_M 8
- #define SGEMM_DEFAULT_UNROLL_N 4
- #define DGEMM_DEFAULT_UNROLL_M 8
- #define DGEMM_DEFAULT_UNROLL_N 4
- #define CGEMM_DEFAULT_UNROLL_M 4
- #define CGEMM_DEFAULT_UNROLL_N 2
- #define ZGEMM_DEFAULT_UNROLL_M 4
- #define ZGEMM_DEFAULT_UNROLL_N 2
-
- #define SGEMM_DEFAULT_P 128
- #define DGEMM_DEFAULT_P 128
- #define CGEMM_DEFAULT_P 128
- #define ZGEMM_DEFAULT_P 128
- #if 1
- #define SGEMM_DEFAULT_Q 4096
- #define DGEMM_DEFAULT_Q 3072
- #define CGEMM_DEFAULT_Q 2048
- #define ZGEMM_DEFAULT_Q 1024
- #else
- #define SGEMM_DEFAULT_Q 512
- #define DGEMM_DEFAULT_Q 256
- #define CGEMM_DEFAULT_Q 256
- #define ZGEMM_DEFAULT_Q 128
- #endif
-
- #define SYMV_P 4
- #endif
-
-
-
- #if defined(POWER3) || defined(POWER4) || defined(POWER5)
- #define GEMM_DEFAULT_OFFSET_A 0
- #define GEMM_DEFAULT_OFFSET_B 2048
- #define GEMM_DEFAULT_ALIGN 0x0ffffUL
-
- #define SGEMM_DEFAULT_UNROLL_M 4
- #define SGEMM_DEFAULT_UNROLL_N 4
- #define DGEMM_DEFAULT_UNROLL_M 4
- #define DGEMM_DEFAULT_UNROLL_N 4
- #define CGEMM_DEFAULT_UNROLL_M 2
- #define CGEMM_DEFAULT_UNROLL_N 2
- #define ZGEMM_DEFAULT_UNROLL_M 2
- #define ZGEMM_DEFAULT_UNROLL_N 2
-
- #ifdef POWER3
-
- #define SNUMOPT 4
- #define DNUMOPT 4
-
- #define SGEMM_DEFAULT_P 256
- #define SGEMM_DEFAULT_Q 432
- #define SGEMM_DEFAULT_R 1012
-
- #define DGEMM_DEFAULT_P 256
- #define DGEMM_DEFAULT_Q 216
- #define DGEMM_DEFAULT_R 1012
-
- #define ZGEMM_DEFAULT_P 256
- #define ZGEMM_DEFAULT_Q 104
- #define ZGEMM_DEFAULT_R 1012
- #endif
-
- #if defined(POWER4)
- #ifdef ALLOC_HUGETLB
- #define SGEMM_DEFAULT_P 184
- #define DGEMM_DEFAULT_P 184
- #define CGEMM_DEFAULT_P 184
- #define ZGEMM_DEFAULT_P 184
- #else
- #define SGEMM_DEFAULT_P 144
- #define DGEMM_DEFAULT_P 144
- #define CGEMM_DEFAULT_P 144
- #define ZGEMM_DEFAULT_P 144
- #endif
- #endif
-
- #if defined(POWER5)
- #ifdef ALLOC_HUGETLB
- #define SGEMM_DEFAULT_P 512
- #define DGEMM_DEFAULT_P 256
- #define CGEMM_DEFAULT_P 256
- #define ZGEMM_DEFAULT_P 128
- #else
- #define SGEMM_DEFAULT_P 320
- #define DGEMM_DEFAULT_P 160
- #define CGEMM_DEFAULT_P 160
- #define ZGEMM_DEFAULT_P 80
- #endif
-
- #define SGEMM_DEFAULT_Q 256
- #define CGEMM_DEFAULT_Q 256
- #define DGEMM_DEFAULT_Q 256
- #define ZGEMM_DEFAULT_Q 256
- #endif
-
- #define SYMV_P 8
-
- #endif
-
- #if defined(POWER6)
-
- #define SNUMOPT 4
- #define DNUMOPT 4
-
- #define GEMM_DEFAULT_OFFSET_A 384
- #define GEMM_DEFAULT_OFFSET_B 1024
- #define GEMM_DEFAULT_ALIGN 0x03fffUL
-
- #define SGEMM_DEFAULT_UNROLL_M 4
- #define SGEMM_DEFAULT_UNROLL_N 4
- #define DGEMM_DEFAULT_UNROLL_M 4
- #define DGEMM_DEFAULT_UNROLL_N 4
- #define CGEMM_DEFAULT_UNROLL_M 2
- #define CGEMM_DEFAULT_UNROLL_N 4
- #define ZGEMM_DEFAULT_UNROLL_M 2
- #define ZGEMM_DEFAULT_UNROLL_N 4
-
- #define SGEMM_DEFAULT_P 992
- #define DGEMM_DEFAULT_P 480
- #define CGEMM_DEFAULT_P 488
- #define ZGEMM_DEFAULT_P 248
-
- #define SGEMM_DEFAULT_Q 504
- #define DGEMM_DEFAULT_Q 504
- #define CGEMM_DEFAULT_Q 400
- #define ZGEMM_DEFAULT_Q 400
-
- #define SYMV_P 8
-
- #endif
-
- #if defined(POWER8)
-
- #define SNUMOPT 16
- #define DNUMOPT 8
-
- #define GEMM_DEFAULT_OFFSET_A 0
- #define GEMM_DEFAULT_OFFSET_B 65536
- #define GEMM_DEFAULT_ALIGN 0x0ffffUL
-
- #define SGEMM_DEFAULT_UNROLL_M 16
- #define SGEMM_DEFAULT_UNROLL_N 8
- #define DGEMM_DEFAULT_UNROLL_M 16
- #define DGEMM_DEFAULT_UNROLL_N 4
- #define CGEMM_DEFAULT_UNROLL_M 8
- #define CGEMM_DEFAULT_UNROLL_N 4
- #define ZGEMM_DEFAULT_UNROLL_M 8
- #define ZGEMM_DEFAULT_UNROLL_N 2
-
- #define SGEMM_DEFAULT_P 1280
- #define DGEMM_DEFAULT_P 640
- #define CGEMM_DEFAULT_P 640
- #define ZGEMM_DEFAULT_P 320
-
- #define SGEMM_DEFAULT_Q 640
- #define DGEMM_DEFAULT_Q 720
- #define CGEMM_DEFAULT_Q 640
- #define ZGEMM_DEFAULT_Q 640
-
- #define SYMV_P 8
-
- #endif
-
- #if defined(POWER9)
-
- #define SNUMOPT 16
- #define DNUMOPT 8
-
- #define GEMM_DEFAULT_OFFSET_A 0
- #define GEMM_DEFAULT_OFFSET_B 65536
- #define GEMM_DEFAULT_ALIGN 0x0ffffUL
-
- #define SGEMM_DEFAULT_UNROLL_M 16
- #define SGEMM_DEFAULT_UNROLL_N 8
- #define DGEMM_DEFAULT_UNROLL_M 16
- #define DGEMM_DEFAULT_UNROLL_N 4
- #define CGEMM_DEFAULT_UNROLL_M 8
- #define CGEMM_DEFAULT_UNROLL_N 4
- #define ZGEMM_DEFAULT_UNROLL_M 8
- #define ZGEMM_DEFAULT_UNROLL_N 2
-
- #define SGEMM_DEFAULT_P 832
- #define DGEMM_DEFAULT_P 128
- #define CGEMM_DEFAULT_P 512
- #define ZGEMM_DEFAULT_P 256
-
- #define SGEMM_DEFAULT_Q 1026
- #define DGEMM_DEFAULT_Q 384
- #define CGEMM_DEFAULT_Q 1026
- #define ZGEMM_DEFAULT_Q 1026
-
- #define SYMV_P 8
-
- #endif
-
- #if defined(SPARC) && defined(V7)
-
- #define SNUMOPT 4
- #define DNUMOPT 4
-
- #define GEMM_DEFAULT_OFFSET_A 0
- #define GEMM_DEFAULT_OFFSET_B 2048
- #define GEMM_DEFAULT_ALIGN 0x03fffUL
-
- #define SGEMM_DEFAULT_UNROLL_M 2
- #define SGEMM_DEFAULT_UNROLL_N 8
- #define DGEMM_DEFAULT_UNROLL_M 2
- #define DGEMM_DEFAULT_UNROLL_N 8
- #define CGEMM_DEFAULT_UNROLL_M 1
- #define CGEMM_DEFAULT_UNROLL_N 4
- #define ZGEMM_DEFAULT_UNROLL_M 1
- #define ZGEMM_DEFAULT_UNROLL_N 4
-
- #define SGEMM_DEFAULT_P 256
- #define DGEMM_DEFAULT_P 256
- #define CGEMM_DEFAULT_P 256
- #define ZGEMM_DEFAULT_P 256
-
- #define SGEMM_DEFAULT_Q 512
- #define DGEMM_DEFAULT_Q 256
- #define CGEMM_DEFAULT_Q 256
- #define ZGEMM_DEFAULT_Q 128
-
- #define SYMV_P 8
- #define GEMM_THREAD gemm_thread_mn
- #endif
-
- #if (defined(SPARC) && defined(V9)) || defined(__sparc_v9__)
-
- #define SNUMOPT 2
- #define DNUMOPT 2
-
- #define GEMM_DEFAULT_OFFSET_A 0
- #define GEMM_DEFAULT_OFFSET_B 2048
- #define GEMM_DEFAULT_ALIGN 0x03fffUL
-
- #define SGEMM_DEFAULT_UNROLL_M 4
- #define SGEMM_DEFAULT_UNROLL_N 4
- #define DGEMM_DEFAULT_UNROLL_M 4
- #define DGEMM_DEFAULT_UNROLL_N 4
- #define CGEMM_DEFAULT_UNROLL_M 2
- #define CGEMM_DEFAULT_UNROLL_N 2
- #define ZGEMM_DEFAULT_UNROLL_M 2
- #define ZGEMM_DEFAULT_UNROLL_N 2
-
- #define SGEMM_DEFAULT_P 512
- #define DGEMM_DEFAULT_P 512
- #define CGEMM_DEFAULT_P 512
- #define ZGEMM_DEFAULT_P 512
-
- #define SGEMM_DEFAULT_Q 1024
- #define DGEMM_DEFAULT_Q 512
- #define CGEMM_DEFAULT_Q 512
- #define ZGEMM_DEFAULT_Q 256
-
- #define SYMV_P 8
- #endif
-
- #ifdef SICORTEX
-
- #define SNUMOPT 2
- #define DNUMOPT 2
-
- #define GEMM_DEFAULT_OFFSET_A 0
- #define GEMM_DEFAULT_OFFSET_B 0
- #define GEMM_DEFAULT_ALIGN 0x03fffUL
-
- #define SGEMM_DEFAULT_UNROLL_M 2
- #define SGEMM_DEFAULT_UNROLL_N 8
- #define DGEMM_DEFAULT_UNROLL_M 2
- #define DGEMM_DEFAULT_UNROLL_N 8
- #define CGEMM_DEFAULT_UNROLL_M 1
- #define CGEMM_DEFAULT_UNROLL_N 4
- #define ZGEMM_DEFAULT_UNROLL_M 1
- #define ZGEMM_DEFAULT_UNROLL_N 4
-
- #define SGEMM_DEFAULT_P 108
- #define DGEMM_DEFAULT_P 112
- #define CGEMM_DEFAULT_P 108
- #define ZGEMM_DEFAULT_P 112
-
- #define SGEMM_DEFAULT_Q 288
- #define DGEMM_DEFAULT_Q 144
- #define CGEMM_DEFAULT_Q 144
- #define ZGEMM_DEFAULT_Q 72
-
- #define SGEMM_DEFAULT_R 2000
- #define DGEMM_DEFAULT_R 2000
- #define CGEMM_DEFAULT_R 2000
- #define ZGEMM_DEFAULT_R 2000
-
- #define SYMV_P 16
- #endif
-
- #ifdef LOONGSON3A
- ////Copy from SICORTEX
- #define SNUMOPT 2
- #define DNUMOPT 2
-
- #define GEMM_DEFAULT_OFFSET_A 0
- #define GEMM_DEFAULT_OFFSET_B 0
- #define GEMM_DEFAULT_ALIGN 0x03fffUL
-
- #define SGEMM_DEFAULT_UNROLL_M 8
- #define SGEMM_DEFAULT_UNROLL_N 4
-
- #define DGEMM_DEFAULT_UNROLL_M 4
- #define DGEMM_DEFAULT_UNROLL_N 4
-
- #define CGEMM_DEFAULT_UNROLL_M 4
- #define CGEMM_DEFAULT_UNROLL_N 2
-
- #define ZGEMM_DEFAULT_UNROLL_M 2
- #define ZGEMM_DEFAULT_UNROLL_N 2
-
- #define SGEMM_DEFAULT_P 64
- #define DGEMM_DEFAULT_P 44
- #define CGEMM_DEFAULT_P 64
- #define ZGEMM_DEFAULT_P 32
-
- #define SGEMM_DEFAULT_Q 192
- #define DGEMM_DEFAULT_Q 92
- #define CGEMM_DEFAULT_Q 128
- #define ZGEMM_DEFAULT_Q 80
-
- #define SGEMM_DEFAULT_R 640
- #define DGEMM_DEFAULT_R dgemm_r
- #define CGEMM_DEFAULT_R 640
- #define ZGEMM_DEFAULT_R 640
-
- #define GEMM_OFFSET_A1 0x10000
- #define GEMM_OFFSET_B1 0x100000
-
- #define SYMV_P 16
- #endif
-
- #ifdef LOONGSON3B
- #define SNUMOPT 2
- #define DNUMOPT 2
-
- #define GEMM_DEFAULT_OFFSET_A 0
- #define GEMM_DEFAULT_OFFSET_B 0
- #define GEMM_DEFAULT_ALIGN 0x03fffUL
-
- #define SGEMM_DEFAULT_UNROLL_M 2
- #define SGEMM_DEFAULT_UNROLL_N 2
-
- #define DGEMM_DEFAULT_UNROLL_M 2
- #define DGEMM_DEFAULT_UNROLL_N 2
-
- #define CGEMM_DEFAULT_UNROLL_M 2
- #define CGEMM_DEFAULT_UNROLL_N 2
-
- #define ZGEMM_DEFAULT_UNROLL_M 2
- #define ZGEMM_DEFAULT_UNROLL_N 2
-
- #define SGEMM_DEFAULT_P 64
- #define DGEMM_DEFAULT_P 24
- #define CGEMM_DEFAULT_P 24
- #define ZGEMM_DEFAULT_P 20
-
- #define SGEMM_DEFAULT_Q 192
- #define DGEMM_DEFAULT_Q 128
- #define CGEMM_DEFAULT_Q 128
- #define ZGEMM_DEFAULT_Q 64
-
- #define SGEMM_DEFAULT_R 512
- #define DGEMM_DEFAULT_R 512
- #define CGEMM_DEFAULT_R 512
- #define ZGEMM_DEFAULT_R 512
-
- #define GEMM_OFFSET_A1 0x10000
- #define GEMM_OFFSET_B1 0x100000
-
- #define SYMV_P 16
- #endif
-
- #if defined(P5600) || defined(MIPS1004K) || defined(I6400) || defined(P6600) || defined(I6500)
- #define SNUMOPT 2
- #define DNUMOPT 2
-
- #define GEMM_DEFAULT_OFFSET_A 0
- #define GEMM_DEFAULT_OFFSET_B 0
- #define GEMM_DEFAULT_ALIGN 0x03fffUL
-
- #ifdef HAVE_MSA
- #define SGEMM_DEFAULT_UNROLL_M 8
- #define SGEMM_DEFAULT_UNROLL_N 8
-
- #define DGEMM_DEFAULT_UNROLL_M 8
- #define DGEMM_DEFAULT_UNROLL_N 4
-
- #define CGEMM_DEFAULT_UNROLL_M 8
- #define CGEMM_DEFAULT_UNROLL_N 4
-
- #define ZGEMM_DEFAULT_UNROLL_M 4
- #define ZGEMM_DEFAULT_UNROLL_N 4
- #else
- #define SGEMM_DEFAULT_UNROLL_M 2
- #define SGEMM_DEFAULT_UNROLL_N 2
-
- #define DGEMM_DEFAULT_UNROLL_M 2
- #define DGEMM_DEFAULT_UNROLL_N 2
-
- #define CGEMM_DEFAULT_UNROLL_M 2
- #define CGEMM_DEFAULT_UNROLL_N 2
-
- #define ZGEMM_DEFAULT_UNROLL_M 2
- #define ZGEMM_DEFAULT_UNROLL_N 2
- #endif
-
- #define SGEMM_DEFAULT_P 128
- #define DGEMM_DEFAULT_P 128
- #define CGEMM_DEFAULT_P 96
- #define ZGEMM_DEFAULT_P 64
-
- #define SGEMM_DEFAULT_Q 240
- #define DGEMM_DEFAULT_Q 120
- #define CGEMM_DEFAULT_Q 120
- #define ZGEMM_DEFAULT_Q 120
-
- #define SGEMM_DEFAULT_R 12288
- #define DGEMM_DEFAULT_R 8192
- #define CGEMM_DEFAULT_R 4096
- #define ZGEMM_DEFAULT_R 4096
-
- #define SYMV_P 16
- #endif
-
- #ifdef ARMV7
- #define SNUMOPT 2
- #define DNUMOPT 2
-
- #define GEMM_DEFAULT_OFFSET_A 0
- #define GEMM_DEFAULT_OFFSET_B 0
- #define GEMM_DEFAULT_ALIGN 0x03fffUL
-
- #define SGEMM_DEFAULT_UNROLL_M 4
- #define SGEMM_DEFAULT_UNROLL_N 4
-
- #define DGEMM_DEFAULT_UNROLL_M 4
- #define DGEMM_DEFAULT_UNROLL_N 4
-
- #define CGEMM_DEFAULT_UNROLL_M 2
- #define CGEMM_DEFAULT_UNROLL_N 2
-
- #define ZGEMM_DEFAULT_UNROLL_M 2
- #define ZGEMM_DEFAULT_UNROLL_N 2
-
- #define SGEMM_DEFAULT_P 128
- #define DGEMM_DEFAULT_P 128
- #define CGEMM_DEFAULT_P 96
- #define ZGEMM_DEFAULT_P 64
-
- #define SGEMM_DEFAULT_Q 240
- #define DGEMM_DEFAULT_Q 120
- #define CGEMM_DEFAULT_Q 120
- #define ZGEMM_DEFAULT_Q 120
-
- #define SGEMM_DEFAULT_R 12288
- #define DGEMM_DEFAULT_R 8192
- #define CGEMM_DEFAULT_R 4096
- #define ZGEMM_DEFAULT_R 4096
-
-
-
- #define SYMV_P 16
- #endif
-
-
- #if defined(ARMV6)
- #define SNUMOPT 2
- #define DNUMOPT 2
-
- #define GEMM_DEFAULT_OFFSET_A 0
- #define GEMM_DEFAULT_OFFSET_B 0
- #define GEMM_DEFAULT_ALIGN 0x03fffUL
-
- #define SGEMM_DEFAULT_UNROLL_M 4
- #define SGEMM_DEFAULT_UNROLL_N 2
-
- #define DGEMM_DEFAULT_UNROLL_M 4
- #define DGEMM_DEFAULT_UNROLL_N 2
-
- #define CGEMM_DEFAULT_UNROLL_M 2
- #define CGEMM_DEFAULT_UNROLL_N 2
-
- #define ZGEMM_DEFAULT_UNROLL_M 2
- #define ZGEMM_DEFAULT_UNROLL_N 2
-
- #define SGEMM_DEFAULT_P 128
- #define DGEMM_DEFAULT_P 128
- #define CGEMM_DEFAULT_P 96
- #define ZGEMM_DEFAULT_P 64
-
- #define SGEMM_DEFAULT_Q 240
- #define DGEMM_DEFAULT_Q 120
- #define CGEMM_DEFAULT_Q 120
- #define ZGEMM_DEFAULT_Q 120
-
- #define SGEMM_DEFAULT_R 12288
- #define DGEMM_DEFAULT_R 8192
- #define CGEMM_DEFAULT_R 4096
- #define ZGEMM_DEFAULT_R 4096
-
-
- #define SYMV_P 16
- #endif
-
- // Common ARMv8 parameters
- #if defined(ARMV8)
-
- #define SNUMOPT 2
- #define DNUMOPT 2
-
- #define GEMM_DEFAULT_OFFSET_A 0
- #define GEMM_DEFAULT_OFFSET_B 0
- #define GEMM_DEFAULT_ALIGN 0x03fffUL
-
- #define SYMV_P 16
-
- // Darwin / Cross
- #if defined(OS_DARWIN) && defined(CROSS)
-
- #define SGEMM_DEFAULT_UNROLL_M 2
- #define SGEMM_DEFAULT_UNROLL_N 2
-
- #define DGEMM_DEFAULT_UNROLL_M 2
- #define DGEMM_DEFAULT_UNROLL_N 2
-
- #define CGEMM_DEFAULT_UNROLL_M 2
- #define CGEMM_DEFAULT_UNROLL_N 2
-
- #define ZGEMM_DEFAULT_UNROLL_M 2
- #define ZGEMM_DEFAULT_UNROLL_N 2
-
- #define SGEMM_DEFAULT_P 128
- #define DGEMM_DEFAULT_P 128
- #define CGEMM_DEFAULT_P 96
- #define ZGEMM_DEFAULT_P 64
-
- #define SGEMM_DEFAULT_Q 240
- #define DGEMM_DEFAULT_Q 120
- #define CGEMM_DEFAULT_Q 120
- #define ZGEMM_DEFAULT_Q 120
-
- #define SGEMM_DEFAULT_R 12288
- #define DGEMM_DEFAULT_R 8192
- #define CGEMM_DEFAULT_R 4096
- #define ZGEMM_DEFAULT_R 4096
-
- #else // Linux / Native
-
- #if defined(CORTEXA53) || defined(CORTEXA57) || \
- defined(CORTEXA72) || defined(CORTEXA73) || \
- defined(FALKOR) || defined(TSV110)
-
- #define SGEMM_DEFAULT_UNROLL_M 16
- #define SGEMM_DEFAULT_UNROLL_N 4
-
- #define DGEMM_DEFAULT_UNROLL_M 8
- #define DGEMM_DEFAULT_UNROLL_N 4
-
- #define CGEMM_DEFAULT_UNROLL_M 8
- #define CGEMM_DEFAULT_UNROLL_N 4
-
- #define ZGEMM_DEFAULT_UNROLL_M 4
- #define ZGEMM_DEFAULT_UNROLL_N 4
-
- #define SGEMM_DEFAULT_P 512
- #define DGEMM_DEFAULT_P 256
- #define CGEMM_DEFAULT_P 256
- #define ZGEMM_DEFAULT_P 128
-
- #define SGEMM_DEFAULT_Q 1024
- #define DGEMM_DEFAULT_Q 512
- #define CGEMM_DEFAULT_Q 512
- #define ZGEMM_DEFAULT_Q 512
-
- #define SGEMM_DEFAULT_R 4096
- #define DGEMM_DEFAULT_R 4096
- #define CGEMM_DEFAULT_R 4096
- #define ZGEMM_DEFAULT_R 2048
-
- #elif defined(THUNDERX)
-
- #define SGEMM_DEFAULT_UNROLL_M 4
- #define SGEMM_DEFAULT_UNROLL_N 4
-
- #define DGEMM_DEFAULT_UNROLL_M 2
- #define DGEMM_DEFAULT_UNROLL_N 2
-
- #define CGEMM_DEFAULT_UNROLL_M 2
- #define CGEMM_DEFAULT_UNROLL_N 2
-
- #define ZGEMM_DEFAULT_UNROLL_M 2
- #define ZGEMM_DEFAULT_UNROLL_N 2
-
- #define SGEMM_DEFAULT_P 128
- #define DGEMM_DEFAULT_P 128
- #define CGEMM_DEFAULT_P 96
- #define ZGEMM_DEFAULT_P 64
-
- #define SGEMM_DEFAULT_Q 240
- #define DGEMM_DEFAULT_Q 120
- #define CGEMM_DEFAULT_Q 120
- #define ZGEMM_DEFAULT_Q 120
-
- #define SGEMM_DEFAULT_R 12288
- #define DGEMM_DEFAULT_R 8192
- #define CGEMM_DEFAULT_R 4096
- #define ZGEMM_DEFAULT_R 4096
-
- #elif defined(THUNDERX2T99)
-
- #define SGEMM_DEFAULT_UNROLL_M 16
- #define SGEMM_DEFAULT_UNROLL_N 4
-
- #define DGEMM_DEFAULT_UNROLL_M 8
- #define DGEMM_DEFAULT_UNROLL_N 4
-
- #define CGEMM_DEFAULT_UNROLL_M 8
- #define CGEMM_DEFAULT_UNROLL_N 4
-
- #define ZGEMM_DEFAULT_UNROLL_M 4
- #define ZGEMM_DEFAULT_UNROLL_N 4
-
- #define SGEMM_DEFAULT_P 128
- #define DGEMM_DEFAULT_P 160
- #define CGEMM_DEFAULT_P 128
- #define ZGEMM_DEFAULT_P 128
-
- #define SGEMM_DEFAULT_Q 352
- #define DGEMM_DEFAULT_Q 128
- #define CGEMM_DEFAULT_Q 224
- #define ZGEMM_DEFAULT_Q 112
-
- #define SGEMM_DEFAULT_R 4096
- #define DGEMM_DEFAULT_R 4096
- #define CGEMM_DEFAULT_R 4096
- #define ZGEMM_DEFAULT_R 4096
-
- #else // Other/undetected ARMv8 cores
-
- #define SGEMM_DEFAULT_UNROLL_M 16
- #define SGEMM_DEFAULT_UNROLL_N 4
-
- #define DGEMM_DEFAULT_UNROLL_M 8
- #define DGEMM_DEFAULT_UNROLL_N 4
-
- #define CGEMM_DEFAULT_UNROLL_M 8
- #define CGEMM_DEFAULT_UNROLL_N 4
-
- #define ZGEMM_DEFAULT_UNROLL_M 4
- #define ZGEMM_DEFAULT_UNROLL_N 4
-
- #define SGEMM_DEFAULT_P 128
- #define DGEMM_DEFAULT_P 160
- #define CGEMM_DEFAULT_P 128
- #define ZGEMM_DEFAULT_P 128
-
- #define SGEMM_DEFAULT_Q 352
- #define DGEMM_DEFAULT_Q 128
- #define CGEMM_DEFAULT_Q 224
- #define ZGEMM_DEFAULT_Q 112
-
- #define SGEMM_DEFAULT_R 4096
- #define DGEMM_DEFAULT_R 4096
- #define CGEMM_DEFAULT_R 4096
- #define ZGEMM_DEFAULT_R 4096
-
- #endif // Cores
-
- #endif // Linux / Darwin
-
- #endif // ARMv8
-
- #if defined(ARMV5)
- #define SNUMOPT 2
- #define DNUMOPT 2
-
- #define GEMM_DEFAULT_OFFSET_A 0
- #define GEMM_DEFAULT_OFFSET_B 0
- #define GEMM_DEFAULT_ALIGN 0x03fffUL
-
- #define SGEMM_DEFAULT_UNROLL_M 2
- #define SGEMM_DEFAULT_UNROLL_N 2
-
- #define DGEMM_DEFAULT_UNROLL_M 2
- #define DGEMM_DEFAULT_UNROLL_N 2
-
- #define CGEMM_DEFAULT_UNROLL_M 2
- #define CGEMM_DEFAULT_UNROLL_N 2
-
- #define ZGEMM_DEFAULT_UNROLL_M 2
- #define ZGEMM_DEFAULT_UNROLL_N 2
-
- #define SGEMM_DEFAULT_P 128
- #define DGEMM_DEFAULT_P 128
- #define CGEMM_DEFAULT_P 96
- #define ZGEMM_DEFAULT_P 64
-
- #define SGEMM_DEFAULT_Q 240
- #define DGEMM_DEFAULT_Q 120
- #define CGEMM_DEFAULT_Q 120
- #define ZGEMM_DEFAULT_Q 120
-
- #define SGEMM_DEFAULT_R 12288
- #define DGEMM_DEFAULT_R 8192
- #define CGEMM_DEFAULT_R 4096
- #define ZGEMM_DEFAULT_R 4096
-
-
- #define SYMV_P 16
- #endif
-
-
-
- #ifdef CORTEXA9
- #define SNUMOPT 2
- #define DNUMOPT 2
-
- #define GEMM_DEFAULT_OFFSET_A 0
- #define GEMM_DEFAULT_OFFSET_B 0
- #define GEMM_DEFAULT_ALIGN 0x03fffUL
-
- #define SGEMM_DEFAULT_UNROLL_M 4
- #define SGEMM_DEFAULT_UNROLL_N 4
-
- #define DGEMM_DEFAULT_UNROLL_M 4
- #define DGEMM_DEFAULT_UNROLL_N 4
-
- #define CGEMM_DEFAULT_UNROLL_M 2
- #define CGEMM_DEFAULT_UNROLL_N 2
-
- #define ZGEMM_DEFAULT_UNROLL_M 2
- #define ZGEMM_DEFAULT_UNROLL_N 2
-
- #define SGEMM_DEFAULT_P 128
- #define DGEMM_DEFAULT_P 128
- #define CGEMM_DEFAULT_P 96
- #define ZGEMM_DEFAULT_P 64
-
- #define SGEMM_DEFAULT_Q 240
- #define DGEMM_DEFAULT_Q 120
- #define CGEMM_DEFAULT_Q 120
- #define ZGEMM_DEFAULT_Q 120
-
- #define SGEMM_DEFAULT_R 12288
- #define DGEMM_DEFAULT_R 8192
- #define CGEMM_DEFAULT_R 4096
- #define ZGEMM_DEFAULT_R 4096
-
-
-
- #define SYMV_P 16
- #endif
-
-
- #ifdef CORTEXA15
- #define SNUMOPT 2
- #define DNUMOPT 2
-
- #define GEMM_DEFAULT_OFFSET_A 0
- #define GEMM_DEFAULT_OFFSET_B 0
- #define GEMM_DEFAULT_ALIGN 0x03fffUL
-
- #define SGEMM_DEFAULT_UNROLL_M 4
- #define SGEMM_DEFAULT_UNROLL_N 4
-
- #define DGEMM_DEFAULT_UNROLL_M 4
- #define DGEMM_DEFAULT_UNROLL_N 4
-
- #define CGEMM_DEFAULT_UNROLL_M 2
- #define CGEMM_DEFAULT_UNROLL_N 2
-
- #define ZGEMM_DEFAULT_UNROLL_M 2
- #define ZGEMM_DEFAULT_UNROLL_N 2
-
- #define SGEMM_DEFAULT_P 128
- #define DGEMM_DEFAULT_P 128
- #define CGEMM_DEFAULT_P 96
- #define ZGEMM_DEFAULT_P 64
-
- #define SGEMM_DEFAULT_Q 240
- #define DGEMM_DEFAULT_Q 120
- #define CGEMM_DEFAULT_Q 120
- #define ZGEMM_DEFAULT_Q 120
-
- #define SGEMM_DEFAULT_R 12288
- #define DGEMM_DEFAULT_R 8192
- #define CGEMM_DEFAULT_R 4096
- #define ZGEMM_DEFAULT_R 4096
-
-
-
- #define SYMV_P 16
- #endif
-
-
- #if defined(ZARCH_GENERIC)
- #define SNUMOPT 2
- #define DNUMOPT 2
-
- #define GEMM_DEFAULT_OFFSET_A 0
- #define GEMM_DEFAULT_OFFSET_B 0
- #define GEMM_DEFAULT_ALIGN 0x03fffUL
-
- #define SGEMM_DEFAULT_UNROLL_M 2
- #define SGEMM_DEFAULT_UNROLL_N 2
-
- #define DGEMM_DEFAULT_UNROLL_M 2
- #define DGEMM_DEFAULT_UNROLL_N 2
-
- #define CGEMM_DEFAULT_UNROLL_M 2
- #define CGEMM_DEFAULT_UNROLL_N 2
-
- #define ZGEMM_DEFAULT_UNROLL_M 2
- #define ZGEMM_DEFAULT_UNROLL_N 2
-
- #define SGEMM_DEFAULT_P 128
- #define DGEMM_DEFAULT_P 128
- #define CGEMM_DEFAULT_P 96
- #define ZGEMM_DEFAULT_P 64
-
- #define SGEMM_DEFAULT_Q 240
- #define DGEMM_DEFAULT_Q 120
- #define CGEMM_DEFAULT_Q 120
- #define ZGEMM_DEFAULT_Q 120
-
- #define SGEMM_DEFAULT_R 12288
- #define DGEMM_DEFAULT_R 8192
- #define CGEMM_DEFAULT_R 4096
- #define ZGEMM_DEFAULT_R 4096
-
-
- #define SYMV_P 16
- #endif
-
- #if defined(Z13)
- #define SNUMOPT 2
- #define DNUMOPT 2
-
- #define GEMM_DEFAULT_OFFSET_A 0
- #define GEMM_DEFAULT_OFFSET_B 0
- #define GEMM_DEFAULT_ALIGN 0x03fffUL
-
- #define SGEMM_DEFAULT_UNROLL_M 8
- #define SGEMM_DEFAULT_UNROLL_N 4
-
- #define DGEMM_DEFAULT_UNROLL_M 8
- #define DGEMM_DEFAULT_UNROLL_N 4
-
- #define CGEMM_DEFAULT_UNROLL_M 4
- #define CGEMM_DEFAULT_UNROLL_N 4
-
- #define ZGEMM_DEFAULT_UNROLL_M 4
- #define ZGEMM_DEFAULT_UNROLL_N 4
-
- #define SGEMM_DEFAULT_P 456
- #define DGEMM_DEFAULT_P 320
- #define CGEMM_DEFAULT_P 480
- #define ZGEMM_DEFAULT_P 224
-
- #define SGEMM_DEFAULT_Q 488
- #define DGEMM_DEFAULT_Q 384
- #define CGEMM_DEFAULT_Q 128
- #define ZGEMM_DEFAULT_Q 352
-
- #define SGEMM_DEFAULT_R 8192
- #define DGEMM_DEFAULT_R 4096
- #define CGEMM_DEFAULT_R 4096
- #define ZGEMM_DEFAULT_R 2048
-
-
- #define SYMV_P 16
- #endif
-
-
- #if defined(Z14)
- #define SNUMOPT 2
- #define DNUMOPT 2
-
- #define GEMM_DEFAULT_OFFSET_A 0
- #define GEMM_DEFAULT_OFFSET_B 0
- #define GEMM_DEFAULT_ALIGN 0x03fffUL
-
- #define SGEMM_DEFAULT_UNROLL_M 8
- #define SGEMM_DEFAULT_UNROLL_N 4
-
- #define DGEMM_DEFAULT_UNROLL_M 8
- #define DGEMM_DEFAULT_UNROLL_N 4
-
- #define CGEMM_DEFAULT_UNROLL_M 4
- #define CGEMM_DEFAULT_UNROLL_N 4
-
- #define ZGEMM_DEFAULT_UNROLL_M 4
- #define ZGEMM_DEFAULT_UNROLL_N 4
-
- #define SGEMM_DEFAULT_P 456
- #define DGEMM_DEFAULT_P 320
- #define CGEMM_DEFAULT_P 480
- #define ZGEMM_DEFAULT_P 224
-
- #define SGEMM_DEFAULT_Q 488
- #define DGEMM_DEFAULT_Q 384
- #define CGEMM_DEFAULT_Q 128
- #define ZGEMM_DEFAULT_Q 352
-
- #define SGEMM_DEFAULT_R 8192
- #define DGEMM_DEFAULT_R 4096
- #define CGEMM_DEFAULT_R 4096
- #define ZGEMM_DEFAULT_R 2048
-
-
- #define SYMV_P 16
- #endif
-
-
-
- #ifdef GENERIC
-
- #define SNUMOPT 2
- #define DNUMOPT 2
-
- #define GEMM_DEFAULT_OFFSET_A 0
- #define GEMM_DEFAULT_OFFSET_B 0
- #define GEMM_DEFAULT_ALIGN 0x0ffffUL
-
- #define SGEMM_DEFAULT_UNROLL_N 2
- #define DGEMM_DEFAULT_UNROLL_N 2
- #define QGEMM_DEFAULT_UNROLL_N 2
- #define CGEMM_DEFAULT_UNROLL_N 2
- #define ZGEMM_DEFAULT_UNROLL_N 2
- #define XGEMM_DEFAULT_UNROLL_N 1
-
- #ifdef ARCH_X86
- #define SGEMM_DEFAULT_UNROLL_M 2
- #define DGEMM_DEFAULT_UNROLL_M 2
- #define QGEMM_DEFAULT_UNROLL_M 2
- #define CGEMM_DEFAULT_UNROLL_M 2
- #define ZGEMM_DEFAULT_UNROLL_M 2
- #define XGEMM_DEFAULT_UNROLL_M 1
- #else
- #define SGEMM_DEFAULT_UNROLL_M 2
- #define DGEMM_DEFAULT_UNROLL_M 2
- #define QGEMM_DEFAULT_UNROLL_M 2
- #define CGEMM_DEFAULT_UNROLL_M 2
- #define ZGEMM_DEFAULT_UNROLL_M 2
- #define XGEMM_DEFAULT_UNROLL_M 1
- #endif
-
- #define SGEMM_DEFAULT_P sgemm_p
- #define DGEMM_DEFAULT_P dgemm_p
- #define QGEMM_DEFAULT_P qgemm_p
- #define CGEMM_DEFAULT_P cgemm_p
- #define ZGEMM_DEFAULT_P zgemm_p
- #define XGEMM_DEFAULT_P xgemm_p
-
- #define SGEMM_DEFAULT_R sgemm_r
- #define DGEMM_DEFAULT_R dgemm_r
- #define QGEMM_DEFAULT_R qgemm_r
- #define CGEMM_DEFAULT_R cgemm_r
- #define ZGEMM_DEFAULT_R zgemm_r
- #define XGEMM_DEFAULT_R xgemm_r
-
- #define SGEMM_DEFAULT_Q 128
- #define DGEMM_DEFAULT_Q 128
- #define QGEMM_DEFAULT_Q 128
- #define CGEMM_DEFAULT_Q 128
- #define ZGEMM_DEFAULT_Q 128
- #define XGEMM_DEFAULT_Q 128
-
- #define SYMV_P 16
-
- #endif
-
- #ifndef QGEMM_DEFAULT_UNROLL_M
- #define QGEMM_DEFAULT_UNROLL_M 2
- #endif
-
- #ifndef QGEMM_DEFAULT_UNROLL_N
- #define QGEMM_DEFAULT_UNROLL_N 2
- #endif
-
- #ifndef XGEMM_DEFAULT_UNROLL_M
- #define XGEMM_DEFAULT_UNROLL_M 2
- #endif
-
- #ifndef XGEMM_DEFAULT_UNROLL_N
- #define XGEMM_DEFAULT_UNROLL_N 2
- #endif
-
- #ifndef HAVE_SSE2
- #define SHUFPD_0 shufps $0x44,
- #define SHUFPD_1 shufps $0x4e,
- #define SHUFPD_2 shufps $0xe4,
- #define SHUFPD_3 shufps $0xee,
- #endif
-
- #ifndef SHUFPD_0
- #define SHUFPD_0 shufpd $0,
- #endif
-
- #ifndef SHUFPD_1
- #define SHUFPD_1 shufpd $1,
- #endif
-
- #ifndef SHUFPD_2
- #define SHUFPD_2 shufpd $2,
- #endif
-
- #ifndef SHUFPD_3
- #define SHUFPD_3 shufpd $3,
- #endif
-
- #ifndef SHUFPS_39
- #define SHUFPS_39 shufps $0x39,
- #endif
-
-
- #endif
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