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zgemm_kernel_cell.S 34 kB

rebase? (#1) * With the Intel compiler on Linux, prefer ifort for the final link step icc has known problems with mixed-language builds that ifort can handle just fine. Fixes #1956 * Rename operands to put lda on the input/output constraint list * Fix wrong constraints in inline assembly for #2009 * Fix inline assembly constraints rework indices to allow marking argument lda4 as input and output. For #2009 * Fix inline assembly constraints rework indices to allow marking argument lda as input and output. * Fix inline assembly constraints * Fix inline assembly constraints * Fix inline assembly constraints in Bulldozer TRSM kernels rework indices to allow marking i,as and bs as both input and output (marked operand n1 as well for simplicity). For #2009 * Correct range_n limiting same bug as seen in #1388, somehow missed in corresponding PR #1389 * Allow multithreading TRMV again revert workaround introduced for issue #1332 as the actual cause appears to be my incorrect fix from #1262 (see #1388) * Fix error introduced during cleanup * Reduce list of kernels in the dynamic arch build to make compilation complete reliably within the 1h limit again * init * move fix to right place * Fix missing -c option in AVX512 test * Fix AVX512 test always returning false due to missing compiler option * Make x86_32 imply NO_AVX2, NO_AVX512 in addition to NO_AVX fixes #2033 * Keep xcode8.3 for osx BINARY=32 build as xcode10 deprecated i386 * Make sure that AVX512 is disabled in 32bit builds for #2033 * Improve handling of NO_STATIC and NO_SHARED to avoid surprises from defining either as zero. Fixes #2035 by addressing some concerns from #1422 * init * address warning introed with #1814 et al * Restore locking optimizations for OpenMP case restore another accidentally dropped part of #1468 that was missed in #2004 to address performance regression reported in #1461 * HiSilicon tsv110 CPUs optimization branch add HiSilicon tsv110 CPUs optimization branch * add TARGET support for HiSilicon tsv110 CPUs * add TARGET support for HiSilicon tsv110 CPUs * add TARGET support for HiSilicon tsv110 CPUs * Fix module definition conflicts between LAPACK and ReLAPACK for #2043 * Do not compile in AVX512 check if AVX support is disabled xgetbv is function depends on NO_AVX being undefined - we could change that too, but that combo is unlikely to work anyway * ctest.c : add __POWERPC__ for PowerMac * Fix crash in sgemm SSE/nano kernel on x86_64 Fix bug #2047. Signed-off-by: Celelibi <celelibi@gmail.com> * param.h : enable defines for PPC970 on DarwinOS fixes: gemm.c: In function 'sgemm_': ../common_param.h:981:18: error: 'SGEMM_DEFAULT_P' undeclared (first use in this function) #define SGEMM_P SGEMM_DEFAULT_P ^ * common_power.h: force DCBT_ARG 0 on PPC970 Darwin without this, we see ../kernel/power/gemv_n.S:427:Parameter syntax error and many more similar entries that relates to this assembly command dcbt 8, r24, r18 this change makes the DCBT_ARG = 0 and openblas builds through to completion on PowerMac 970 Tests pass * Make TARGET=GENERIC compatible with DYNAMIC_ARCH=1 for issue #2048 * make DYNAMIC_ARCH=1 package work on TSV110. * make DYNAMIC_ARCH=1 package work on TSV110 * Add Intel Denverton for #2048 * Add Intel Denverton * Change 64-bit detection as explained in #2056 * Trivial typo fix as suggested in #2022 * Disable the AVX512 DGEMM kernel (again) Due to as yet unresolved errors seen in #1955 and #2029 * Use POSIX getenv on Cygwin The Windows-native GetEnvironmentVariable cannot be relied on, as Cygwin does not always copy environment variables set through Cygwin to the Windows environment block, particularly after fork(). * Fix for #2063: The DllMain used in Cygwin did not run the thread memory pool cleanup upon THREAD_DETACH which is needed when compiled with USE_TLS=1. * Also call CloseHandle on each thread, as well as on the event so as to not leak thread handles. * AIX asm syntax changes needed for shared object creation * power9 makefile. dgemm based on power8 kernel with following changes : 32x unrolled 16x4 kernel and 8x4 kernel using (lxv stxv butterfly rank1 update). improvement from 17 to 22-23gflops. dtrmm cases were added into dgemm itself * Expose CBLAS interfaces for I?MIN and I?MAX * Build CBLAS interfaces for I?MIN and I?MAX * Add declarations for ?sum and cblas_?sum * Add interface for ?sum (derived from ?asum) * Add ?sum * Add implementations of ssum/dsum and csum/zsum as trivial copies of asum/zsasum with the fabs calls replaced by fmov to preserve code structure * Add ARM implementations of ?sum (trivial copies of the respective ?asum with the fabs calls removed) * Add ARM64 implementations of ?sum as trivial copies of the respective ?asum kernels with the fabs calls removed * Add ia64 implementation of ?sum as trivial copy of asum with the fabs calls removed * Add MIPS implementation of ?sum as trivial copy of ?asum with the fabs calls removed * Add MIPS64 implementation of ?sum as trivial copy of ?asum with the fabs replaced by mov to preserve code structure * Add POWER implementation of ?sum as trivial copy of ?asum with the fabs replaced by fmr to preserve code structure * Add SPARC implementation of ?sum as trivial copy of ?asum with the fabs replaced by fmov to preserve code structure * Add x86 implementation of ?sum as trivial copy of ?asum with the fabs calls removed * Add x86_64 implementation of ?sum as trivial copy of ?asum with the fabs calls removed * Add ZARCH implementation of ?sum as trivial copies of the respective ?asum kernels with the ABS and vflpsb calls removed * Detect 32bit environment on 64bit ARM hardware for #2056, using same approach as #2058 * Add cmake defaults for ?sum kernels * Add ?sum * Add ?sum definitions for generic kernel * Add declarations for ?sum * Add -lm and disable EXPRECISION support on *BSD fixes #2075 * Add in runtime CPU detection for POWER. * snprintf define consolidated to common.h * Support INTERFACE64=1 * Add support for INTERFACE64 and fix XERBLA calls 1. Replaced all instances of "int" with "blasint" 2. Added string length as "hidden" third parameter in calls to fortran XERBLA * Correct length of name string in xerbla call * Avoid out-of-bounds accesses in LAPACK EIG tests see https://github.com/Reference-LAPACK/lapack/issues/333 * Correct INFO=4 condition * Disable reallocation of work array in xSYTRF as it appears to cause memory management problems (seen in the LAPACK tests) * Disable repeated recursion on Ab_BR in ReLAPACK xGBTRF due to crashes in LAPACK tests * sgemm/strmm * Update Changelog with changes from 0.3.6 * Increment version to 0.3.7.dev * Increment version to 0.3.7.dev * Misc. typo fixes Found via `codespell -q 3 -w -L ith,als,dum,nd,amin,nto,wis,ba -S ./relapack,./kernel,./lapack-netlib` * Correct argument of CPU_ISSET for glibc <2.5 fixes #2104 * conflict resolve * Revert reference/ fixes * Revert Changelog.txt typos * Disable the SkyLakeX DGEMMITCOPY kernel as well as a stopgap measure for https://github.com/numpy/numpy/issues/13401 as mentioned in #1955 * Disable DGEMMINCOPY as well for now #1955 * init * Fix errors in cpu enumeration with glibc 2.6 for #2114 * Change two http links to https Closes #2109 * remove redundant code #2113 * Set up CI with Azure Pipelines [skip ci] * TST: add native POWER8 to CI * add native POWER8 testing to Travis CI matrix with ppc64le os entry * Update link to IBM MASS library, update cpu support status * first try migrating one of the arm builds from travis * fix tabbing in azure commands * Update azure-pipelines.yml take out offending lines (although stolen from https://github.com/conda-forge/opencv-feedstock azure-pipelines fiie) * Update azure-pipelines.yml * Update azure-pipelines.yml * Update azure-pipelines.yml * Update azure-pipelines.yml * DOC: Add Azure CI status badge * Add ARMV6 build to azure CI setup (#2122) using aytekinar's Alpine image and docker script from the Travis setup [skip ci] * TST: Azure manylinux1 & clean-up * remove some of the steps & comments from the original Azure yml template * modify the trigger section to use develop since OpenBLAS primarily uses this branch; use the same batching behavior as downstream projects NumPy/ SciPy * remove Travis emulated ARMv6 gcc build because this now happens in Azure * use documented Ubuntu vmImage name for Azure and add in a manylinux1 test run to the matrix [skip appveyor] * Add NO_AFFINITY to available options on Linux, and set it to ON to match the gmake default. Fixes second part of #2114 * Replace ISMIN and ISAMIN kernels on all x86_64 platforms (#2125) * Mark iamax_sse.S as unsuitable for MIN due to issue #2116 * Use iamax.S rather than iamax_sse.S for ISMIN/ISAMIN on all x86_64 as workaround for #2116 * Move ARMv8 gcc build from Travis to Azure * Move ARMv8 gcc build from Travis to Azure * Update .travis.yml * Test drone CI * install make * remove sudo * Install gcc * Install perl * Install gfortran and add a clang job * gfortran->gcc-gfortran * Switch to ubuntu and parallel jobs * apt update * Fix typo * update yes * no need of gcc in clang build * Add a cmake build as well * Add cmake builds and print options * build without lapack on cmake * parallel build * See if ubuntu 19.04 fixes the ICE * Remove qemu armv8 builds * arm32 build * Fix typo * TST: add SkylakeX AVX512 CI test * adapt the C-level reproducer code for some recent SkylakeX AVX512 kernel issues, provided by Isuru Fernando and modified by Martin Kroeker, for usage in the utest suite * add an Intel SDE SkylakeX emulation utest run to the Azure CI matrix; a custom Docker build was required because Ubuntu image provided by Azure does not support AVX512VL instructions * Add option USE_LOCKING for single-threaded build with locking support for calling from concurrent threads * Add option USE_LOCKING for single-threaded build with locking support * Add option USE_LOCKING for SMP-like locking in USE_THREAD=0 builds * Add option USE_LOCKING but keep default settings intact * Remove unrelated change * Do not try ancient PGI hacks with recent versions of that compiler should fix #2139 * Build and run utests in any case, they do their own checks for fortran availability * Add softfp support in min/max kernels fix for #1912 * Revert "Add softfp support in min/max kernels" * Separate implementations of AMAX and IAMAX on arm As noted in #1912 and comment on #1942, the combined implementation happens to "do the right thing" on hardfp, but cannot return both value and index on softfp where they would have to share the return register * Ensure correct output for DAMAX with softfp * Use generic kernels for complex (I)AMAX to support softfp * improved zgemm power9 based on power8 * upload thread safety test folder * hook up c++ thread safety test (main Makefile) * add c++ thread test option to Makefile.rule * Document NO_AVX512 for #2151 * sgemm pipeline improved, zgemm rewritten without inner packs, ABI lxvx v20 fixed with vs52 * Fix detection of AVX512 capable compilers in getarch 21eda8b5 introduced a check in getarch.c to test if the compiler is capable of AVX512. This check currently fails, since the used __AVX2__ macro is only defined if getarch itself was compiled with AVX2/AVX512 support. Make sure this is the case by building getarch with -march=native on x86_64. It is only supposed to run on the build host anyway. * c_check: Unlink correct file * power9 zgemm ztrmm optimized * conflict resolve * Add gfortran workaround for ABI violations in LAPACKE for #2154 (see gcc bug 90329) * Add gfortran workaround for ABI violations for #2154 (see gcc bug 90329) * Add gfortran workaround for potential ABI violation for #2154 * Update fc.cmake * Remove any inadvertent use of -march=native from DYNAMIC_ARCH builds from #2143, -march=native precludes use of more specific options like -march=skylake-avx512 in individual kernels, and defeats the purpose of dynamic arch anyway. * Avoid unintentional activation of TLS code via USE_TLS=0 fixes #2149 * Do not force gcc options on non-gcc compilers fixes compile failure with pgi 18.10 as reported on OpenBLAS-users * Update Makefile.x86_64 * Zero ecx with a mov instruction PGI assembler does not like the initialization in the constraints. * Fix mov syntax * new sgemm 8x16 * Update dtrmm_kernel_16x4_power8.S * PGI compiler does not like -march=native * Fix build on FreeBSD/powerpc64. Signed-off-by: Piotr Kubaj <pkubaj@anongoth.pl> * Fix build for PPC970 on FreeBSD pt. 1 FreeBSD needs DCBT_ARG=0 as well. * Fix build for PPC970 on FreeBSD pt.2 FreeBSD needs those macros too. * cgemm/ctrmm power9 * Utest needs CBLAS but not necessarily FORTRAN * Add mingw builds to Appveyor config * Add getarch flags to disable AVX on x86 (and other small fixes to match Makefile behaviour) * Make disabling DYNAMIC_ARCH on unsupported systems work needs to be unset in the cache for the change to have any effect * Mingw32 needs leading underscore on object names (also copy BUNDERSCORE settings for FORTRAN from the corresponding Makefile)
6 years ago
rebase? (#1) * With the Intel compiler on Linux, prefer ifort for the final link step icc has known problems with mixed-language builds that ifort can handle just fine. Fixes #1956 * Rename operands to put lda on the input/output constraint list * Fix wrong constraints in inline assembly for #2009 * Fix inline assembly constraints rework indices to allow marking argument lda4 as input and output. For #2009 * Fix inline assembly constraints rework indices to allow marking argument lda as input and output. * Fix inline assembly constraints * Fix inline assembly constraints * Fix inline assembly constraints in Bulldozer TRSM kernels rework indices to allow marking i,as and bs as both input and output (marked operand n1 as well for simplicity). For #2009 * Correct range_n limiting same bug as seen in #1388, somehow missed in corresponding PR #1389 * Allow multithreading TRMV again revert workaround introduced for issue #1332 as the actual cause appears to be my incorrect fix from #1262 (see #1388) * Fix error introduced during cleanup * Reduce list of kernels in the dynamic arch build to make compilation complete reliably within the 1h limit again * init * move fix to right place * Fix missing -c option in AVX512 test * Fix AVX512 test always returning false due to missing compiler option * Make x86_32 imply NO_AVX2, NO_AVX512 in addition to NO_AVX fixes #2033 * Keep xcode8.3 for osx BINARY=32 build as xcode10 deprecated i386 * Make sure that AVX512 is disabled in 32bit builds for #2033 * Improve handling of NO_STATIC and NO_SHARED to avoid surprises from defining either as zero. Fixes #2035 by addressing some concerns from #1422 * init * address warning introed with #1814 et al * Restore locking optimizations for OpenMP case restore another accidentally dropped part of #1468 that was missed in #2004 to address performance regression reported in #1461 * HiSilicon tsv110 CPUs optimization branch add HiSilicon tsv110 CPUs optimization branch * add TARGET support for HiSilicon tsv110 CPUs * add TARGET support for HiSilicon tsv110 CPUs * add TARGET support for HiSilicon tsv110 CPUs * Fix module definition conflicts between LAPACK and ReLAPACK for #2043 * Do not compile in AVX512 check if AVX support is disabled xgetbv is function depends on NO_AVX being undefined - we could change that too, but that combo is unlikely to work anyway * ctest.c : add __POWERPC__ for PowerMac * Fix crash in sgemm SSE/nano kernel on x86_64 Fix bug #2047. Signed-off-by: Celelibi <celelibi@gmail.com> * param.h : enable defines for PPC970 on DarwinOS fixes: gemm.c: In function 'sgemm_': ../common_param.h:981:18: error: 'SGEMM_DEFAULT_P' undeclared (first use in this function) #define SGEMM_P SGEMM_DEFAULT_P ^ * common_power.h: force DCBT_ARG 0 on PPC970 Darwin without this, we see ../kernel/power/gemv_n.S:427:Parameter syntax error and many more similar entries that relates to this assembly command dcbt 8, r24, r18 this change makes the DCBT_ARG = 0 and openblas builds through to completion on PowerMac 970 Tests pass * Make TARGET=GENERIC compatible with DYNAMIC_ARCH=1 for issue #2048 * make DYNAMIC_ARCH=1 package work on TSV110. * make DYNAMIC_ARCH=1 package work on TSV110 * Add Intel Denverton for #2048 * Add Intel Denverton * Change 64-bit detection as explained in #2056 * Trivial typo fix as suggested in #2022 * Disable the AVX512 DGEMM kernel (again) Due to as yet unresolved errors seen in #1955 and #2029 * Use POSIX getenv on Cygwin The Windows-native GetEnvironmentVariable cannot be relied on, as Cygwin does not always copy environment variables set through Cygwin to the Windows environment block, particularly after fork(). * Fix for #2063: The DllMain used in Cygwin did not run the thread memory pool cleanup upon THREAD_DETACH which is needed when compiled with USE_TLS=1. * Also call CloseHandle on each thread, as well as on the event so as to not leak thread handles. * AIX asm syntax changes needed for shared object creation * power9 makefile. dgemm based on power8 kernel with following changes : 32x unrolled 16x4 kernel and 8x4 kernel using (lxv stxv butterfly rank1 update). improvement from 17 to 22-23gflops. dtrmm cases were added into dgemm itself * Expose CBLAS interfaces for I?MIN and I?MAX * Build CBLAS interfaces for I?MIN and I?MAX * Add declarations for ?sum and cblas_?sum * Add interface for ?sum (derived from ?asum) * Add ?sum * Add implementations of ssum/dsum and csum/zsum as trivial copies of asum/zsasum with the fabs calls replaced by fmov to preserve code structure * Add ARM implementations of ?sum (trivial copies of the respective ?asum with the fabs calls removed) * Add ARM64 implementations of ?sum as trivial copies of the respective ?asum kernels with the fabs calls removed * Add ia64 implementation of ?sum as trivial copy of asum with the fabs calls removed * Add MIPS implementation of ?sum as trivial copy of ?asum with the fabs calls removed * Add MIPS64 implementation of ?sum as trivial copy of ?asum with the fabs replaced by mov to preserve code structure * Add POWER implementation of ?sum as trivial copy of ?asum with the fabs replaced by fmr to preserve code structure * Add SPARC implementation of ?sum as trivial copy of ?asum with the fabs replaced by fmov to preserve code structure * Add x86 implementation of ?sum as trivial copy of ?asum with the fabs calls removed * Add x86_64 implementation of ?sum as trivial copy of ?asum with the fabs calls removed * Add ZARCH implementation of ?sum as trivial copies of the respective ?asum kernels with the ABS and vflpsb calls removed * Detect 32bit environment on 64bit ARM hardware for #2056, using same approach as #2058 * Add cmake defaults for ?sum kernels * Add ?sum * Add ?sum definitions for generic kernel * Add declarations for ?sum * Add -lm and disable EXPRECISION support on *BSD fixes #2075 * Add in runtime CPU detection for POWER. * snprintf define consolidated to common.h * Support INTERFACE64=1 * Add support for INTERFACE64 and fix XERBLA calls 1. Replaced all instances of "int" with "blasint" 2. Added string length as "hidden" third parameter in calls to fortran XERBLA * Correct length of name string in xerbla call * Avoid out-of-bounds accesses in LAPACK EIG tests see https://github.com/Reference-LAPACK/lapack/issues/333 * Correct INFO=4 condition * Disable reallocation of work array in xSYTRF as it appears to cause memory management problems (seen in the LAPACK tests) * Disable repeated recursion on Ab_BR in ReLAPACK xGBTRF due to crashes in LAPACK tests * sgemm/strmm * Update Changelog with changes from 0.3.6 * Increment version to 0.3.7.dev * Increment version to 0.3.7.dev * Misc. typo fixes Found via `codespell -q 3 -w -L ith,als,dum,nd,amin,nto,wis,ba -S ./relapack,./kernel,./lapack-netlib` * Correct argument of CPU_ISSET for glibc <2.5 fixes #2104 * conflict resolve * Revert reference/ fixes * Revert Changelog.txt typos * Disable the SkyLakeX DGEMMITCOPY kernel as well as a stopgap measure for https://github.com/numpy/numpy/issues/13401 as mentioned in #1955 * Disable DGEMMINCOPY as well for now #1955 * init * Fix errors in cpu enumeration with glibc 2.6 for #2114 * Change two http links to https Closes #2109 * remove redundant code #2113 * Set up CI with Azure Pipelines [skip ci] * TST: add native POWER8 to CI * add native POWER8 testing to Travis CI matrix with ppc64le os entry * Update link to IBM MASS library, update cpu support status * first try migrating one of the arm builds from travis * fix tabbing in azure commands * Update azure-pipelines.yml take out offending lines (although stolen from https://github.com/conda-forge/opencv-feedstock azure-pipelines fiie) * Update azure-pipelines.yml * Update azure-pipelines.yml * Update azure-pipelines.yml * Update azure-pipelines.yml * DOC: Add Azure CI status badge * Add ARMV6 build to azure CI setup (#2122) using aytekinar's Alpine image and docker script from the Travis setup [skip ci] * TST: Azure manylinux1 & clean-up * remove some of the steps & comments from the original Azure yml template * modify the trigger section to use develop since OpenBLAS primarily uses this branch; use the same batching behavior as downstream projects NumPy/ SciPy * remove Travis emulated ARMv6 gcc build because this now happens in Azure * use documented Ubuntu vmImage name for Azure and add in a manylinux1 test run to the matrix [skip appveyor] * Add NO_AFFINITY to available options on Linux, and set it to ON to match the gmake default. Fixes second part of #2114 * Replace ISMIN and ISAMIN kernels on all x86_64 platforms (#2125) * Mark iamax_sse.S as unsuitable for MIN due to issue #2116 * Use iamax.S rather than iamax_sse.S for ISMIN/ISAMIN on all x86_64 as workaround for #2116 * Move ARMv8 gcc build from Travis to Azure * Move ARMv8 gcc build from Travis to Azure * Update .travis.yml * Test drone CI * install make * remove sudo * Install gcc * Install perl * Install gfortran and add a clang job * gfortran->gcc-gfortran * Switch to ubuntu and parallel jobs * apt update * Fix typo * update yes * no need of gcc in clang build * Add a cmake build as well * Add cmake builds and print options * build without lapack on cmake * parallel build * See if ubuntu 19.04 fixes the ICE * Remove qemu armv8 builds * arm32 build * Fix typo * TST: add SkylakeX AVX512 CI test * adapt the C-level reproducer code for some recent SkylakeX AVX512 kernel issues, provided by Isuru Fernando and modified by Martin Kroeker, for usage in the utest suite * add an Intel SDE SkylakeX emulation utest run to the Azure CI matrix; a custom Docker build was required because Ubuntu image provided by Azure does not support AVX512VL instructions * Add option USE_LOCKING for single-threaded build with locking support for calling from concurrent threads * Add option USE_LOCKING for single-threaded build with locking support * Add option USE_LOCKING for SMP-like locking in USE_THREAD=0 builds * Add option USE_LOCKING but keep default settings intact * Remove unrelated change * Do not try ancient PGI hacks with recent versions of that compiler should fix #2139 * Build and run utests in any case, they do their own checks for fortran availability * Add softfp support in min/max kernels fix for #1912 * Revert "Add softfp support in min/max kernels" * Separate implementations of AMAX and IAMAX on arm As noted in #1912 and comment on #1942, the combined implementation happens to "do the right thing" on hardfp, but cannot return both value and index on softfp where they would have to share the return register * Ensure correct output for DAMAX with softfp * Use generic kernels for complex (I)AMAX to support softfp * improved zgemm power9 based on power8 * upload thread safety test folder * hook up c++ thread safety test (main Makefile) * add c++ thread test option to Makefile.rule * Document NO_AVX512 for #2151 * sgemm pipeline improved, zgemm rewritten without inner packs, ABI lxvx v20 fixed with vs52 * Fix detection of AVX512 capable compilers in getarch 21eda8b5 introduced a check in getarch.c to test if the compiler is capable of AVX512. This check currently fails, since the used __AVX2__ macro is only defined if getarch itself was compiled with AVX2/AVX512 support. Make sure this is the case by building getarch with -march=native on x86_64. It is only supposed to run on the build host anyway. * c_check: Unlink correct file * power9 zgemm ztrmm optimized * conflict resolve * Add gfortran workaround for ABI violations in LAPACKE for #2154 (see gcc bug 90329) * Add gfortran workaround for ABI violations for #2154 (see gcc bug 90329) * Add gfortran workaround for potential ABI violation for #2154 * Update fc.cmake * Remove any inadvertent use of -march=native from DYNAMIC_ARCH builds from #2143, -march=native precludes use of more specific options like -march=skylake-avx512 in individual kernels, and defeats the purpose of dynamic arch anyway. * Avoid unintentional activation of TLS code via USE_TLS=0 fixes #2149 * Do not force gcc options on non-gcc compilers fixes compile failure with pgi 18.10 as reported on OpenBLAS-users * Update Makefile.x86_64 * Zero ecx with a mov instruction PGI assembler does not like the initialization in the constraints. * Fix mov syntax * new sgemm 8x16 * Update dtrmm_kernel_16x4_power8.S * PGI compiler does not like -march=native * Fix build on FreeBSD/powerpc64. Signed-off-by: Piotr Kubaj <pkubaj@anongoth.pl> * Fix build for PPC970 on FreeBSD pt. 1 FreeBSD needs DCBT_ARG=0 as well. * Fix build for PPC970 on FreeBSD pt.2 FreeBSD needs those macros too. * cgemm/ctrmm power9 * Utest needs CBLAS but not necessarily FORTRAN * Add mingw builds to Appveyor config * Add getarch flags to disable AVX on x86 (and other small fixes to match Makefile behaviour) * Make disabling DYNAMIC_ARCH on unsupported systems work needs to be unset in the cache for the change to have any effect * Mingw32 needs leading underscore on object names (also copy BUNDERSCORE settings for FORTRAN from the corresponding Makefile)
6 years ago
rebase? (#1) * With the Intel compiler on Linux, prefer ifort for the final link step icc has known problems with mixed-language builds that ifort can handle just fine. Fixes #1956 * Rename operands to put lda on the input/output constraint list * Fix wrong constraints in inline assembly for #2009 * Fix inline assembly constraints rework indices to allow marking argument lda4 as input and output. For #2009 * Fix inline assembly constraints rework indices to allow marking argument lda as input and output. * Fix inline assembly constraints * Fix inline assembly constraints * Fix inline assembly constraints in Bulldozer TRSM kernels rework indices to allow marking i,as and bs as both input and output (marked operand n1 as well for simplicity). For #2009 * Correct range_n limiting same bug as seen in #1388, somehow missed in corresponding PR #1389 * Allow multithreading TRMV again revert workaround introduced for issue #1332 as the actual cause appears to be my incorrect fix from #1262 (see #1388) * Fix error introduced during cleanup * Reduce list of kernels in the dynamic arch build to make compilation complete reliably within the 1h limit again * init * move fix to right place * Fix missing -c option in AVX512 test * Fix AVX512 test always returning false due to missing compiler option * Make x86_32 imply NO_AVX2, NO_AVX512 in addition to NO_AVX fixes #2033 * Keep xcode8.3 for osx BINARY=32 build as xcode10 deprecated i386 * Make sure that AVX512 is disabled in 32bit builds for #2033 * Improve handling of NO_STATIC and NO_SHARED to avoid surprises from defining either as zero. Fixes #2035 by addressing some concerns from #1422 * init * address warning introed with #1814 et al * Restore locking optimizations for OpenMP case restore another accidentally dropped part of #1468 that was missed in #2004 to address performance regression reported in #1461 * HiSilicon tsv110 CPUs optimization branch add HiSilicon tsv110 CPUs optimization branch * add TARGET support for HiSilicon tsv110 CPUs * add TARGET support for HiSilicon tsv110 CPUs * add TARGET support for HiSilicon tsv110 CPUs * Fix module definition conflicts between LAPACK and ReLAPACK for #2043 * Do not compile in AVX512 check if AVX support is disabled xgetbv is function depends on NO_AVX being undefined - we could change that too, but that combo is unlikely to work anyway * ctest.c : add __POWERPC__ for PowerMac * Fix crash in sgemm SSE/nano kernel on x86_64 Fix bug #2047. Signed-off-by: Celelibi <celelibi@gmail.com> * param.h : enable defines for PPC970 on DarwinOS fixes: gemm.c: In function 'sgemm_': ../common_param.h:981:18: error: 'SGEMM_DEFAULT_P' undeclared (first use in this function) #define SGEMM_P SGEMM_DEFAULT_P ^ * common_power.h: force DCBT_ARG 0 on PPC970 Darwin without this, we see ../kernel/power/gemv_n.S:427:Parameter syntax error and many more similar entries that relates to this assembly command dcbt 8, r24, r18 this change makes the DCBT_ARG = 0 and openblas builds through to completion on PowerMac 970 Tests pass * Make TARGET=GENERIC compatible with DYNAMIC_ARCH=1 for issue #2048 * make DYNAMIC_ARCH=1 package work on TSV110. * make DYNAMIC_ARCH=1 package work on TSV110 * Add Intel Denverton for #2048 * Add Intel Denverton * Change 64-bit detection as explained in #2056 * Trivial typo fix as suggested in #2022 * Disable the AVX512 DGEMM kernel (again) Due to as yet unresolved errors seen in #1955 and #2029 * Use POSIX getenv on Cygwin The Windows-native GetEnvironmentVariable cannot be relied on, as Cygwin does not always copy environment variables set through Cygwin to the Windows environment block, particularly after fork(). * Fix for #2063: The DllMain used in Cygwin did not run the thread memory pool cleanup upon THREAD_DETACH which is needed when compiled with USE_TLS=1. * Also call CloseHandle on each thread, as well as on the event so as to not leak thread handles. * AIX asm syntax changes needed for shared object creation * power9 makefile. dgemm based on power8 kernel with following changes : 32x unrolled 16x4 kernel and 8x4 kernel using (lxv stxv butterfly rank1 update). improvement from 17 to 22-23gflops. dtrmm cases were added into dgemm itself * Expose CBLAS interfaces for I?MIN and I?MAX * Build CBLAS interfaces for I?MIN and I?MAX * Add declarations for ?sum and cblas_?sum * Add interface for ?sum (derived from ?asum) * Add ?sum * Add implementations of ssum/dsum and csum/zsum as trivial copies of asum/zsasum with the fabs calls replaced by fmov to preserve code structure * Add ARM implementations of ?sum (trivial copies of the respective ?asum with the fabs calls removed) * Add ARM64 implementations of ?sum as trivial copies of the respective ?asum kernels with the fabs calls removed * Add ia64 implementation of ?sum as trivial copy of asum with the fabs calls removed * Add MIPS implementation of ?sum as trivial copy of ?asum with the fabs calls removed * Add MIPS64 implementation of ?sum as trivial copy of ?asum with the fabs replaced by mov to preserve code structure * Add POWER implementation of ?sum as trivial copy of ?asum with the fabs replaced by fmr to preserve code structure * Add SPARC implementation of ?sum as trivial copy of ?asum with the fabs replaced by fmov to preserve code structure * Add x86 implementation of ?sum as trivial copy of ?asum with the fabs calls removed * Add x86_64 implementation of ?sum as trivial copy of ?asum with the fabs calls removed * Add ZARCH implementation of ?sum as trivial copies of the respective ?asum kernels with the ABS and vflpsb calls removed * Detect 32bit environment on 64bit ARM hardware for #2056, using same approach as #2058 * Add cmake defaults for ?sum kernels * Add ?sum * Add ?sum definitions for generic kernel * Add declarations for ?sum * Add -lm and disable EXPRECISION support on *BSD fixes #2075 * Add in runtime CPU detection for POWER. * snprintf define consolidated to common.h * Support INTERFACE64=1 * Add support for INTERFACE64 and fix XERBLA calls 1. Replaced all instances of "int" with "blasint" 2. Added string length as "hidden" third parameter in calls to fortran XERBLA * Correct length of name string in xerbla call * Avoid out-of-bounds accesses in LAPACK EIG tests see https://github.com/Reference-LAPACK/lapack/issues/333 * Correct INFO=4 condition * Disable reallocation of work array in xSYTRF as it appears to cause memory management problems (seen in the LAPACK tests) * Disable repeated recursion on Ab_BR in ReLAPACK xGBTRF due to crashes in LAPACK tests * sgemm/strmm * Update Changelog with changes from 0.3.6 * Increment version to 0.3.7.dev * Increment version to 0.3.7.dev * Misc. typo fixes Found via `codespell -q 3 -w -L ith,als,dum,nd,amin,nto,wis,ba -S ./relapack,./kernel,./lapack-netlib` * Correct argument of CPU_ISSET for glibc <2.5 fixes #2104 * conflict resolve * Revert reference/ fixes * Revert Changelog.txt typos * Disable the SkyLakeX DGEMMITCOPY kernel as well as a stopgap measure for https://github.com/numpy/numpy/issues/13401 as mentioned in #1955 * Disable DGEMMINCOPY as well for now #1955 * init * Fix errors in cpu enumeration with glibc 2.6 for #2114 * Change two http links to https Closes #2109 * remove redundant code #2113 * Set up CI with Azure Pipelines [skip ci] * TST: add native POWER8 to CI * add native POWER8 testing to Travis CI matrix with ppc64le os entry * Update link to IBM MASS library, update cpu support status * first try migrating one of the arm builds from travis * fix tabbing in azure commands * Update azure-pipelines.yml take out offending lines (although stolen from https://github.com/conda-forge/opencv-feedstock azure-pipelines fiie) * Update azure-pipelines.yml * Update azure-pipelines.yml * Update azure-pipelines.yml * Update azure-pipelines.yml * DOC: Add Azure CI status badge * Add ARMV6 build to azure CI setup (#2122) using aytekinar's Alpine image and docker script from the Travis setup [skip ci] * TST: Azure manylinux1 & clean-up * remove some of the steps & comments from the original Azure yml template * modify the trigger section to use develop since OpenBLAS primarily uses this branch; use the same batching behavior as downstream projects NumPy/ SciPy * remove Travis emulated ARMv6 gcc build because this now happens in Azure * use documented Ubuntu vmImage name for Azure and add in a manylinux1 test run to the matrix [skip appveyor] * Add NO_AFFINITY to available options on Linux, and set it to ON to match the gmake default. Fixes second part of #2114 * Replace ISMIN and ISAMIN kernels on all x86_64 platforms (#2125) * Mark iamax_sse.S as unsuitable for MIN due to issue #2116 * Use iamax.S rather than iamax_sse.S for ISMIN/ISAMIN on all x86_64 as workaround for #2116 * Move ARMv8 gcc build from Travis to Azure * Move ARMv8 gcc build from Travis to Azure * Update .travis.yml * Test drone CI * install make * remove sudo * Install gcc * Install perl * Install gfortran and add a clang job * gfortran->gcc-gfortran * Switch to ubuntu and parallel jobs * apt update * Fix typo * update yes * no need of gcc in clang build * Add a cmake build as well * Add cmake builds and print options * build without lapack on cmake * parallel build * See if ubuntu 19.04 fixes the ICE * Remove qemu armv8 builds * arm32 build * Fix typo * TST: add SkylakeX AVX512 CI test * adapt the C-level reproducer code for some recent SkylakeX AVX512 kernel issues, provided by Isuru Fernando and modified by Martin Kroeker, for usage in the utest suite * add an Intel SDE SkylakeX emulation utest run to the Azure CI matrix; a custom Docker build was required because Ubuntu image provided by Azure does not support AVX512VL instructions * Add option USE_LOCKING for single-threaded build with locking support for calling from concurrent threads * Add option USE_LOCKING for single-threaded build with locking support * Add option USE_LOCKING for SMP-like locking in USE_THREAD=0 builds * Add option USE_LOCKING but keep default settings intact * Remove unrelated change * Do not try ancient PGI hacks with recent versions of that compiler should fix #2139 * Build and run utests in any case, they do their own checks for fortran availability * Add softfp support in min/max kernels fix for #1912 * Revert "Add softfp support in min/max kernels" * Separate implementations of AMAX and IAMAX on arm As noted in #1912 and comment on #1942, the combined implementation happens to "do the right thing" on hardfp, but cannot return both value and index on softfp where they would have to share the return register * Ensure correct output for DAMAX with softfp * Use generic kernels for complex (I)AMAX to support softfp * improved zgemm power9 based on power8 * upload thread safety test folder * hook up c++ thread safety test (main Makefile) * add c++ thread test option to Makefile.rule * Document NO_AVX512 for #2151 * sgemm pipeline improved, zgemm rewritten without inner packs, ABI lxvx v20 fixed with vs52 * Fix detection of AVX512 capable compilers in getarch 21eda8b5 introduced a check in getarch.c to test if the compiler is capable of AVX512. This check currently fails, since the used __AVX2__ macro is only defined if getarch itself was compiled with AVX2/AVX512 support. Make sure this is the case by building getarch with -march=native on x86_64. It is only supposed to run on the build host anyway. * c_check: Unlink correct file * power9 zgemm ztrmm optimized * conflict resolve * Add gfortran workaround for ABI violations in LAPACKE for #2154 (see gcc bug 90329) * Add gfortran workaround for ABI violations for #2154 (see gcc bug 90329) * Add gfortran workaround for potential ABI violation for #2154 * Update fc.cmake * Remove any inadvertent use of -march=native from DYNAMIC_ARCH builds from #2143, -march=native precludes use of more specific options like -march=skylake-avx512 in individual kernels, and defeats the purpose of dynamic arch anyway. * Avoid unintentional activation of TLS code via USE_TLS=0 fixes #2149 * Do not force gcc options on non-gcc compilers fixes compile failure with pgi 18.10 as reported on OpenBLAS-users * Update Makefile.x86_64 * Zero ecx with a mov instruction PGI assembler does not like the initialization in the constraints. * Fix mov syntax * new sgemm 8x16 * Update dtrmm_kernel_16x4_power8.S * PGI compiler does not like -march=native * Fix build on FreeBSD/powerpc64. Signed-off-by: Piotr Kubaj <pkubaj@anongoth.pl> * Fix build for PPC970 on FreeBSD pt. 1 FreeBSD needs DCBT_ARG=0 as well. * Fix build for PPC970 on FreeBSD pt.2 FreeBSD needs those macros too. * cgemm/ctrmm power9 * Utest needs CBLAS but not necessarily FORTRAN * Add mingw builds to Appveyor config * Add getarch flags to disable AVX on x86 (and other small fixes to match Makefile behaviour) * Make disabling DYNAMIC_ARCH on unsupported systems work needs to be unset in the cache for the change to have any effect * Mingw32 needs leading underscore on object names (also copy BUNDERSCORE settings for FORTRAN from the corresponding Makefile)
6 years ago
rebase? (#1) * With the Intel compiler on Linux, prefer ifort for the final link step icc has known problems with mixed-language builds that ifort can handle just fine. Fixes #1956 * Rename operands to put lda on the input/output constraint list * Fix wrong constraints in inline assembly for #2009 * Fix inline assembly constraints rework indices to allow marking argument lda4 as input and output. For #2009 * Fix inline assembly constraints rework indices to allow marking argument lda as input and output. * Fix inline assembly constraints * Fix inline assembly constraints * Fix inline assembly constraints in Bulldozer TRSM kernels rework indices to allow marking i,as and bs as both input and output (marked operand n1 as well for simplicity). For #2009 * Correct range_n limiting same bug as seen in #1388, somehow missed in corresponding PR #1389 * Allow multithreading TRMV again revert workaround introduced for issue #1332 as the actual cause appears to be my incorrect fix from #1262 (see #1388) * Fix error introduced during cleanup * Reduce list of kernels in the dynamic arch build to make compilation complete reliably within the 1h limit again * init * move fix to right place * Fix missing -c option in AVX512 test * Fix AVX512 test always returning false due to missing compiler option * Make x86_32 imply NO_AVX2, NO_AVX512 in addition to NO_AVX fixes #2033 * Keep xcode8.3 for osx BINARY=32 build as xcode10 deprecated i386 * Make sure that AVX512 is disabled in 32bit builds for #2033 * Improve handling of NO_STATIC and NO_SHARED to avoid surprises from defining either as zero. Fixes #2035 by addressing some concerns from #1422 * init * address warning introed with #1814 et al * Restore locking optimizations for OpenMP case restore another accidentally dropped part of #1468 that was missed in #2004 to address performance regression reported in #1461 * HiSilicon tsv110 CPUs optimization branch add HiSilicon tsv110 CPUs optimization branch * add TARGET support for HiSilicon tsv110 CPUs * add TARGET support for HiSilicon tsv110 CPUs * add TARGET support for HiSilicon tsv110 CPUs * Fix module definition conflicts between LAPACK and ReLAPACK for #2043 * Do not compile in AVX512 check if AVX support is disabled xgetbv is function depends on NO_AVX being undefined - we could change that too, but that combo is unlikely to work anyway * ctest.c : add __POWERPC__ for PowerMac * Fix crash in sgemm SSE/nano kernel on x86_64 Fix bug #2047. Signed-off-by: Celelibi <celelibi@gmail.com> * param.h : enable defines for PPC970 on DarwinOS fixes: gemm.c: In function 'sgemm_': ../common_param.h:981:18: error: 'SGEMM_DEFAULT_P' undeclared (first use in this function) #define SGEMM_P SGEMM_DEFAULT_P ^ * common_power.h: force DCBT_ARG 0 on PPC970 Darwin without this, we see ../kernel/power/gemv_n.S:427:Parameter syntax error and many more similar entries that relates to this assembly command dcbt 8, r24, r18 this change makes the DCBT_ARG = 0 and openblas builds through to completion on PowerMac 970 Tests pass * Make TARGET=GENERIC compatible with DYNAMIC_ARCH=1 for issue #2048 * make DYNAMIC_ARCH=1 package work on TSV110. * make DYNAMIC_ARCH=1 package work on TSV110 * Add Intel Denverton for #2048 * Add Intel Denverton * Change 64-bit detection as explained in #2056 * Trivial typo fix as suggested in #2022 * Disable the AVX512 DGEMM kernel (again) Due to as yet unresolved errors seen in #1955 and #2029 * Use POSIX getenv on Cygwin The Windows-native GetEnvironmentVariable cannot be relied on, as Cygwin does not always copy environment variables set through Cygwin to the Windows environment block, particularly after fork(). * Fix for #2063: The DllMain used in Cygwin did not run the thread memory pool cleanup upon THREAD_DETACH which is needed when compiled with USE_TLS=1. * Also call CloseHandle on each thread, as well as on the event so as to not leak thread handles. * AIX asm syntax changes needed for shared object creation * power9 makefile. dgemm based on power8 kernel with following changes : 32x unrolled 16x4 kernel and 8x4 kernel using (lxv stxv butterfly rank1 update). improvement from 17 to 22-23gflops. dtrmm cases were added into dgemm itself * Expose CBLAS interfaces for I?MIN and I?MAX * Build CBLAS interfaces for I?MIN and I?MAX * Add declarations for ?sum and cblas_?sum * Add interface for ?sum (derived from ?asum) * Add ?sum * Add implementations of ssum/dsum and csum/zsum as trivial copies of asum/zsasum with the fabs calls replaced by fmov to preserve code structure * Add ARM implementations of ?sum (trivial copies of the respective ?asum with the fabs calls removed) * Add ARM64 implementations of ?sum as trivial copies of the respective ?asum kernels with the fabs calls removed * Add ia64 implementation of ?sum as trivial copy of asum with the fabs calls removed * Add MIPS implementation of ?sum as trivial copy of ?asum with the fabs calls removed * Add MIPS64 implementation of ?sum as trivial copy of ?asum with the fabs replaced by mov to preserve code structure * Add POWER implementation of ?sum as trivial copy of ?asum with the fabs replaced by fmr to preserve code structure * Add SPARC implementation of ?sum as trivial copy of ?asum with the fabs replaced by fmov to preserve code structure * Add x86 implementation of ?sum as trivial copy of ?asum with the fabs calls removed * Add x86_64 implementation of ?sum as trivial copy of ?asum with the fabs calls removed * Add ZARCH implementation of ?sum as trivial copies of the respective ?asum kernels with the ABS and vflpsb calls removed * Detect 32bit environment on 64bit ARM hardware for #2056, using same approach as #2058 * Add cmake defaults for ?sum kernels * Add ?sum * Add ?sum definitions for generic kernel * Add declarations for ?sum * Add -lm and disable EXPRECISION support on *BSD fixes #2075 * Add in runtime CPU detection for POWER. * snprintf define consolidated to common.h * Support INTERFACE64=1 * Add support for INTERFACE64 and fix XERBLA calls 1. Replaced all instances of "int" with "blasint" 2. Added string length as "hidden" third parameter in calls to fortran XERBLA * Correct length of name string in xerbla call * Avoid out-of-bounds accesses in LAPACK EIG tests see https://github.com/Reference-LAPACK/lapack/issues/333 * Correct INFO=4 condition * Disable reallocation of work array in xSYTRF as it appears to cause memory management problems (seen in the LAPACK tests) * Disable repeated recursion on Ab_BR in ReLAPACK xGBTRF due to crashes in LAPACK tests * sgemm/strmm * Update Changelog with changes from 0.3.6 * Increment version to 0.3.7.dev * Increment version to 0.3.7.dev * Misc. typo fixes Found via `codespell -q 3 -w -L ith,als,dum,nd,amin,nto,wis,ba -S ./relapack,./kernel,./lapack-netlib` * Correct argument of CPU_ISSET for glibc <2.5 fixes #2104 * conflict resolve * Revert reference/ fixes * Revert Changelog.txt typos * Disable the SkyLakeX DGEMMITCOPY kernel as well as a stopgap measure for https://github.com/numpy/numpy/issues/13401 as mentioned in #1955 * Disable DGEMMINCOPY as well for now #1955 * init * Fix errors in cpu enumeration with glibc 2.6 for #2114 * Change two http links to https Closes #2109 * remove redundant code #2113 * Set up CI with Azure Pipelines [skip ci] * TST: add native POWER8 to CI * add native POWER8 testing to Travis CI matrix with ppc64le os entry * Update link to IBM MASS library, update cpu support status * first try migrating one of the arm builds from travis * fix tabbing in azure commands * Update azure-pipelines.yml take out offending lines (although stolen from https://github.com/conda-forge/opencv-feedstock azure-pipelines fiie) * Update azure-pipelines.yml * Update azure-pipelines.yml * Update azure-pipelines.yml * Update azure-pipelines.yml * DOC: Add Azure CI status badge * Add ARMV6 build to azure CI setup (#2122) using aytekinar's Alpine image and docker script from the Travis setup [skip ci] * TST: Azure manylinux1 & clean-up * remove some of the steps & comments from the original Azure yml template * modify the trigger section to use develop since OpenBLAS primarily uses this branch; use the same batching behavior as downstream projects NumPy/ SciPy * remove Travis emulated ARMv6 gcc build because this now happens in Azure * use documented Ubuntu vmImage name for Azure and add in a manylinux1 test run to the matrix [skip appveyor] * Add NO_AFFINITY to available options on Linux, and set it to ON to match the gmake default. Fixes second part of #2114 * Replace ISMIN and ISAMIN kernels on all x86_64 platforms (#2125) * Mark iamax_sse.S as unsuitable for MIN due to issue #2116 * Use iamax.S rather than iamax_sse.S for ISMIN/ISAMIN on all x86_64 as workaround for #2116 * Move ARMv8 gcc build from Travis to Azure * Move ARMv8 gcc build from Travis to Azure * Update .travis.yml * Test drone CI * install make * remove sudo * Install gcc * Install perl * Install gfortran and add a clang job * gfortran->gcc-gfortran * Switch to ubuntu and parallel jobs * apt update * Fix typo * update yes * no need of gcc in clang build * Add a cmake build as well * Add cmake builds and print options * build without lapack on cmake * parallel build * See if ubuntu 19.04 fixes the ICE * Remove qemu armv8 builds * arm32 build * Fix typo * TST: add SkylakeX AVX512 CI test * adapt the C-level reproducer code for some recent SkylakeX AVX512 kernel issues, provided by Isuru Fernando and modified by Martin Kroeker, for usage in the utest suite * add an Intel SDE SkylakeX emulation utest run to the Azure CI matrix; a custom Docker build was required because Ubuntu image provided by Azure does not support AVX512VL instructions * Add option USE_LOCKING for single-threaded build with locking support for calling from concurrent threads * Add option USE_LOCKING for single-threaded build with locking support * Add option USE_LOCKING for SMP-like locking in USE_THREAD=0 builds * Add option USE_LOCKING but keep default settings intact * Remove unrelated change * Do not try ancient PGI hacks with recent versions of that compiler should fix #2139 * Build and run utests in any case, they do their own checks for fortran availability * Add softfp support in min/max kernels fix for #1912 * Revert "Add softfp support in min/max kernels" * Separate implementations of AMAX and IAMAX on arm As noted in #1912 and comment on #1942, the combined implementation happens to "do the right thing" on hardfp, but cannot return both value and index on softfp where they would have to share the return register * Ensure correct output for DAMAX with softfp * Use generic kernels for complex (I)AMAX to support softfp * improved zgemm power9 based on power8 * upload thread safety test folder * hook up c++ thread safety test (main Makefile) * add c++ thread test option to Makefile.rule * Document NO_AVX512 for #2151 * sgemm pipeline improved, zgemm rewritten without inner packs, ABI lxvx v20 fixed with vs52 * Fix detection of AVX512 capable compilers in getarch 21eda8b5 introduced a check in getarch.c to test if the compiler is capable of AVX512. This check currently fails, since the used __AVX2__ macro is only defined if getarch itself was compiled with AVX2/AVX512 support. Make sure this is the case by building getarch with -march=native on x86_64. It is only supposed to run on the build host anyway. * c_check: Unlink correct file * power9 zgemm ztrmm optimized * conflict resolve * Add gfortran workaround for ABI violations in LAPACKE for #2154 (see gcc bug 90329) * Add gfortran workaround for ABI violations for #2154 (see gcc bug 90329) * Add gfortran workaround for potential ABI violation for #2154 * Update fc.cmake * Remove any inadvertent use of -march=native from DYNAMIC_ARCH builds from #2143, -march=native precludes use of more specific options like -march=skylake-avx512 in individual kernels, and defeats the purpose of dynamic arch anyway. * Avoid unintentional activation of TLS code via USE_TLS=0 fixes #2149 * Do not force gcc options on non-gcc compilers fixes compile failure with pgi 18.10 as reported on OpenBLAS-users * Update Makefile.x86_64 * Zero ecx with a mov instruction PGI assembler does not like the initialization in the constraints. * Fix mov syntax * new sgemm 8x16 * Update dtrmm_kernel_16x4_power8.S * PGI compiler does not like -march=native * Fix build on FreeBSD/powerpc64. Signed-off-by: Piotr Kubaj <pkubaj@anongoth.pl> * Fix build for PPC970 on FreeBSD pt. 1 FreeBSD needs DCBT_ARG=0 as well. * Fix build for PPC970 on FreeBSD pt.2 FreeBSD needs those macros too. * cgemm/ctrmm power9 * Utest needs CBLAS but not necessarily FORTRAN * Add mingw builds to Appveyor config * Add getarch flags to disable AVX on x86 (and other small fixes to match Makefile behaviour) * Make disabling DYNAMIC_ARCH on unsupported systems work needs to be unset in the cache for the change to have any effect * Mingw32 needs leading underscore on object names (also copy BUNDERSCORE settings for FORTRAN from the corresponding Makefile)
6 years ago
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  1. /*********************************************************************/
  2. /* Copyright 2009, 2010 The University of Texas at Austin. */
  3. /* All rights reserved. */
  4. /* */
  5. /* Redistribution and use in source and binary forms, with or */
  6. /* without modification, are permitted provided that the following */
  7. /* conditions are met: */
  8. /* */
  9. /* 1. Redistributions of source code must retain the above */
  10. /* copyright notice, this list of conditions and the following */
  11. /* disclaimer. */
  12. /* */
  13. /* 2. Redistributions in binary form must reproduce the above */
  14. /* copyright notice, this list of conditions and the following */
  15. /* disclaimer in the documentation and/or other materials */
  16. /* provided with the distribution. */
  17. /* */
  18. /* THIS SOFTWARE IS PROVIDED BY THE UNIVERSITY OF TEXAS AT */
  19. /* AUSTIN ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, */
  20. /* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF */
  21. /* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE */
  22. /* DISCLAIMED. IN NO EVENT SHALL THE UNIVERSITY OF TEXAS AT */
  23. /* AUSTIN OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, */
  24. /* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES */
  25. /* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE */
  26. /* GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR */
  27. /* BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF */
  28. /* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT */
  29. /* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT */
  30. /* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE */
  31. /* POSSIBILITY OF SUCH DAMAGE. */
  32. /* */
  33. /* The views and conclusions contained in the software and */
  34. /* documentation are those of the authors and should not be */
  35. /* interpreted as representing official policies, either expressed */
  36. /* or implied, of The University of Texas at Austin. */
  37. /*********************************************************************/
  38. #define ASSEMBLER
  39. #include "common.h"
  40. #ifndef __64BIT__
  41. #define LOAD lwz
  42. #else
  43. #define LOAD ld
  44. #endif
  45. #ifdef __64BIT__
  46. #define STACKSIZE 320
  47. #define ALPHA_R 296(SP)
  48. #define ALPHA_I 304(SP)
  49. #define FZERO 312(SP)
  50. #else
  51. #define STACKSIZE 256
  52. #define ALPHA_R 224(SP)
  53. #define ALPHA_I 232(SP)
  54. #define FZERO 240(SP)
  55. #endif
  56. #define M r3
  57. #define N r4
  58. #define K r5
  59. #if defined(linux) || defined(__FreeBSD__)
  60. #ifndef __64BIT__
  61. #define A r6
  62. #define B r7
  63. #define C r8
  64. #define LDC r9
  65. #define OFFSET r10
  66. #else
  67. #define A r8
  68. #define B r9
  69. #define C r10
  70. #define LDC r6
  71. #define OFFSET r7
  72. #endif
  73. #endif
  74. #if defined(_AIX) || defined(__APPLE__)
  75. #if !defined(__64BIT__) && defined(DOUBLE)
  76. #define A r10
  77. #define B r6
  78. #define C r7
  79. #define LDC r8
  80. #define OFFSET r9
  81. #else
  82. #define A r8
  83. #define B r9
  84. #define C r10
  85. #define LDC r6
  86. #define OFFSET r7
  87. #endif
  88. #endif
  89. #define TEMP r22
  90. #define KK r23
  91. #define I r24
  92. #define J r25
  93. #define AO r26
  94. #define BO r27
  95. #define CO1 r28
  96. #define CO2 r29
  97. #define PREA r30
  98. #define PREC r31
  99. #define PREB PREA
  100. #ifndef NEEDPARAM
  101. #ifndef DOUBLE
  102. #include "../cparam.h"
  103. #else
  104. #include "../zparam.h"
  105. #endif
  106. PROLOGUE
  107. PROFCODE
  108. addi SP, SP, -STACKSIZE
  109. li r0, 0
  110. stfd f14, 0(SP)
  111. stfd f15, 8(SP)
  112. stfd f16, 16(SP)
  113. stfd f17, 24(SP)
  114. stfd f18, 32(SP)
  115. stfd f19, 40(SP)
  116. stfd f20, 48(SP)
  117. stfd f21, 56(SP)
  118. stfd f22, 64(SP)
  119. stfd f23, 72(SP)
  120. stfd f24, 80(SP)
  121. stfd f25, 88(SP)
  122. stfd f26, 96(SP)
  123. stfd f27, 104(SP)
  124. stfd f28, 112(SP)
  125. stfd f29, 120(SP)
  126. stfd f30, 128(SP)
  127. stfd f31, 136(SP)
  128. #ifdef __64BIT__
  129. std r31, 144(SP)
  130. std r30, 152(SP)
  131. std r29, 160(SP)
  132. std r28, 168(SP)
  133. std r27, 176(SP)
  134. std r26, 184(SP)
  135. std r25, 192(SP)
  136. std r24, 200(SP)
  137. #ifdef TRMMKERNEL
  138. std r23, 208(SP)
  139. std r22, 216(SP)
  140. #endif
  141. #else
  142. stw r31, 144(SP)
  143. stw r30, 148(SP)
  144. stw r29, 152(SP)
  145. stw r28, 156(SP)
  146. stw r27, 160(SP)
  147. stw r26, 164(SP)
  148. stw r25, 168(SP)
  149. stw r24, 172(SP)
  150. #ifdef TRMMKERNEL
  151. stw r23, 176(SP)
  152. stw r22, 180(SP)
  153. #endif
  154. #endif
  155. stfd f1, ALPHA_R
  156. stfd f2, ALPHA_I
  157. stw r0, FZERO
  158. #if defined(linux) || defined(__FreeBSD__)
  159. #ifdef __64BIT__
  160. ld LDC, FRAMESLOT(0) + STACKSIZE(SP)
  161. #endif
  162. #endif
  163. #if defined(_AIX) || defined(__APPLE__)
  164. #ifdef __64BIT__
  165. ld LDC, FRAMESLOT(0) + STACKSIZE(SP)
  166. #else
  167. #ifdef DOUBLE
  168. lwz B, FRAMESLOT(0) + STACKSIZE(SP)
  169. lwz C, FRAMESLOT(1) + STACKSIZE(SP)
  170. lwz LDC, FRAMESLOT(2) + STACKSIZE(SP)
  171. #else
  172. lwz LDC, FRAMESLOT(0) + STACKSIZE(SP)
  173. #endif
  174. #endif
  175. #endif
  176. #ifdef TRMMKERNEL
  177. #if (defined(linux) || defined(__FreeBSD__)) && defined(__64BIT__)
  178. ld OFFSET, FRAMESLOT(1) + STACKSIZE(SP)
  179. #endif
  180. #if defined(_AIX) || defined(__APPLE__)
  181. #ifdef __64BIT__
  182. ld OFFSET, FRAMESLOT(1) + STACKSIZE(SP)
  183. #else
  184. #ifdef DOUBLE
  185. lwz OFFSET, FRAMESLOT(3) + STACKSIZE(SP)
  186. #else
  187. lwz OFFSET, FRAMESLOT(1) + STACKSIZE(SP)
  188. #endif
  189. #endif
  190. #endif
  191. #if defined(TRMMKERNEL) && !defined(LEFT)
  192. neg KK, OFFSET
  193. #endif
  194. #endif
  195. slwi LDC, LDC, ZBASE_SHIFT
  196. cmpwi cr0, M, 0
  197. ble LL(999)
  198. cmpwi cr0, N, 0
  199. ble LL(999)
  200. cmpwi cr0, K, 0
  201. ble LL(999)
  202. #ifndef PREFETCHTEST
  203. li PREC, 3 * SIZE
  204. li PREA, 16 * 12 * SIZE
  205. #else
  206. #if defined(linux) || defined(__FreeBSD__)
  207. #ifndef __64BIT__
  208. lwz PREA, FRAMESLOT(2) + STACKSIZE(SP)
  209. lwz PREC, FRAMESLOT(3) + STACKSIZE(SP)
  210. #else
  211. ld PREA, FRAMESLOT(3) + STACKSIZE(SP)
  212. ld PREC, FRAMESLOT(4) + STACKSIZE(SP)
  213. #endif
  214. #endif
  215. #if defined(_AIX) || defined(__APPLE__)
  216. #ifdef __64BIT__
  217. ld PREA, FRAMESLOT(3) + STACKSIZE(SP)
  218. ld PREC, FRAMESLOT(4) + STACKSIZE(SP)
  219. #else
  220. #ifdef DOUBLE
  221. lwz PREA, FRAMESLOT(4) + STACKSIZE(SP)
  222. lwz PREC, FRAMESLOT(5) + STACKSIZE(SP)
  223. #else
  224. lwz PREA, FRAMESLOT(3) + STACKSIZE(SP)
  225. lwz PREC, FRAMESLOT(4) + STACKSIZE(SP)
  226. #endif
  227. #endif
  228. #endif
  229. #endif
  230. lfs f0, FZERO
  231. srawi. J, N, 1
  232. ble LL(30)
  233. .align 4
  234. LL(10):
  235. fmr f1, f0
  236. fmr f2, f0
  237. fmr f3, f0
  238. fmr f4, f0
  239. fmr f5, f0
  240. fmr f6, f0
  241. fmr f7, f0
  242. fmr f8, f0
  243. fmr f9, f0
  244. fmr f10, f0
  245. fmr f11, f0
  246. fmr f12, f0
  247. fmr f13, f0
  248. fmr f14, f0
  249. fmr f15, f0
  250. mr CO1, C
  251. add CO2, C, LDC
  252. add C, CO2, LDC
  253. #if defined(TRMMKERNEL) && defined(LEFT)
  254. mr KK, OFFSET
  255. #endif
  256. srawi. I, M, 1
  257. mr AO, A
  258. ble LL(20)
  259. .align 4
  260. LL(11):
  261. #ifndef TRMMKERNEL
  262. LFD f16, 0 * SIZE(AO)
  263. LFD f17, 1 * SIZE(AO)
  264. LFD f18, 2 * SIZE(AO)
  265. LFD f19, 3 * SIZE(AO)
  266. LFD f20, 0 * SIZE(B)
  267. LFD f21, 1 * SIZE(B)
  268. LFD f22, 2 * SIZE(B)
  269. LFD f23, 3 * SIZE(B)
  270. LFD f24, 4 * SIZE(AO)
  271. LFD f25, 5 * SIZE(AO)
  272. LFD f26, 6 * SIZE(AO)
  273. LFD f28, 4 * SIZE(B)
  274. LFD f29, 5 * SIZE(B)
  275. LFD f30, 6 * SIZE(B)
  276. PREFETCH_C1
  277. nop
  278. nop
  279. PREFETCH_C2
  280. srawi. r0, K, 2
  281. mr BO, B
  282. mtspr CTR, r0
  283. ble LL(15)
  284. #else
  285. #if (defined(TRMMKERNEL) && defined(LEFT) && defined(TRANSA)) || \
  286. (defined(TRMMKERNEL) && !defined(LEFT) && !defined(TRANSA))
  287. LFD f16, 0 * SIZE(AO)
  288. LFD f17, 1 * SIZE(AO)
  289. LFD f18, 2 * SIZE(AO)
  290. LFD f19, 3 * SIZE(AO)
  291. LFD f20, 0 * SIZE(B)
  292. LFD f21, 1 * SIZE(B)
  293. LFD f22, 2 * SIZE(B)
  294. LFD f23, 3 * SIZE(B)
  295. LFD f24, 4 * SIZE(AO)
  296. LFD f25, 5 * SIZE(AO)
  297. LFD f26, 6 * SIZE(AO)
  298. LFD f28, 4 * SIZE(B)
  299. LFD f29, 5 * SIZE(B)
  300. LFD f30, 6 * SIZE(B)
  301. mr BO, B
  302. #else
  303. slwi r0, KK, 1 + ZBASE_SHIFT
  304. add AO, AO, r0
  305. add BO, B, r0
  306. LFD f16, 0 * SIZE(AO)
  307. LFD f17, 1 * SIZE(AO)
  308. LFD f18, 2 * SIZE(AO)
  309. LFD f19, 3 * SIZE(AO)
  310. LFD f20, 0 * SIZE(BO)
  311. LFD f21, 1 * SIZE(BO)
  312. LFD f22, 2 * SIZE(BO)
  313. LFD f23, 3 * SIZE(BO)
  314. LFD f24, 4 * SIZE(AO)
  315. LFD f25, 5 * SIZE(AO)
  316. LFD f26, 6 * SIZE(AO)
  317. LFD f28, 4 * SIZE(BO)
  318. LFD f29, 5 * SIZE(BO)
  319. LFD f30, 6 * SIZE(BO)
  320. #endif
  321. PREFETCH_C1
  322. PREFETCH_C2
  323. #if (defined(LEFT) && !defined(TRANSA)) || (!defined(LEFT) && defined(TRANSA))
  324. sub TEMP, K, KK
  325. #elif defined(LEFT)
  326. addi TEMP, KK, 2
  327. #else
  328. addi TEMP, KK, 2
  329. #endif
  330. srawi. TEMP, TEMP, 2
  331. mtspr CTR, TEMP
  332. ble LL(15)
  333. #endif
  334. .align 4
  335. #define NOP1 mr r18, r18
  336. #define NOP2 mr r19, r19
  337. LL(12):
  338. FMADD f0, f16, f20, f0
  339. dcbt AO, PREA
  340. FMADD f4, f16, f21, f4
  341. dcbt BO, PREB
  342. FMADD f8, f16, f22, f8
  343. LFD f31, 7 * SIZE(BO)
  344. FMADD f12, f16, f23, f12
  345. LFD f27, 7 * SIZE(AO)
  346. FMADD f1, f17, f20, f1
  347. LFD f16, 8 * SIZE(AO)
  348. FMADD f5, f17, f21, f5
  349. NOP2
  350. FMADD f9, f17, f22, f9
  351. NOP1
  352. FMADD f13, f17, f23, f13
  353. LFD f17, 9 * SIZE(AO)
  354. FMADD f2, f18, f20, f2
  355. NOP1
  356. FMADD f6, f18, f21, f6
  357. NOP2
  358. FMADD f10, f18, f22, f10
  359. NOP1
  360. FMADD f14, f18, f23, f14
  361. LFD f18, 10 * SIZE(AO)
  362. FMADD f3, f19, f20, f3
  363. LFD f20, 8 * SIZE(BO)
  364. FMADD f7, f19, f21, f7
  365. LFD f21, 9 * SIZE(BO)
  366. FMADD f11, f19, f22, f11
  367. LFD f22, 10 * SIZE(BO)
  368. FMADD f15, f19, f23, f15
  369. LFD f19, 11 * SIZE(AO)
  370. FMADD f0, f24, f28, f0
  371. LFD f23, 11 * SIZE(BO)
  372. FMADD f4, f24, f29, f4
  373. NOP2
  374. FMADD f8, f24, f30, f8
  375. NOP1
  376. FMADD f12, f24, f31, f12
  377. LFD f24, 12 * SIZE(AO)
  378. FMADD f1, f25, f28, f1
  379. NOP1
  380. FMADD f5, f25, f29, f5
  381. NOP2
  382. FMADD f9, f25, f30, f9
  383. NOP1
  384. FMADD f13, f25, f31, f13
  385. LFD f25, 13 * SIZE(AO)
  386. FMADD f2, f26, f28, f2
  387. NOP1
  388. FMADD f6, f26, f29, f6
  389. NOP2
  390. FMADD f10, f26, f30, f10
  391. NOP1
  392. FMADD f14, f26, f31, f14
  393. LFD f26, 14 * SIZE(AO)
  394. FMADD f3, f27, f28, f3
  395. LFD f28, 12 * SIZE(BO)
  396. FMADD f7, f27, f29, f7
  397. LFD f29, 13 * SIZE(BO)
  398. FMADD f11, f27, f30, f11
  399. LFD f30, 14 * SIZE(BO)
  400. FMADD f15, f27, f31, f15
  401. LFD f27, 15 * SIZE(AO)
  402. FMADD f0, f16, f20, f0
  403. LFD f31, 15 * SIZE(BO)
  404. FMADD f4, f16, f21, f4
  405. NOP2
  406. FMADD f8, f16, f22, f8
  407. NOP1
  408. FMADD f12, f16, f23, f12
  409. LFD f16, 16 * SIZE(AO)
  410. FMADD f1, f17, f20, f1
  411. NOP1
  412. FMADD f5, f17, f21, f5
  413. NOP2
  414. FMADD f9, f17, f22, f9
  415. NOP1
  416. FMADD f13, f17, f23, f13
  417. LFD f17, 17 * SIZE(AO)
  418. FMADD f2, f18, f20, f2
  419. NOP1
  420. FMADD f6, f18, f21, f6
  421. NOP2
  422. FMADD f10, f18, f22, f10
  423. NOP1
  424. FMADD f14, f18, f23, f14
  425. LFD f18, 18 * SIZE(AO)
  426. FMADD f3, f19, f20, f3
  427. LFD f20, 16 * SIZE(BO)
  428. FMADD f7, f19, f21, f7
  429. LFD f21, 17 * SIZE(BO)
  430. FMADD f11, f19, f22, f11
  431. LFD f22, 18 * SIZE(BO)
  432. FMADD f15, f19, f23, f15
  433. LFD f19, 19 * SIZE(AO)
  434. FMADD f0, f24, f28, f0
  435. LFD f23, 19 * SIZE(BO)
  436. FMADD f4, f24, f29, f4
  437. NOP2
  438. FMADD f8, f24, f30, f8
  439. NOP1
  440. FMADD f12, f24, f31, f12
  441. LFD f24, 20 * SIZE(AO)
  442. FMADD f1, f25, f28, f1
  443. NOP1
  444. FMADD f5, f25, f29, f5
  445. NOP2
  446. FMADD f9, f25, f30, f9
  447. NOP1
  448. FMADD f13, f25, f31, f13
  449. LFD f25, 21 * SIZE(AO)
  450. FMADD f2, f26, f28, f2
  451. NOP1
  452. FMADD f6, f26, f29, f6
  453. NOP2
  454. FMADD f10, f26, f30, f10
  455. NOP1
  456. FMADD f14, f26, f31, f14
  457. LFD f26, 22 * SIZE(AO)
  458. FMADD f3, f27, f28, f3
  459. LFD f28, 20 * SIZE(BO)
  460. FMADD f7, f27, f29, f7
  461. LFD f29, 21 * SIZE(BO)
  462. FMADD f11, f27, f30, f11
  463. LFD f30, 22 * SIZE(BO)
  464. FMADD f15, f27, f31, f15
  465. addi AO, AO, 16 * SIZE
  466. addi BO, BO, 16 * SIZE
  467. bdnz LL(12)
  468. .align 4
  469. LL(15):
  470. #ifndef TRMMKERNEL
  471. andi. r0, K, 3
  472. lfd f30, ALPHA_R
  473. lfd f31, ALPHA_I
  474. mtspr CTR, r0
  475. ble LL(KERNEL_MainFinish)
  476. #else
  477. #if (defined(LEFT) && !defined(TRANSA)) || (!defined(LEFT) && defined(TRANSA))
  478. sub TEMP, K, KK
  479. #elif defined(LEFT)
  480. addi TEMP, KK, 2
  481. #else
  482. addi TEMP, KK, 2
  483. #endif
  484. andi. TEMP, TEMP, 3
  485. lfd f30, ALPHA_R
  486. lfd f31, ALPHA_I
  487. mtspr CTR, TEMP
  488. ble LL(KERNEL_MainFinish)
  489. #endif
  490. .align 4
  491. LL(16):
  492. FMADD f0, f16, f20, f0
  493. FMADD f5, f17, f21, f5
  494. FMADD f10, f18, f22, f10
  495. FMADD f15, f19, f23, f15
  496. FMADD f1, f17, f20, f1
  497. FMADD f2, f18, f20, f2
  498. FMADD f3, f19, f20, f3
  499. FMADD f4, f16, f21, f4
  500. FMADD f6, f18, f21, f6
  501. FMADD f7, f19, f21, f7
  502. FMADD f8, f16, f22, f8
  503. FMADD f9, f17, f22, f9
  504. FMADD f11, f19, f22, f11
  505. FMADD f12, f16, f23, f12
  506. FMADD f13, f17, f23, f13
  507. FMADD f14, f18, f23, f14
  508. LFD f16, 4 * SIZE(AO)
  509. LFD f17, 5 * SIZE(AO)
  510. LFD f18, 6 * SIZE(AO)
  511. LFD f19, 7 * SIZE(AO)
  512. LFD f20, 4 * SIZE(BO)
  513. LFD f21, 5 * SIZE(BO)
  514. LFD f22, 6 * SIZE(BO)
  515. LFD f23, 7 * SIZE(BO)
  516. addi BO, BO, 4 * SIZE
  517. addi AO, AO, 4 * SIZE
  518. bdnz LL(16)
  519. .align 4
  520. LL(KERNEL_MainFinish):
  521. #ifndef TRMMKERNEL
  522. LFD f16, 0 * SIZE(CO1)
  523. LFD f17, 1 * SIZE(CO1)
  524. LFD f18, 2 * SIZE(CO1)
  525. LFD f19, 3 * SIZE(CO1)
  526. #endif
  527. #if defined(NN) || defined(NT) || defined(TN) || defined(TT) || \
  528. defined(CC) || defined(CR) || defined(RC) || defined(RR)
  529. FSUB f0, f0, f5
  530. FADD f1, f1, f4
  531. FSUB f2, f2, f7
  532. FADD f3, f3, f6
  533. #ifndef TRMMKERNEL
  534. LFD f20, 0 * SIZE(CO2)
  535. LFD f21, 1 * SIZE(CO2)
  536. LFD f22, 2 * SIZE(CO2)
  537. LFD f23, 3 * SIZE(CO2)
  538. #endif
  539. FSUB f8, f8, f13
  540. FADD f9, f9, f12
  541. FSUB f10, f10, f15
  542. FADD f11, f11, f14
  543. #elif defined(CN) || defined(CT) || defined(RN) || defined(RT)
  544. FADD f0, f0, f5
  545. FSUB f1, f1, f4
  546. FADD f2, f2, f7
  547. FSUB f3, f3, f6
  548. #ifndef TRMMKERNEL
  549. LFD f20, 0 * SIZE(CO2)
  550. LFD f21, 1 * SIZE(CO2)
  551. LFD f22, 2 * SIZE(CO2)
  552. LFD f23, 3 * SIZE(CO2)
  553. #endif
  554. FADD f8, f8, f13
  555. FSUB f9, f9, f12
  556. FADD f10, f10, f15
  557. FSUB f11, f11, f14
  558. #else /* defined(NC) || defined(TC) || defined(NR) || defined(TR) */
  559. FADD f0, f0, f5
  560. FSUB f1, f4, f1
  561. FADD f2, f2, f7
  562. FSUB f3, f6, f3
  563. #ifndef TRMMKERNEL
  564. LFD f20, 0 * SIZE(CO2)
  565. LFD f21, 1 * SIZE(CO2)
  566. LFD f22, 2 * SIZE(CO2)
  567. LFD f23, 3 * SIZE(CO2)
  568. #endif
  569. FADD f8, f8, f13
  570. FSUB f9, f12, f9
  571. FADD f10, f10, f15
  572. FSUB f11, f14, f11
  573. #endif
  574. #if defined(NN) || defined(NT) || defined(TN) || defined(TT)
  575. #ifndef TRMMKERNEL
  576. FMADD f16, f30, f0, f16
  577. FMADD f17, f30, f1, f17
  578. FMADD f18, f30, f2, f18
  579. FMADD f19, f30, f3, f19
  580. FMADD f20, f30, f8, f20
  581. FMADD f21, f30, f9, f21
  582. FMADD f22, f30, f10, f22
  583. FMADD f23, f30, f11, f23
  584. #else
  585. FMUL f16, f30, f0
  586. FMUL f17, f30, f1
  587. FMUL f18, f30, f2
  588. FMUL f19, f30, f3
  589. FMUL f20, f30, f8
  590. FMUL f21, f30, f9
  591. FMUL f22, f30, f10
  592. FMUL f23, f30, f11
  593. #endif
  594. FNMSUB f16, f31, f1, f16
  595. FMADD f17, f31, f0, f17
  596. FNMSUB f18, f31, f3, f18
  597. FMADD f19, f31, f2, f19
  598. FNMSUB f20, f31, f9, f20
  599. FMADD f21, f31, f8, f21
  600. FNMSUB f22, f31, f11, f22
  601. FMADD f23, f31, f10, f23
  602. #else /* defined(CN)||defined(CT)||defined(NC)||defined(TC)||defined(CC) */
  603. /* defined(RN)||defined(RT)||defined(NR)||defined(TR)||defined(CR) */
  604. /* defined(RC)|| defined(RR) */
  605. #ifndef TRMMKERNEL
  606. FMADD f16, f30, f0, f16
  607. FNMSUB f17, f30, f1, f17
  608. FMADD f18, f30, f2, f18
  609. FNMSUB f19, f30, f3, f19
  610. FMADD f20, f30, f8, f20
  611. FNMSUB f21, f30, f9, f21
  612. FMADD f22, f30, f10, f22
  613. FNMSUB f23, f30, f11, f23
  614. FMADD f16, f31, f1, f16
  615. FMADD f17, f31, f0, f17
  616. FMADD f18, f31, f3, f18
  617. FMADD f19, f31, f2, f19
  618. FMADD f20, f31, f9, f20
  619. FMADD f21, f31, f8, f21
  620. FMADD f22, f31, f11, f22
  621. FMADD f23, f31, f10, f23
  622. #else
  623. FMUL f16, f30, f0
  624. FMUL f17, f30, f1
  625. FMUL f18, f30, f2
  626. FMUL f19, f30, f3
  627. FMUL f20, f30, f8
  628. FMUL f21, f30, f9
  629. FMUL f22, f30, f10
  630. FMUL f23, f30, f11
  631. FMADD f16, f31, f1, f16
  632. FNMADD f17, f31, f0, f17
  633. FMADD f18, f31, f3, f18
  634. FNMADD f19, f31, f2, f19
  635. FMADD f20, f31, f9, f20
  636. FNMADD f21, f31, f8, f21
  637. FMADD f22, f31, f11, f22
  638. FNMADD f23, f31, f10, f23
  639. #endif
  640. #endif
  641. STFD f16, 0 * SIZE(CO1)
  642. STFD f17, 1 * SIZE(CO1)
  643. STFD f18, 2 * SIZE(CO1)
  644. STFD f19, 3 * SIZE(CO1)
  645. lfs f0, FZERO
  646. fmr f1, f0
  647. fmr f2, f0
  648. fmr f3, f0
  649. STFD f20, 0 * SIZE(CO2)
  650. STFD f21, 1 * SIZE(CO2)
  651. STFD f22, 2 * SIZE(CO2)
  652. STFD f23, 3 * SIZE(CO2)
  653. fmr f4, f0
  654. fmr f5, f0
  655. fmr f6, f0
  656. fmr f7, f0
  657. fmr f8, f0
  658. fmr f9, f0
  659. fmr f10, f0
  660. fmr f11, f0
  661. fmr f12, f0
  662. fmr f13, f0
  663. fmr f14, f0
  664. fmr f15, f0
  665. addi CO1, CO1, 4 * SIZE
  666. addi CO2, CO2, 4 * SIZE
  667. #ifdef TRMMKERNEL
  668. #if ( defined(LEFT) && defined(TRANSA)) || \
  669. (!defined(LEFT) && !defined(TRANSA))
  670. sub TEMP, K, KK
  671. #ifdef LEFT
  672. addi TEMP, TEMP, -2
  673. #else
  674. addi TEMP, TEMP, -2
  675. #endif
  676. slwi TEMP, TEMP, 1 + ZBASE_SHIFT
  677. add AO, AO, TEMP
  678. add BO, BO, TEMP
  679. #endif
  680. #ifdef LEFT
  681. addi KK, KK, 2
  682. #endif
  683. #endif
  684. addic. I, I, -1
  685. bgt LL(11)
  686. .align 4
  687. LL(20):
  688. andi. I, M, 1
  689. ble LL(29)
  690. #ifndef TRMMKERNEL
  691. LFD f16, 0 * SIZE(AO)
  692. LFD f17, 1 * SIZE(AO)
  693. LFD f18, 2 * SIZE(AO)
  694. LFD f19, 3 * SIZE(AO)
  695. LFD f20, 0 * SIZE(B)
  696. LFD f21, 1 * SIZE(B)
  697. LFD f22, 2 * SIZE(B)
  698. LFD f23, 3 * SIZE(B)
  699. LFD f24, 4 * SIZE(B)
  700. LFD f25, 5 * SIZE(B)
  701. LFD f26, 6 * SIZE(B)
  702. LFD f27, 7 * SIZE(B)
  703. lfs f0, FZERO
  704. fmr f1, f0
  705. fmr f2, f0
  706. fmr f3, f0
  707. fmr f4, f0
  708. fmr f5, f0
  709. fmr f6, f0
  710. fmr f7, f0
  711. srawi. r0, K, 2
  712. mr BO, B
  713. mtspr CTR, r0
  714. ble LL(25)
  715. #else
  716. #if (defined(TRMMKERNEL) && defined(LEFT) && defined(TRANSA)) || \
  717. (defined(TRMMKERNEL) && !defined(LEFT) && !defined(TRANSA))
  718. LFD f16, 0 * SIZE(AO)
  719. LFD f17, 1 * SIZE(AO)
  720. LFD f18, 2 * SIZE(AO)
  721. LFD f19, 3 * SIZE(AO)
  722. LFD f20, 0 * SIZE(B)
  723. LFD f21, 1 * SIZE(B)
  724. LFD f22, 2 * SIZE(B)
  725. LFD f23, 3 * SIZE(B)
  726. LFD f24, 4 * SIZE(B)
  727. LFD f25, 5 * SIZE(B)
  728. LFD f26, 6 * SIZE(B)
  729. LFD f27, 7 * SIZE(B)
  730. mr BO, B
  731. #else
  732. slwi r0, KK, 0 + ZBASE_SHIFT
  733. slwi TEMP, KK, 1 + ZBASE_SHIFT
  734. add AO, AO, r0
  735. add BO, B, TEMP
  736. LFD f16, 0 * SIZE(AO)
  737. LFD f17, 1 * SIZE(AO)
  738. LFD f18, 2 * SIZE(AO)
  739. LFD f19, 3 * SIZE(AO)
  740. LFD f20, 0 * SIZE(BO)
  741. LFD f21, 1 * SIZE(BO)
  742. LFD f22, 2 * SIZE(BO)
  743. LFD f23, 3 * SIZE(BO)
  744. LFD f24, 4 * SIZE(BO)
  745. LFD f25, 5 * SIZE(BO)
  746. LFD f26, 6 * SIZE(BO)
  747. LFD f27, 7 * SIZE(BO)
  748. #endif
  749. #if (defined(LEFT) && !defined(TRANSA)) || (!defined(LEFT) && defined(TRANSA))
  750. sub TEMP, K, KK
  751. #elif defined(LEFT)
  752. addi TEMP, KK, 1
  753. #else
  754. addi TEMP, KK, 2
  755. #endif
  756. srawi. TEMP, TEMP, 2
  757. mtspr CTR, TEMP
  758. ble LL(25)
  759. #endif
  760. .align 4
  761. LL(22):
  762. fmadd f0, f16, f20, f0
  763. fmadd f1, f16, f21, f1
  764. fmadd f2, f16, f22, f2
  765. fmadd f3, f16, f23, f3
  766. fmadd f4, f17, f20, f4
  767. fmadd f5, f17, f21, f5
  768. fmadd f6, f17, f22, f6
  769. fmadd f7, f17, f23, f7
  770. LFD f20, 8 * SIZE(BO)
  771. LFD f21, 9 * SIZE(BO)
  772. LFD f22, 10 * SIZE(BO)
  773. LFD f23, 11 * SIZE(BO)
  774. fmadd f0, f18, f24, f0
  775. fmadd f1, f18, f25, f1
  776. fmadd f2, f18, f26, f2
  777. fmadd f3, f18, f27, f3
  778. fmadd f4, f19, f24, f4
  779. fmadd f5, f19, f25, f5
  780. fmadd f6, f19, f26, f6
  781. fmadd f7, f19, f27, f7
  782. LFD f24, 12 * SIZE(BO)
  783. LFD f25, 13 * SIZE(BO)
  784. LFD f26, 14 * SIZE(BO)
  785. LFD f27, 15 * SIZE(BO)
  786. LFD f16, 4 * SIZE(AO)
  787. LFD f17, 5 * SIZE(AO)
  788. LFD f18, 6 * SIZE(AO)
  789. LFD f19, 7 * SIZE(AO)
  790. fmadd f0, f16, f20, f0
  791. fmadd f1, f16, f21, f1
  792. fmadd f2, f16, f22, f2
  793. fmadd f3, f16, f23, f3
  794. fmadd f4, f17, f20, f4
  795. fmadd f5, f17, f21, f5
  796. fmadd f6, f17, f22, f6
  797. fmadd f7, f17, f23, f7
  798. LFD f20, 16 * SIZE(BO)
  799. LFD f21, 17 * SIZE(BO)
  800. LFD f22, 18 * SIZE(BO)
  801. LFD f23, 19 * SIZE(BO)
  802. fmadd f0, f18, f24, f0
  803. fmadd f1, f18, f25, f1
  804. fmadd f2, f18, f26, f2
  805. fmadd f3, f18, f27, f3
  806. fmadd f4, f19, f24, f4
  807. fmadd f5, f19, f25, f5
  808. fmadd f6, f19, f26, f6
  809. fmadd f7, f19, f27, f7
  810. LFD f16, 8 * SIZE(AO)
  811. LFD f17, 9 * SIZE(AO)
  812. LFD f18, 10 * SIZE(AO)
  813. LFD f19, 11 * SIZE(AO)
  814. LFD f24, 20 * SIZE(BO)
  815. LFD f25, 21 * SIZE(BO)
  816. LFD f26, 22 * SIZE(BO)
  817. LFD f27, 23 * SIZE(BO)
  818. addi BO, BO, 16 * SIZE
  819. addi AO, AO, 8 * SIZE
  820. bdnz LL(22)
  821. .align 4
  822. LL(25):
  823. #ifndef TRMMKERNEL
  824. andi. r0, K, 3
  825. lfd f30, ALPHA_R
  826. lfd f31, ALPHA_I
  827. mtspr CTR, r0
  828. ble LL(27)
  829. #else
  830. #if (defined(LEFT) && !defined(TRANSA)) || (!defined(LEFT) && defined(TRANSA))
  831. sub TEMP, K, KK
  832. #elif defined(LEFT)
  833. addi TEMP, KK, 1
  834. #else
  835. addi TEMP, KK, 2
  836. #endif
  837. andi. TEMP, TEMP, 3
  838. lfd f30, ALPHA_R
  839. lfd f31, ALPHA_I
  840. mtspr CTR, TEMP
  841. ble LL(27)
  842. #endif
  843. .align 4
  844. LL(26):
  845. fmadd f0, f16, f20, f0
  846. fmadd f1, f16, f21, f1
  847. fmadd f2, f16, f22, f2
  848. fmadd f3, f16, f23, f3
  849. fmadd f4, f17, f20, f4
  850. fmadd f5, f17, f21, f5
  851. fmadd f6, f17, f22, f6
  852. fmadd f7, f17, f23, f7
  853. LFD f20, 4 * SIZE(BO)
  854. LFD f21, 5 * SIZE(BO)
  855. LFD f22, 6 * SIZE(BO)
  856. LFD f23, 7 * SIZE(BO)
  857. LFD f16, 2 * SIZE(AO)
  858. LFD f17, 3 * SIZE(AO)
  859. addi AO, AO, 2 * SIZE
  860. addi BO, BO, 4 * SIZE
  861. bdnz LL(26)
  862. .align 4
  863. LL(27):
  864. #if defined(NN) || defined(NT) || defined(TN) || defined(TT) || \
  865. defined(CC) || defined(CR) || defined(RC) || defined(RR)
  866. FSUB f0, f0, f5
  867. FADD f1, f1, f4
  868. FSUB f2, f2, f7
  869. FADD f3, f3, f6
  870. #elif defined(CN) || defined(CT) || defined(RN) || defined(RT)
  871. FADD f0, f0, f5
  872. FSUB f1, f4, f1
  873. FADD f2, f2, f7
  874. FSUB f3, f6, f3
  875. #else /* defined(NC) || defined(TC) || defined(NR) || defined(TR) */
  876. FADD f0, f0, f5
  877. FSUB f1, f1, f4
  878. FADD f2, f2, f7
  879. FSUB f3, f3, f6
  880. #endif
  881. #ifndef TRMMKERNEL
  882. LFD f16, 0 * SIZE(CO1)
  883. LFD f17, 1 * SIZE(CO1)
  884. LFD f18, 0 * SIZE(CO2)
  885. LFD f19, 1 * SIZE(CO2)
  886. #endif
  887. #if defined(NN) || defined(NT) || defined(TN) || defined(TT)
  888. #ifndef TRMMKERNEL
  889. FMADD f16, f30, f0, f16
  890. FMADD f17, f30, f1, f17
  891. FMADD f18, f30, f2, f18
  892. FMADD f19, f30, f3, f19
  893. #else
  894. FMUL f16, f30, f0
  895. FMUL f17, f30, f1
  896. FMUL f18, f30, f2
  897. FMUL f19, f30, f3
  898. #endif
  899. FNMSUB f16, f31, f1, f16
  900. FMADD f17, f31, f0, f17
  901. FNMSUB f18, f31, f3, f18
  902. FMADD f19, f31, f2, f19
  903. #else /* defined(CN)||defined(CT)||defined(NC)||defined(TC)||defined(CC) */
  904. /* defined(RN)||defined(RT)||defined(NR)||defined(TR)||defined(CR) */
  905. /* defined(RC)|| defined(RR) */
  906. #ifndef TRMMKERNEL
  907. FMADD f16, f30, f0, f16
  908. FNMSUB f17, f30, f1, f17
  909. FMADD f18, f30, f2, f18
  910. FNMSUB f19, f30, f3, f19
  911. FMADD f16, f31, f1, f16
  912. FMADD f17, f31, f0, f17
  913. FMADD f18, f31, f3, f18
  914. FMADD f19, f31, f2, f19
  915. #else
  916. FMUL f16, f30, f0
  917. FMUL f17, f30, f1
  918. FMUL f18, f30, f2
  919. FMUL f19, f30, f3
  920. FMADD f16, f31, f1, f16
  921. FNMADD f17, f31, f0, f17
  922. FMADD f18, f31, f3, f18
  923. FNMADD f19, f31, f2, f19
  924. #endif
  925. #endif
  926. STFD f16, 0 * SIZE(CO1)
  927. STFD f17, 1 * SIZE(CO1)
  928. STFD f18, 0 * SIZE(CO2)
  929. STFD f19, 1 * SIZE(CO2)
  930. addi CO1, CO1, 2 * SIZE
  931. addi CO2, CO2, 2 * SIZE
  932. #ifdef TRMMKERNEL
  933. #if ( defined(LEFT) && defined(TRANSA)) || \
  934. (!defined(LEFT) && !defined(TRANSA))
  935. sub TEMP, K, KK
  936. #ifdef LEFT
  937. addi TEMP, TEMP, -1
  938. #else
  939. addi TEMP, TEMP, -2
  940. #endif
  941. slwi r0, TEMP, 0 + ZBASE_SHIFT
  942. slwi TEMP, TEMP, 1 + ZBASE_SHIFT
  943. add AO, AO, r0
  944. add BO, BO, TEMP
  945. #endif
  946. #ifdef LEFT
  947. addi KK, KK, 1
  948. #endif
  949. #endif
  950. .align 4
  951. LL(29):
  952. #if defined(TRMMKERNEL) && !defined(LEFT)
  953. addi KK, KK, 2
  954. #endif
  955. mr B, BO
  956. addic. J, J, -1
  957. lfs f0, FZERO
  958. bgt LL(10)
  959. .align 4
  960. LL(30):
  961. andi. J, N, 1
  962. ble LL(999)
  963. #if defined(TRMMKERNEL) && defined(LEFT)
  964. mr KK, OFFSET
  965. #endif
  966. srawi. I, M, 1
  967. mr CO1, C
  968. add C, C, LDC
  969. mr AO, A
  970. ble LL(40)
  971. .align 4
  972. LL(31):
  973. #ifndef TRMMKERNEL
  974. LFD f20, 0 * SIZE(AO)
  975. LFD f21, 1 * SIZE(AO)
  976. LFD f22, 2 * SIZE(AO)
  977. LFD f23, 3 * SIZE(AO)
  978. LFD f24, 4 * SIZE(AO)
  979. LFD f25, 5 * SIZE(AO)
  980. LFD f26, 6 * SIZE(AO)
  981. LFD f27, 7 * SIZE(AO)
  982. LFD f16, 0 * SIZE(B)
  983. LFD f17, 1 * SIZE(B)
  984. LFD f18, 2 * SIZE(B)
  985. LFD f19, 3 * SIZE(B)
  986. lfs f0, FZERO
  987. fmr f1, f0
  988. fmr f2, f0
  989. fmr f3, f0
  990. fmr f4, f0
  991. fmr f5, f0
  992. fmr f6, f0
  993. fmr f7, f0
  994. srawi. r0, K, 2
  995. mr BO, B
  996. mtspr CTR, r0
  997. ble LL(35)
  998. #else
  999. #if (defined(TRMMKERNEL) && defined(LEFT) && defined(TRANSA)) || \
  1000. (defined(TRMMKERNEL) && !defined(LEFT) && !defined(TRANSA))
  1001. LFD f20, 0 * SIZE(AO)
  1002. LFD f21, 1 * SIZE(AO)
  1003. LFD f22, 2 * SIZE(AO)
  1004. LFD f23, 3 * SIZE(AO)
  1005. LFD f24, 4 * SIZE(AO)
  1006. LFD f25, 5 * SIZE(AO)
  1007. LFD f26, 6 * SIZE(AO)
  1008. LFD f27, 7 * SIZE(AO)
  1009. LFD f16, 0 * SIZE(B)
  1010. LFD f17, 1 * SIZE(B)
  1011. LFD f18, 2 * SIZE(B)
  1012. LFD f19, 3 * SIZE(B)
  1013. lfs f0, FZERO
  1014. fmr f1, f0
  1015. fmr f2, f0
  1016. fmr f3, f0
  1017. fmr f4, f0
  1018. fmr f5, f0
  1019. fmr f6, f0
  1020. fmr f7, f0
  1021. mr BO, B
  1022. #else
  1023. slwi r0, KK, 1 + ZBASE_SHIFT
  1024. slwi TEMP, KK, 0 + ZBASE_SHIFT
  1025. add AO, AO, r0
  1026. add BO, B, TEMP
  1027. LFD f20, 0 * SIZE(AO)
  1028. LFD f21, 1 * SIZE(AO)
  1029. LFD f22, 2 * SIZE(AO)
  1030. LFD f23, 3 * SIZE(AO)
  1031. LFD f24, 4 * SIZE(AO)
  1032. LFD f25, 5 * SIZE(AO)
  1033. LFD f26, 6 * SIZE(AO)
  1034. LFD f27, 7 * SIZE(AO)
  1035. LFD f16, 0 * SIZE(BO)
  1036. LFD f17, 1 * SIZE(BO)
  1037. LFD f18, 2 * SIZE(BO)
  1038. LFD f19, 3 * SIZE(BO)
  1039. lfs f0, FZERO
  1040. fmr f1, f0
  1041. fmr f2, f0
  1042. fmr f3, f0
  1043. fmr f4, f0
  1044. fmr f5, f0
  1045. fmr f6, f0
  1046. fmr f7, f0
  1047. #endif
  1048. PREFETCH_C1
  1049. #if (defined(LEFT) && !defined(TRANSA)) || (!defined(LEFT) && defined(TRANSA))
  1050. sub TEMP, K, KK
  1051. #elif defined(LEFT)
  1052. addi TEMP, KK, 2
  1053. #else
  1054. addi TEMP, KK, 1
  1055. #endif
  1056. srawi. TEMP, TEMP, 2
  1057. mtspr CTR, TEMP
  1058. ble LL(35)
  1059. #endif
  1060. .align 4
  1061. LL(32):
  1062. fmadd f0, f16, f20, f0
  1063. fmadd f1, f16, f21, f1
  1064. fmadd f2, f16, f22, f2
  1065. fmadd f3, f16, f23, f3
  1066. fmadd f4, f17, f20, f4
  1067. fmadd f5, f17, f21, f5
  1068. fmadd f6, f17, f22, f6
  1069. fmadd f7, f17, f23, f7
  1070. LFD f20, 8 * SIZE(AO)
  1071. LFD f21, 9 * SIZE(AO)
  1072. LFD f22, 10 * SIZE(AO)
  1073. LFD f23, 11 * SIZE(AO)
  1074. fmadd f0, f18, f24, f0
  1075. fmadd f1, f18, f25, f1
  1076. fmadd f2, f18, f26, f2
  1077. fmadd f3, f18, f27, f3
  1078. fmadd f4, f19, f24, f4
  1079. fmadd f5, f19, f25, f5
  1080. fmadd f6, f19, f26, f6
  1081. fmadd f7, f19, f27, f7
  1082. LFD f24, 12 * SIZE(AO)
  1083. LFD f25, 13 * SIZE(AO)
  1084. LFD f26, 14 * SIZE(AO)
  1085. LFD f27, 15 * SIZE(AO)
  1086. LFD f16, 4 * SIZE(BO)
  1087. LFD f17, 5 * SIZE(BO)
  1088. LFD f18, 6 * SIZE(BO)
  1089. LFD f19, 7 * SIZE(BO)
  1090. fmadd f0, f16, f20, f0
  1091. fmadd f1, f16, f21, f1
  1092. fmadd f2, f16, f22, f2
  1093. fmadd f3, f16, f23, f3
  1094. fmadd f4, f17, f20, f4
  1095. fmadd f5, f17, f21, f5
  1096. fmadd f6, f17, f22, f6
  1097. fmadd f7, f17, f23, f7
  1098. LFD f20, 16 * SIZE(AO)
  1099. LFD f21, 17 * SIZE(AO)
  1100. LFD f22, 18 * SIZE(AO)
  1101. LFD f23, 19 * SIZE(AO)
  1102. fmadd f0, f18, f24, f0
  1103. fmadd f1, f18, f25, f1
  1104. fmadd f2, f18, f26, f2
  1105. fmadd f3, f18, f27, f3
  1106. fmadd f4, f19, f24, f4
  1107. fmadd f5, f19, f25, f5
  1108. fmadd f6, f19, f26, f6
  1109. fmadd f7, f19, f27, f7
  1110. LFD f24, 20 * SIZE(AO)
  1111. LFD f25, 21 * SIZE(AO)
  1112. LFD f26, 22 * SIZE(AO)
  1113. LFD f27, 23 * SIZE(AO)
  1114. LFD f16, 8 * SIZE(BO)
  1115. LFD f17, 9 * SIZE(BO)
  1116. LFD f18, 10 * SIZE(BO)
  1117. LFD f19, 11 * SIZE(BO)
  1118. addi AO, AO, 16 * SIZE
  1119. addi BO, BO, 8 * SIZE
  1120. dcbt PREA, AO
  1121. dcbt PREA, BO
  1122. bdnz LL(32)
  1123. .align 4
  1124. LL(35):
  1125. #ifndef TRMMKERNEL
  1126. andi. r0, K, 3
  1127. lfd f30, ALPHA_R
  1128. lfd f31, ALPHA_I
  1129. mtspr CTR, r0
  1130. ble LL(37)
  1131. #else
  1132. #if (defined(LEFT) && !defined(TRANSA)) || (!defined(LEFT) && defined(TRANSA))
  1133. sub TEMP, K, KK
  1134. #elif defined(LEFT)
  1135. addi TEMP, KK, 2
  1136. #else
  1137. addi TEMP, KK, 1
  1138. #endif
  1139. andi. TEMP, TEMP, 3
  1140. lfd f30, ALPHA_R
  1141. lfd f31, ALPHA_I
  1142. mtspr CTR, TEMP
  1143. ble LL(37)
  1144. #endif
  1145. .align 4
  1146. LL(36):
  1147. fmadd f0, f16, f20, f0
  1148. fmadd f1, f16, f21, f1
  1149. fmadd f2, f16, f22, f2
  1150. fmadd f3, f16, f23, f3
  1151. fmadd f4, f17, f20, f4
  1152. fmadd f5, f17, f21, f5
  1153. fmadd f6, f17, f22, f6
  1154. fmadd f7, f17, f23, f7
  1155. LFD f20, 4 * SIZE(AO)
  1156. LFD f21, 5 * SIZE(AO)
  1157. LFD f22, 6 * SIZE(AO)
  1158. LFD f23, 7 * SIZE(AO)
  1159. LFD f16, 2 * SIZE(BO)
  1160. LFD f17, 3 * SIZE(BO)
  1161. addi BO, BO, 2 * SIZE
  1162. addi AO, AO, 4 * SIZE
  1163. bdnz LL(36)
  1164. .align 4
  1165. LL(37):
  1166. #if defined(NN) || defined(NT) || defined(TN) || defined(TT) || \
  1167. defined(CC) || defined(CR) || defined(RC) || defined(RR)
  1168. FSUB f0, f0, f5
  1169. FADD f1, f1, f4
  1170. FSUB f2, f2, f7
  1171. FADD f3, f3, f6
  1172. #elif defined(CN) || defined(CT) || defined(RN) || defined(RT)
  1173. FADD f0, f0, f5
  1174. FSUB f1, f1, f4
  1175. FADD f2, f2, f7
  1176. FSUB f3, f3, f6
  1177. #else /* defined(NC) || defined(TC) || defined(NR) || defined(TR) */
  1178. FADD f0, f0, f5
  1179. FSUB f1, f4, f1
  1180. FADD f2, f2, f7
  1181. FSUB f3, f6, f3
  1182. #endif
  1183. #ifndef TRMMKERNEL
  1184. LFD f16, 0 * SIZE(CO1)
  1185. LFD f17, 1 * SIZE(CO1)
  1186. LFD f18, 2 * SIZE(CO1)
  1187. LFD f19, 3 * SIZE(CO1)
  1188. #endif
  1189. #if defined(NN) || defined(NT) || defined(TN) || defined(TT)
  1190. #ifndef TRMMKERNEL
  1191. FMADD f16, f30, f0, f16
  1192. FMADD f17, f30, f1, f17
  1193. FMADD f18, f30, f2, f18
  1194. FMADD f19, f30, f3, f19
  1195. #else
  1196. FMUL f16, f30, f0
  1197. FMUL f17, f30, f1
  1198. FMUL f18, f30, f2
  1199. FMUL f19, f30, f3
  1200. #endif
  1201. FNMSUB f16, f31, f1, f16
  1202. FMADD f17, f31, f0, f17
  1203. FNMSUB f18, f31, f3, f18
  1204. FMADD f19, f31, f2, f19
  1205. #else /* defined(CN)||defined(CT)||defined(NC)||defined(TC)||defined(CC) */
  1206. /* defined(RN)||defined(RT)||defined(NR)||defined(TR)||defined(CR) */
  1207. /* defined(RC)|| defined(RR) */
  1208. #ifndef TRMMKERNEL
  1209. FMADD f16, f30, f0, f16
  1210. FNMSUB f17, f30, f1, f17
  1211. FMADD f18, f30, f2, f18
  1212. FNMSUB f19, f30, f3, f19
  1213. FMADD f16, f31, f1, f16
  1214. FMADD f17, f31, f0, f17
  1215. FMADD f18, f31, f3, f18
  1216. FMADD f19, f31, f2, f19
  1217. #else
  1218. FMUL f16, f30, f0
  1219. FMUL f17, f30, f1
  1220. FMUL f18, f30, f2
  1221. FMUL f19, f30, f3
  1222. FMADD f16, f31, f1, f16
  1223. FNMADD f17, f31, f0, f17
  1224. FMADD f18, f31, f3, f18
  1225. FNMADD f19, f31, f2, f19
  1226. #endif
  1227. #endif
  1228. STFD f16, 0 * SIZE(CO1)
  1229. STFD f17, 1 * SIZE(CO1)
  1230. STFD f18, 2 * SIZE(CO1)
  1231. STFD f19, 3 * SIZE(CO1)
  1232. addi CO1, CO1, 4 * SIZE
  1233. #ifdef TRMMKERNEL
  1234. #if ( defined(LEFT) && defined(TRANSA)) || \
  1235. (!defined(LEFT) && !defined(TRANSA))
  1236. sub TEMP, K, KK
  1237. #ifdef LEFT
  1238. addi TEMP, TEMP, -2
  1239. #else
  1240. addi TEMP, TEMP, -1
  1241. #endif
  1242. slwi r0, TEMP, 1 + ZBASE_SHIFT
  1243. slwi TEMP, TEMP, 0 + ZBASE_SHIFT
  1244. add AO, AO, r0
  1245. add BO, BO, TEMP
  1246. #endif
  1247. #ifdef LEFT
  1248. addi KK, KK, 2
  1249. #endif
  1250. #endif
  1251. addic. I, I, -1
  1252. bgt LL(31)
  1253. .align 4
  1254. LL(40):
  1255. andi. I, M, 1
  1256. ble LL(999)
  1257. #ifndef TRMMKERNEL
  1258. LFD f16, 0 * SIZE(AO)
  1259. LFD f17, 1 * SIZE(AO)
  1260. LFD f18, 2 * SIZE(AO)
  1261. LFD f19, 3 * SIZE(AO)
  1262. LFD f20, 0 * SIZE(B)
  1263. LFD f21, 1 * SIZE(B)
  1264. LFD f22, 2 * SIZE(B)
  1265. LFD f23, 3 * SIZE(B)
  1266. lfs f0, FZERO
  1267. fmr f1, f0
  1268. fmr f2, f0
  1269. fmr f3, f0
  1270. fmr f4, f0
  1271. fmr f5, f0
  1272. fmr f6, f0
  1273. fmr f7, f0
  1274. srawi. r0, K, 2
  1275. mr BO, B
  1276. mtspr CTR, r0
  1277. ble LL(45)
  1278. #else
  1279. #if (defined(TRMMKERNEL) && defined(LEFT) && defined(TRANSA)) || \
  1280. (defined(TRMMKERNEL) && !defined(LEFT) && !defined(TRANSA))
  1281. LFD f16, 0 * SIZE(AO)
  1282. LFD f17, 1 * SIZE(AO)
  1283. LFD f18, 2 * SIZE(AO)
  1284. LFD f19, 3 * SIZE(AO)
  1285. LFD f20, 0 * SIZE(B)
  1286. LFD f21, 1 * SIZE(B)
  1287. LFD f22, 2 * SIZE(B)
  1288. LFD f23, 3 * SIZE(B)
  1289. lfs f0, FZERO
  1290. fmr f1, f0
  1291. fmr f2, f0
  1292. fmr f3, f0
  1293. fmr f4, f0
  1294. fmr f5, f0
  1295. fmr f6, f0
  1296. fmr f7, f0
  1297. mr BO, B
  1298. #else
  1299. slwi r0, KK, 0 + ZBASE_SHIFT
  1300. slwi TEMP, KK, 0 + ZBASE_SHIFT
  1301. add AO, AO, r0
  1302. add BO, B, TEMP
  1303. LFD f16, 0 * SIZE(AO)
  1304. LFD f17, 1 * SIZE(AO)
  1305. LFD f18, 2 * SIZE(AO)
  1306. LFD f19, 3 * SIZE(AO)
  1307. LFD f20, 0 * SIZE(BO)
  1308. LFD f21, 1 * SIZE(BO)
  1309. LFD f22, 2 * SIZE(BO)
  1310. LFD f23, 3 * SIZE(BO)
  1311. lfs f0, FZERO
  1312. fmr f1, f0
  1313. fmr f2, f0
  1314. fmr f3, f0
  1315. fmr f4, f0
  1316. fmr f5, f0
  1317. fmr f6, f0
  1318. fmr f7, f0
  1319. #endif
  1320. #if (defined(LEFT) && !defined(TRANSA)) || (!defined(LEFT) && defined(TRANSA))
  1321. sub TEMP, K, KK
  1322. #elif defined(LEFT)
  1323. addi TEMP, KK, 1
  1324. #else
  1325. addi TEMP, KK, 1
  1326. #endif
  1327. srawi. TEMP, TEMP, 2
  1328. mtspr CTR, TEMP
  1329. ble LL(45)
  1330. #endif
  1331. .align 4
  1332. LL(42):
  1333. fmadd f0, f16, f20, f0
  1334. fmadd f1, f17, f21, f1
  1335. fmadd f2, f17, f20, f2
  1336. fmadd f3, f16, f21, f3
  1337. LFD f16, 4 * SIZE(AO)
  1338. LFD f17, 5 * SIZE(AO)
  1339. LFD f20, 4 * SIZE(BO)
  1340. LFD f21, 5 * SIZE(BO)
  1341. fmadd f4, f18, f22, f4
  1342. fmadd f5, f19, f23, f5
  1343. fmadd f6, f19, f22, f6
  1344. fmadd f7, f18, f23, f7
  1345. LFD f18, 6 * SIZE(AO)
  1346. LFD f19, 7 * SIZE(AO)
  1347. LFD f22, 6 * SIZE(BO)
  1348. LFD f23, 7 * SIZE(BO)
  1349. fmadd f0, f16, f20, f0
  1350. fmadd f1, f17, f21, f1
  1351. fmadd f2, f17, f20, f2
  1352. fmadd f3, f16, f21, f3
  1353. LFD f16, 8 * SIZE(AO)
  1354. LFD f17, 9 * SIZE(AO)
  1355. LFD f20, 8 * SIZE(BO)
  1356. LFD f21, 9 * SIZE(BO)
  1357. fmadd f4, f18, f22, f4
  1358. fmadd f5, f19, f23, f5
  1359. fmadd f6, f19, f22, f6
  1360. fmadd f7, f18, f23, f7
  1361. LFD f18, 10 * SIZE(AO)
  1362. LFD f19, 11 * SIZE(AO)
  1363. LFD f22, 10 * SIZE(BO)
  1364. LFD f23, 11 * SIZE(BO)
  1365. addi AO, AO, 8 * SIZE
  1366. addi BO, BO, 8 * SIZE
  1367. bdnz LL(42)
  1368. .align 4
  1369. LL(45):
  1370. fadd f0, f0, f4
  1371. fadd f1, f1, f5
  1372. fadd f2, f2, f6
  1373. fadd f3, f3, f7
  1374. #ifndef TRMMKERNEL
  1375. andi. r0, K, 3
  1376. lfd f30, ALPHA_R
  1377. lfd f31, ALPHA_I
  1378. mtspr CTR,r0
  1379. ble LL(47)
  1380. #else
  1381. #if (defined(LEFT) && !defined(TRANSA)) || (!defined(LEFT) && defined(TRANSA))
  1382. sub TEMP, K, KK
  1383. #elif defined(LEFT)
  1384. addi TEMP, KK, 1
  1385. #else
  1386. addi TEMP, KK, 1
  1387. #endif
  1388. andi. TEMP, TEMP, 3
  1389. lfd f30, ALPHA_R
  1390. lfd f31, ALPHA_I
  1391. mtspr CTR,TEMP
  1392. ble LL(47)
  1393. #endif
  1394. .align 4
  1395. LL(46):
  1396. fmadd f0, f16, f20, f0
  1397. fmadd f1, f17, f21, f1
  1398. fmadd f2, f17, f20, f2
  1399. fmadd f3, f16, f21, f3
  1400. LFD f16, 2 * SIZE(AO)
  1401. LFD f17, 3 * SIZE(AO)
  1402. LFD f20, 2 * SIZE(BO)
  1403. LFD f21, 3 * SIZE(BO)
  1404. addi AO, AO, 2 * SIZE
  1405. addi BO, BO, 2 * SIZE
  1406. bdnz LL(46)
  1407. .align 4
  1408. LL(47):
  1409. #if defined(NN) || defined(NT) || defined(TN) || defined(TT) || \
  1410. defined(CC) || defined(CR) || defined(RC) || defined(RR)
  1411. fsub f0, f0, f1
  1412. fadd f2, f2, f3
  1413. #elif defined(CN) || defined(CT) || defined(RN) || defined(RT)
  1414. fadd f0, f0, f1
  1415. fsub f2, f2, f3
  1416. #else
  1417. fadd f0, f0, f1
  1418. fsub f2, f3, f2
  1419. #endif
  1420. #ifndef TRMMKERNEL
  1421. LFD f16, 0 * SIZE(CO1)
  1422. LFD f17, 1 * SIZE(CO1)
  1423. #endif
  1424. #if defined(NN) || defined(NT) || defined(TN) || defined(TT)
  1425. #ifndef TRMMKERNEL
  1426. FMADD f16, f30, f0, f16
  1427. FMADD f17, f30, f2, f17
  1428. #else
  1429. FMUL f16, f30, f0
  1430. FMUL f17, f30, f2
  1431. #endif
  1432. FNMSUB f16, f31, f2, f16
  1433. FMADD f17, f31, f0, f17
  1434. #else /* defined(CN)||defined(CT)||defined(NC)||defined(TC)||defined(CC) */
  1435. /* defined(RN)||defined(RT)||defined(NR)||defined(TR)||defined(CR) */
  1436. /* defined(RC) || defined(RR) */
  1437. #ifndef TRMMKERNEL
  1438. FMADD f16, f30, f0, f16
  1439. FNMSUB f17, f30, f2, f17
  1440. FMADD f16, f31, f2, f16
  1441. FMADD f17, f31, f0, f17
  1442. #else
  1443. FMUL f16, f30, f0
  1444. FMUL f17, f30, f2
  1445. FMADD f16, f31, f2, f16
  1446. FNMADD f17, f31, f0, f17
  1447. #endif
  1448. #endif
  1449. STFD f16, 0 * SIZE(CO1)
  1450. STFD f17, 1 * SIZE(CO1)
  1451. .align 4
  1452. LL(999):
  1453. addi r3, 0, 0
  1454. lfd f14, 0(SP)
  1455. lfd f15, 8(SP)
  1456. lfd f16, 16(SP)
  1457. lfd f17, 24(SP)
  1458. lfd f18, 32(SP)
  1459. lfd f19, 40(SP)
  1460. lfd f20, 48(SP)
  1461. lfd f21, 56(SP)
  1462. lfd f22, 64(SP)
  1463. lfd f23, 72(SP)
  1464. lfd f24, 80(SP)
  1465. lfd f25, 88(SP)
  1466. lfd f26, 96(SP)
  1467. lfd f27, 104(SP)
  1468. lfd f28, 112(SP)
  1469. lfd f29, 120(SP)
  1470. lfd f30, 128(SP)
  1471. lfd f31, 136(SP)
  1472. #ifdef __64BIT__
  1473. ld r31, 144(SP)
  1474. ld r30, 152(SP)
  1475. ld r29, 160(SP)
  1476. ld r28, 168(SP)
  1477. ld r27, 176(SP)
  1478. ld r26, 184(SP)
  1479. ld r25, 192(SP)
  1480. ld r24, 200(SP)
  1481. #ifdef TRMMKERNEL
  1482. ld r23, 208(SP)
  1483. ld r22, 216(SP)
  1484. #endif
  1485. #else
  1486. lwz r31, 144(SP)
  1487. lwz r30, 148(SP)
  1488. lwz r29, 152(SP)
  1489. lwz r28, 156(SP)
  1490. lwz r27, 160(SP)
  1491. lwz r26, 164(SP)
  1492. lwz r25, 168(SP)
  1493. lwz r24, 172(SP)
  1494. #ifdef TRMMKERNEL
  1495. lwz r23, 176(SP)
  1496. lwz r22, 180(SP)
  1497. #endif
  1498. #endif
  1499. addi SP, SP, STACKSIZE
  1500. blr
  1501. EPILOGUE
  1502. #endif