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zgemm_kernel.S 35 kB

rebase? (#1) * With the Intel compiler on Linux, prefer ifort for the final link step icc has known problems with mixed-language builds that ifort can handle just fine. Fixes #1956 * Rename operands to put lda on the input/output constraint list * Fix wrong constraints in inline assembly for #2009 * Fix inline assembly constraints rework indices to allow marking argument lda4 as input and output. For #2009 * Fix inline assembly constraints rework indices to allow marking argument lda as input and output. * Fix inline assembly constraints * Fix inline assembly constraints * Fix inline assembly constraints in Bulldozer TRSM kernels rework indices to allow marking i,as and bs as both input and output (marked operand n1 as well for simplicity). For #2009 * Correct range_n limiting same bug as seen in #1388, somehow missed in corresponding PR #1389 * Allow multithreading TRMV again revert workaround introduced for issue #1332 as the actual cause appears to be my incorrect fix from #1262 (see #1388) * Fix error introduced during cleanup * Reduce list of kernels in the dynamic arch build to make compilation complete reliably within the 1h limit again * init * move fix to right place * Fix missing -c option in AVX512 test * Fix AVX512 test always returning false due to missing compiler option * Make x86_32 imply NO_AVX2, NO_AVX512 in addition to NO_AVX fixes #2033 * Keep xcode8.3 for osx BINARY=32 build as xcode10 deprecated i386 * Make sure that AVX512 is disabled in 32bit builds for #2033 * Improve handling of NO_STATIC and NO_SHARED to avoid surprises from defining either as zero. Fixes #2035 by addressing some concerns from #1422 * init * address warning introed with #1814 et al * Restore locking optimizations for OpenMP case restore another accidentally dropped part of #1468 that was missed in #2004 to address performance regression reported in #1461 * HiSilicon tsv110 CPUs optimization branch add HiSilicon tsv110 CPUs optimization branch * add TARGET support for HiSilicon tsv110 CPUs * add TARGET support for HiSilicon tsv110 CPUs * add TARGET support for HiSilicon tsv110 CPUs * Fix module definition conflicts between LAPACK and ReLAPACK for #2043 * Do not compile in AVX512 check if AVX support is disabled xgetbv is function depends on NO_AVX being undefined - we could change that too, but that combo is unlikely to work anyway * ctest.c : add __POWERPC__ for PowerMac * Fix crash in sgemm SSE/nano kernel on x86_64 Fix bug #2047. Signed-off-by: Celelibi <celelibi@gmail.com> * param.h : enable defines for PPC970 on DarwinOS fixes: gemm.c: In function 'sgemm_': ../common_param.h:981:18: error: 'SGEMM_DEFAULT_P' undeclared (first use in this function) #define SGEMM_P SGEMM_DEFAULT_P ^ * common_power.h: force DCBT_ARG 0 on PPC970 Darwin without this, we see ../kernel/power/gemv_n.S:427:Parameter syntax error and many more similar entries that relates to this assembly command dcbt 8, r24, r18 this change makes the DCBT_ARG = 0 and openblas builds through to completion on PowerMac 970 Tests pass * Make TARGET=GENERIC compatible with DYNAMIC_ARCH=1 for issue #2048 * make DYNAMIC_ARCH=1 package work on TSV110. * make DYNAMIC_ARCH=1 package work on TSV110 * Add Intel Denverton for #2048 * Add Intel Denverton * Change 64-bit detection as explained in #2056 * Trivial typo fix as suggested in #2022 * Disable the AVX512 DGEMM kernel (again) Due to as yet unresolved errors seen in #1955 and #2029 * Use POSIX getenv on Cygwin The Windows-native GetEnvironmentVariable cannot be relied on, as Cygwin does not always copy environment variables set through Cygwin to the Windows environment block, particularly after fork(). * Fix for #2063: The DllMain used in Cygwin did not run the thread memory pool cleanup upon THREAD_DETACH which is needed when compiled with USE_TLS=1. * Also call CloseHandle on each thread, as well as on the event so as to not leak thread handles. * AIX asm syntax changes needed for shared object creation * power9 makefile. dgemm based on power8 kernel with following changes : 32x unrolled 16x4 kernel and 8x4 kernel using (lxv stxv butterfly rank1 update). improvement from 17 to 22-23gflops. dtrmm cases were added into dgemm itself * Expose CBLAS interfaces for I?MIN and I?MAX * Build CBLAS interfaces for I?MIN and I?MAX * Add declarations for ?sum and cblas_?sum * Add interface for ?sum (derived from ?asum) * Add ?sum * Add implementations of ssum/dsum and csum/zsum as trivial copies of asum/zsasum with the fabs calls replaced by fmov to preserve code structure * Add ARM implementations of ?sum (trivial copies of the respective ?asum with the fabs calls removed) * Add ARM64 implementations of ?sum as trivial copies of the respective ?asum kernels with the fabs calls removed * Add ia64 implementation of ?sum as trivial copy of asum with the fabs calls removed * Add MIPS implementation of ?sum as trivial copy of ?asum with the fabs calls removed * Add MIPS64 implementation of ?sum as trivial copy of ?asum with the fabs replaced by mov to preserve code structure * Add POWER implementation of ?sum as trivial copy of ?asum with the fabs replaced by fmr to preserve code structure * Add SPARC implementation of ?sum as trivial copy of ?asum with the fabs replaced by fmov to preserve code structure * Add x86 implementation of ?sum as trivial copy of ?asum with the fabs calls removed * Add x86_64 implementation of ?sum as trivial copy of ?asum with the fabs calls removed * Add ZARCH implementation of ?sum as trivial copies of the respective ?asum kernels with the ABS and vflpsb calls removed * Detect 32bit environment on 64bit ARM hardware for #2056, using same approach as #2058 * Add cmake defaults for ?sum kernels * Add ?sum * Add ?sum definitions for generic kernel * Add declarations for ?sum * Add -lm and disable EXPRECISION support on *BSD fixes #2075 * Add in runtime CPU detection for POWER. * snprintf define consolidated to common.h * Support INTERFACE64=1 * Add support for INTERFACE64 and fix XERBLA calls 1. Replaced all instances of "int" with "blasint" 2. Added string length as "hidden" third parameter in calls to fortran XERBLA * Correct length of name string in xerbla call * Avoid out-of-bounds accesses in LAPACK EIG tests see https://github.com/Reference-LAPACK/lapack/issues/333 * Correct INFO=4 condition * Disable reallocation of work array in xSYTRF as it appears to cause memory management problems (seen in the LAPACK tests) * Disable repeated recursion on Ab_BR in ReLAPACK xGBTRF due to crashes in LAPACK tests * sgemm/strmm * Update Changelog with changes from 0.3.6 * Increment version to 0.3.7.dev * Increment version to 0.3.7.dev * Misc. typo fixes Found via `codespell -q 3 -w -L ith,als,dum,nd,amin,nto,wis,ba -S ./relapack,./kernel,./lapack-netlib` * Correct argument of CPU_ISSET for glibc <2.5 fixes #2104 * conflict resolve * Revert reference/ fixes * Revert Changelog.txt typos * Disable the SkyLakeX DGEMMITCOPY kernel as well as a stopgap measure for https://github.com/numpy/numpy/issues/13401 as mentioned in #1955 * Disable DGEMMINCOPY as well for now #1955 * init * Fix errors in cpu enumeration with glibc 2.6 for #2114 * Change two http links to https Closes #2109 * remove redundant code #2113 * Set up CI with Azure Pipelines [skip ci] * TST: add native POWER8 to CI * add native POWER8 testing to Travis CI matrix with ppc64le os entry * Update link to IBM MASS library, update cpu support status * first try migrating one of the arm builds from travis * fix tabbing in azure commands * Update azure-pipelines.yml take out offending lines (although stolen from https://github.com/conda-forge/opencv-feedstock azure-pipelines fiie) * Update azure-pipelines.yml * Update azure-pipelines.yml * Update azure-pipelines.yml * Update azure-pipelines.yml * DOC: Add Azure CI status badge * Add ARMV6 build to azure CI setup (#2122) using aytekinar's Alpine image and docker script from the Travis setup [skip ci] * TST: Azure manylinux1 & clean-up * remove some of the steps & comments from the original Azure yml template * modify the trigger section to use develop since OpenBLAS primarily uses this branch; use the same batching behavior as downstream projects NumPy/ SciPy * remove Travis emulated ARMv6 gcc build because this now happens in Azure * use documented Ubuntu vmImage name for Azure and add in a manylinux1 test run to the matrix [skip appveyor] * Add NO_AFFINITY to available options on Linux, and set it to ON to match the gmake default. Fixes second part of #2114 * Replace ISMIN and ISAMIN kernels on all x86_64 platforms (#2125) * Mark iamax_sse.S as unsuitable for MIN due to issue #2116 * Use iamax.S rather than iamax_sse.S for ISMIN/ISAMIN on all x86_64 as workaround for #2116 * Move ARMv8 gcc build from Travis to Azure * Move ARMv8 gcc build from Travis to Azure * Update .travis.yml * Test drone CI * install make * remove sudo * Install gcc * Install perl * Install gfortran and add a clang job * gfortran->gcc-gfortran * Switch to ubuntu and parallel jobs * apt update * Fix typo * update yes * no need of gcc in clang build * Add a cmake build as well * Add cmake builds and print options * build without lapack on cmake * parallel build * See if ubuntu 19.04 fixes the ICE * Remove qemu armv8 builds * arm32 build * Fix typo * TST: add SkylakeX AVX512 CI test * adapt the C-level reproducer code for some recent SkylakeX AVX512 kernel issues, provided by Isuru Fernando and modified by Martin Kroeker, for usage in the utest suite * add an Intel SDE SkylakeX emulation utest run to the Azure CI matrix; a custom Docker build was required because Ubuntu image provided by Azure does not support AVX512VL instructions * Add option USE_LOCKING for single-threaded build with locking support for calling from concurrent threads * Add option USE_LOCKING for single-threaded build with locking support * Add option USE_LOCKING for SMP-like locking in USE_THREAD=0 builds * Add option USE_LOCKING but keep default settings intact * Remove unrelated change * Do not try ancient PGI hacks with recent versions of that compiler should fix #2139 * Build and run utests in any case, they do their own checks for fortran availability * Add softfp support in min/max kernels fix for #1912 * Revert "Add softfp support in min/max kernels" * Separate implementations of AMAX and IAMAX on arm As noted in #1912 and comment on #1942, the combined implementation happens to "do the right thing" on hardfp, but cannot return both value and index on softfp where they would have to share the return register * Ensure correct output for DAMAX with softfp * Use generic kernels for complex (I)AMAX to support softfp * improved zgemm power9 based on power8 * upload thread safety test folder * hook up c++ thread safety test (main Makefile) * add c++ thread test option to Makefile.rule * Document NO_AVX512 for #2151 * sgemm pipeline improved, zgemm rewritten without inner packs, ABI lxvx v20 fixed with vs52 * Fix detection of AVX512 capable compilers in getarch 21eda8b5 introduced a check in getarch.c to test if the compiler is capable of AVX512. This check currently fails, since the used __AVX2__ macro is only defined if getarch itself was compiled with AVX2/AVX512 support. Make sure this is the case by building getarch with -march=native on x86_64. It is only supposed to run on the build host anyway. * c_check: Unlink correct file * power9 zgemm ztrmm optimized * conflict resolve * Add gfortran workaround for ABI violations in LAPACKE for #2154 (see gcc bug 90329) * Add gfortran workaround for ABI violations for #2154 (see gcc bug 90329) * Add gfortran workaround for potential ABI violation for #2154 * Update fc.cmake * Remove any inadvertent use of -march=native from DYNAMIC_ARCH builds from #2143, -march=native precludes use of more specific options like -march=skylake-avx512 in individual kernels, and defeats the purpose of dynamic arch anyway. * Avoid unintentional activation of TLS code via USE_TLS=0 fixes #2149 * Do not force gcc options on non-gcc compilers fixes compile failure with pgi 18.10 as reported on OpenBLAS-users * Update Makefile.x86_64 * Zero ecx with a mov instruction PGI assembler does not like the initialization in the constraints. * Fix mov syntax * new sgemm 8x16 * Update dtrmm_kernel_16x4_power8.S * PGI compiler does not like -march=native * Fix build on FreeBSD/powerpc64. Signed-off-by: Piotr Kubaj <pkubaj@anongoth.pl> * Fix build for PPC970 on FreeBSD pt. 1 FreeBSD needs DCBT_ARG=0 as well. * Fix build for PPC970 on FreeBSD pt.2 FreeBSD needs those macros too. * cgemm/ctrmm power9 * Utest needs CBLAS but not necessarily FORTRAN * Add mingw builds to Appveyor config * Add getarch flags to disable AVX on x86 (and other small fixes to match Makefile behaviour) * Make disabling DYNAMIC_ARCH on unsupported systems work needs to be unset in the cache for the change to have any effect * Mingw32 needs leading underscore on object names (also copy BUNDERSCORE settings for FORTRAN from the corresponding Makefile)
6 years ago
rebase? (#1) * With the Intel compiler on Linux, prefer ifort for the final link step icc has known problems with mixed-language builds that ifort can handle just fine. Fixes #1956 * Rename operands to put lda on the input/output constraint list * Fix wrong constraints in inline assembly for #2009 * Fix inline assembly constraints rework indices to allow marking argument lda4 as input and output. For #2009 * Fix inline assembly constraints rework indices to allow marking argument lda as input and output. * Fix inline assembly constraints * Fix inline assembly constraints * Fix inline assembly constraints in Bulldozer TRSM kernels rework indices to allow marking i,as and bs as both input and output (marked operand n1 as well for simplicity). For #2009 * Correct range_n limiting same bug as seen in #1388, somehow missed in corresponding PR #1389 * Allow multithreading TRMV again revert workaround introduced for issue #1332 as the actual cause appears to be my incorrect fix from #1262 (see #1388) * Fix error introduced during cleanup * Reduce list of kernels in the dynamic arch build to make compilation complete reliably within the 1h limit again * init * move fix to right place * Fix missing -c option in AVX512 test * Fix AVX512 test always returning false due to missing compiler option * Make x86_32 imply NO_AVX2, NO_AVX512 in addition to NO_AVX fixes #2033 * Keep xcode8.3 for osx BINARY=32 build as xcode10 deprecated i386 * Make sure that AVX512 is disabled in 32bit builds for #2033 * Improve handling of NO_STATIC and NO_SHARED to avoid surprises from defining either as zero. Fixes #2035 by addressing some concerns from #1422 * init * address warning introed with #1814 et al * Restore locking optimizations for OpenMP case restore another accidentally dropped part of #1468 that was missed in #2004 to address performance regression reported in #1461 * HiSilicon tsv110 CPUs optimization branch add HiSilicon tsv110 CPUs optimization branch * add TARGET support for HiSilicon tsv110 CPUs * add TARGET support for HiSilicon tsv110 CPUs * add TARGET support for HiSilicon tsv110 CPUs * Fix module definition conflicts between LAPACK and ReLAPACK for #2043 * Do not compile in AVX512 check if AVX support is disabled xgetbv is function depends on NO_AVX being undefined - we could change that too, but that combo is unlikely to work anyway * ctest.c : add __POWERPC__ for PowerMac * Fix crash in sgemm SSE/nano kernel on x86_64 Fix bug #2047. Signed-off-by: Celelibi <celelibi@gmail.com> * param.h : enable defines for PPC970 on DarwinOS fixes: gemm.c: In function 'sgemm_': ../common_param.h:981:18: error: 'SGEMM_DEFAULT_P' undeclared (first use in this function) #define SGEMM_P SGEMM_DEFAULT_P ^ * common_power.h: force DCBT_ARG 0 on PPC970 Darwin without this, we see ../kernel/power/gemv_n.S:427:Parameter syntax error and many more similar entries that relates to this assembly command dcbt 8, r24, r18 this change makes the DCBT_ARG = 0 and openblas builds through to completion on PowerMac 970 Tests pass * Make TARGET=GENERIC compatible with DYNAMIC_ARCH=1 for issue #2048 * make DYNAMIC_ARCH=1 package work on TSV110. * make DYNAMIC_ARCH=1 package work on TSV110 * Add Intel Denverton for #2048 * Add Intel Denverton * Change 64-bit detection as explained in #2056 * Trivial typo fix as suggested in #2022 * Disable the AVX512 DGEMM kernel (again) Due to as yet unresolved errors seen in #1955 and #2029 * Use POSIX getenv on Cygwin The Windows-native GetEnvironmentVariable cannot be relied on, as Cygwin does not always copy environment variables set through Cygwin to the Windows environment block, particularly after fork(). * Fix for #2063: The DllMain used in Cygwin did not run the thread memory pool cleanup upon THREAD_DETACH which is needed when compiled with USE_TLS=1. * Also call CloseHandle on each thread, as well as on the event so as to not leak thread handles. * AIX asm syntax changes needed for shared object creation * power9 makefile. dgemm based on power8 kernel with following changes : 32x unrolled 16x4 kernel and 8x4 kernel using (lxv stxv butterfly rank1 update). improvement from 17 to 22-23gflops. dtrmm cases were added into dgemm itself * Expose CBLAS interfaces for I?MIN and I?MAX * Build CBLAS interfaces for I?MIN and I?MAX * Add declarations for ?sum and cblas_?sum * Add interface for ?sum (derived from ?asum) * Add ?sum * Add implementations of ssum/dsum and csum/zsum as trivial copies of asum/zsasum with the fabs calls replaced by fmov to preserve code structure * Add ARM implementations of ?sum (trivial copies of the respective ?asum with the fabs calls removed) * Add ARM64 implementations of ?sum as trivial copies of the respective ?asum kernels with the fabs calls removed * Add ia64 implementation of ?sum as trivial copy of asum with the fabs calls removed * Add MIPS implementation of ?sum as trivial copy of ?asum with the fabs calls removed * Add MIPS64 implementation of ?sum as trivial copy of ?asum with the fabs replaced by mov to preserve code structure * Add POWER implementation of ?sum as trivial copy of ?asum with the fabs replaced by fmr to preserve code structure * Add SPARC implementation of ?sum as trivial copy of ?asum with the fabs replaced by fmov to preserve code structure * Add x86 implementation of ?sum as trivial copy of ?asum with the fabs calls removed * Add x86_64 implementation of ?sum as trivial copy of ?asum with the fabs calls removed * Add ZARCH implementation of ?sum as trivial copies of the respective ?asum kernels with the ABS and vflpsb calls removed * Detect 32bit environment on 64bit ARM hardware for #2056, using same approach as #2058 * Add cmake defaults for ?sum kernels * Add ?sum * Add ?sum definitions for generic kernel * Add declarations for ?sum * Add -lm and disable EXPRECISION support on *BSD fixes #2075 * Add in runtime CPU detection for POWER. * snprintf define consolidated to common.h * Support INTERFACE64=1 * Add support for INTERFACE64 and fix XERBLA calls 1. Replaced all instances of "int" with "blasint" 2. Added string length as "hidden" third parameter in calls to fortran XERBLA * Correct length of name string in xerbla call * Avoid out-of-bounds accesses in LAPACK EIG tests see https://github.com/Reference-LAPACK/lapack/issues/333 * Correct INFO=4 condition * Disable reallocation of work array in xSYTRF as it appears to cause memory management problems (seen in the LAPACK tests) * Disable repeated recursion on Ab_BR in ReLAPACK xGBTRF due to crashes in LAPACK tests * sgemm/strmm * Update Changelog with changes from 0.3.6 * Increment version to 0.3.7.dev * Increment version to 0.3.7.dev * Misc. typo fixes Found via `codespell -q 3 -w -L ith,als,dum,nd,amin,nto,wis,ba -S ./relapack,./kernel,./lapack-netlib` * Correct argument of CPU_ISSET for glibc <2.5 fixes #2104 * conflict resolve * Revert reference/ fixes * Revert Changelog.txt typos * Disable the SkyLakeX DGEMMITCOPY kernel as well as a stopgap measure for https://github.com/numpy/numpy/issues/13401 as mentioned in #1955 * Disable DGEMMINCOPY as well for now #1955 * init * Fix errors in cpu enumeration with glibc 2.6 for #2114 * Change two http links to https Closes #2109 * remove redundant code #2113 * Set up CI with Azure Pipelines [skip ci] * TST: add native POWER8 to CI * add native POWER8 testing to Travis CI matrix with ppc64le os entry * Update link to IBM MASS library, update cpu support status * first try migrating one of the arm builds from travis * fix tabbing in azure commands * Update azure-pipelines.yml take out offending lines (although stolen from https://github.com/conda-forge/opencv-feedstock azure-pipelines fiie) * Update azure-pipelines.yml * Update azure-pipelines.yml * Update azure-pipelines.yml * Update azure-pipelines.yml * DOC: Add Azure CI status badge * Add ARMV6 build to azure CI setup (#2122) using aytekinar's Alpine image and docker script from the Travis setup [skip ci] * TST: Azure manylinux1 & clean-up * remove some of the steps & comments from the original Azure yml template * modify the trigger section to use develop since OpenBLAS primarily uses this branch; use the same batching behavior as downstream projects NumPy/ SciPy * remove Travis emulated ARMv6 gcc build because this now happens in Azure * use documented Ubuntu vmImage name for Azure and add in a manylinux1 test run to the matrix [skip appveyor] * Add NO_AFFINITY to available options on Linux, and set it to ON to match the gmake default. Fixes second part of #2114 * Replace ISMIN and ISAMIN kernels on all x86_64 platforms (#2125) * Mark iamax_sse.S as unsuitable for MIN due to issue #2116 * Use iamax.S rather than iamax_sse.S for ISMIN/ISAMIN on all x86_64 as workaround for #2116 * Move ARMv8 gcc build from Travis to Azure * Move ARMv8 gcc build from Travis to Azure * Update .travis.yml * Test drone CI * install make * remove sudo * Install gcc * Install perl * Install gfortran and add a clang job * gfortran->gcc-gfortran * Switch to ubuntu and parallel jobs * apt update * Fix typo * update yes * no need of gcc in clang build * Add a cmake build as well * Add cmake builds and print options * build without lapack on cmake * parallel build * See if ubuntu 19.04 fixes the ICE * Remove qemu armv8 builds * arm32 build * Fix typo * TST: add SkylakeX AVX512 CI test * adapt the C-level reproducer code for some recent SkylakeX AVX512 kernel issues, provided by Isuru Fernando and modified by Martin Kroeker, for usage in the utest suite * add an Intel SDE SkylakeX emulation utest run to the Azure CI matrix; a custom Docker build was required because Ubuntu image provided by Azure does not support AVX512VL instructions * Add option USE_LOCKING for single-threaded build with locking support for calling from concurrent threads * Add option USE_LOCKING for single-threaded build with locking support * Add option USE_LOCKING for SMP-like locking in USE_THREAD=0 builds * Add option USE_LOCKING but keep default settings intact * Remove unrelated change * Do not try ancient PGI hacks with recent versions of that compiler should fix #2139 * Build and run utests in any case, they do their own checks for fortran availability * Add softfp support in min/max kernels fix for #1912 * Revert "Add softfp support in min/max kernels" * Separate implementations of AMAX and IAMAX on arm As noted in #1912 and comment on #1942, the combined implementation happens to "do the right thing" on hardfp, but cannot return both value and index on softfp where they would have to share the return register * Ensure correct output for DAMAX with softfp * Use generic kernels for complex (I)AMAX to support softfp * improved zgemm power9 based on power8 * upload thread safety test folder * hook up c++ thread safety test (main Makefile) * add c++ thread test option to Makefile.rule * Document NO_AVX512 for #2151 * sgemm pipeline improved, zgemm rewritten without inner packs, ABI lxvx v20 fixed with vs52 * Fix detection of AVX512 capable compilers in getarch 21eda8b5 introduced a check in getarch.c to test if the compiler is capable of AVX512. This check currently fails, since the used __AVX2__ macro is only defined if getarch itself was compiled with AVX2/AVX512 support. Make sure this is the case by building getarch with -march=native on x86_64. It is only supposed to run on the build host anyway. * c_check: Unlink correct file * power9 zgemm ztrmm optimized * conflict resolve * Add gfortran workaround for ABI violations in LAPACKE for #2154 (see gcc bug 90329) * Add gfortran workaround for ABI violations for #2154 (see gcc bug 90329) * Add gfortran workaround for potential ABI violation for #2154 * Update fc.cmake * Remove any inadvertent use of -march=native from DYNAMIC_ARCH builds from #2143, -march=native precludes use of more specific options like -march=skylake-avx512 in individual kernels, and defeats the purpose of dynamic arch anyway. * Avoid unintentional activation of TLS code via USE_TLS=0 fixes #2149 * Do not force gcc options on non-gcc compilers fixes compile failure with pgi 18.10 as reported on OpenBLAS-users * Update Makefile.x86_64 * Zero ecx with a mov instruction PGI assembler does not like the initialization in the constraints. * Fix mov syntax * new sgemm 8x16 * Update dtrmm_kernel_16x4_power8.S * PGI compiler does not like -march=native * Fix build on FreeBSD/powerpc64. Signed-off-by: Piotr Kubaj <pkubaj@anongoth.pl> * Fix build for PPC970 on FreeBSD pt. 1 FreeBSD needs DCBT_ARG=0 as well. * Fix build for PPC970 on FreeBSD pt.2 FreeBSD needs those macros too. * cgemm/ctrmm power9 * Utest needs CBLAS but not necessarily FORTRAN * Add mingw builds to Appveyor config * Add getarch flags to disable AVX on x86 (and other small fixes to match Makefile behaviour) * Make disabling DYNAMIC_ARCH on unsupported systems work needs to be unset in the cache for the change to have any effect * Mingw32 needs leading underscore on object names (also copy BUNDERSCORE settings for FORTRAN from the corresponding Makefile)
6 years ago
rebase? (#1) * With the Intel compiler on Linux, prefer ifort for the final link step icc has known problems with mixed-language builds that ifort can handle just fine. Fixes #1956 * Rename operands to put lda on the input/output constraint list * Fix wrong constraints in inline assembly for #2009 * Fix inline assembly constraints rework indices to allow marking argument lda4 as input and output. For #2009 * Fix inline assembly constraints rework indices to allow marking argument lda as input and output. * Fix inline assembly constraints * Fix inline assembly constraints * Fix inline assembly constraints in Bulldozer TRSM kernels rework indices to allow marking i,as and bs as both input and output (marked operand n1 as well for simplicity). For #2009 * Correct range_n limiting same bug as seen in #1388, somehow missed in corresponding PR #1389 * Allow multithreading TRMV again revert workaround introduced for issue #1332 as the actual cause appears to be my incorrect fix from #1262 (see #1388) * Fix error introduced during cleanup * Reduce list of kernels in the dynamic arch build to make compilation complete reliably within the 1h limit again * init * move fix to right place * Fix missing -c option in AVX512 test * Fix AVX512 test always returning false due to missing compiler option * Make x86_32 imply NO_AVX2, NO_AVX512 in addition to NO_AVX fixes #2033 * Keep xcode8.3 for osx BINARY=32 build as xcode10 deprecated i386 * Make sure that AVX512 is disabled in 32bit builds for #2033 * Improve handling of NO_STATIC and NO_SHARED to avoid surprises from defining either as zero. Fixes #2035 by addressing some concerns from #1422 * init * address warning introed with #1814 et al * Restore locking optimizations for OpenMP case restore another accidentally dropped part of #1468 that was missed in #2004 to address performance regression reported in #1461 * HiSilicon tsv110 CPUs optimization branch add HiSilicon tsv110 CPUs optimization branch * add TARGET support for HiSilicon tsv110 CPUs * add TARGET support for HiSilicon tsv110 CPUs * add TARGET support for HiSilicon tsv110 CPUs * Fix module definition conflicts between LAPACK and ReLAPACK for #2043 * Do not compile in AVX512 check if AVX support is disabled xgetbv is function depends on NO_AVX being undefined - we could change that too, but that combo is unlikely to work anyway * ctest.c : add __POWERPC__ for PowerMac * Fix crash in sgemm SSE/nano kernel on x86_64 Fix bug #2047. Signed-off-by: Celelibi <celelibi@gmail.com> * param.h : enable defines for PPC970 on DarwinOS fixes: gemm.c: In function 'sgemm_': ../common_param.h:981:18: error: 'SGEMM_DEFAULT_P' undeclared (first use in this function) #define SGEMM_P SGEMM_DEFAULT_P ^ * common_power.h: force DCBT_ARG 0 on PPC970 Darwin without this, we see ../kernel/power/gemv_n.S:427:Parameter syntax error and many more similar entries that relates to this assembly command dcbt 8, r24, r18 this change makes the DCBT_ARG = 0 and openblas builds through to completion on PowerMac 970 Tests pass * Make TARGET=GENERIC compatible with DYNAMIC_ARCH=1 for issue #2048 * make DYNAMIC_ARCH=1 package work on TSV110. * make DYNAMIC_ARCH=1 package work on TSV110 * Add Intel Denverton for #2048 * Add Intel Denverton * Change 64-bit detection as explained in #2056 * Trivial typo fix as suggested in #2022 * Disable the AVX512 DGEMM kernel (again) Due to as yet unresolved errors seen in #1955 and #2029 * Use POSIX getenv on Cygwin The Windows-native GetEnvironmentVariable cannot be relied on, as Cygwin does not always copy environment variables set through Cygwin to the Windows environment block, particularly after fork(). * Fix for #2063: The DllMain used in Cygwin did not run the thread memory pool cleanup upon THREAD_DETACH which is needed when compiled with USE_TLS=1. * Also call CloseHandle on each thread, as well as on the event so as to not leak thread handles. * AIX asm syntax changes needed for shared object creation * power9 makefile. dgemm based on power8 kernel with following changes : 32x unrolled 16x4 kernel and 8x4 kernel using (lxv stxv butterfly rank1 update). improvement from 17 to 22-23gflops. dtrmm cases were added into dgemm itself * Expose CBLAS interfaces for I?MIN and I?MAX * Build CBLAS interfaces for I?MIN and I?MAX * Add declarations for ?sum and cblas_?sum * Add interface for ?sum (derived from ?asum) * Add ?sum * Add implementations of ssum/dsum and csum/zsum as trivial copies of asum/zsasum with the fabs calls replaced by fmov to preserve code structure * Add ARM implementations of ?sum (trivial copies of the respective ?asum with the fabs calls removed) * Add ARM64 implementations of ?sum as trivial copies of the respective ?asum kernels with the fabs calls removed * Add ia64 implementation of ?sum as trivial copy of asum with the fabs calls removed * Add MIPS implementation of ?sum as trivial copy of ?asum with the fabs calls removed * Add MIPS64 implementation of ?sum as trivial copy of ?asum with the fabs replaced by mov to preserve code structure * Add POWER implementation of ?sum as trivial copy of ?asum with the fabs replaced by fmr to preserve code structure * Add SPARC implementation of ?sum as trivial copy of ?asum with the fabs replaced by fmov to preserve code structure * Add x86 implementation of ?sum as trivial copy of ?asum with the fabs calls removed * Add x86_64 implementation of ?sum as trivial copy of ?asum with the fabs calls removed * Add ZARCH implementation of ?sum as trivial copies of the respective ?asum kernels with the ABS and vflpsb calls removed * Detect 32bit environment on 64bit ARM hardware for #2056, using same approach as #2058 * Add cmake defaults for ?sum kernels * Add ?sum * Add ?sum definitions for generic kernel * Add declarations for ?sum * Add -lm and disable EXPRECISION support on *BSD fixes #2075 * Add in runtime CPU detection for POWER. * snprintf define consolidated to common.h * Support INTERFACE64=1 * Add support for INTERFACE64 and fix XERBLA calls 1. Replaced all instances of "int" with "blasint" 2. Added string length as "hidden" third parameter in calls to fortran XERBLA * Correct length of name string in xerbla call * Avoid out-of-bounds accesses in LAPACK EIG tests see https://github.com/Reference-LAPACK/lapack/issues/333 * Correct INFO=4 condition * Disable reallocation of work array in xSYTRF as it appears to cause memory management problems (seen in the LAPACK tests) * Disable repeated recursion on Ab_BR in ReLAPACK xGBTRF due to crashes in LAPACK tests * sgemm/strmm * Update Changelog with changes from 0.3.6 * Increment version to 0.3.7.dev * Increment version to 0.3.7.dev * Misc. typo fixes Found via `codespell -q 3 -w -L ith,als,dum,nd,amin,nto,wis,ba -S ./relapack,./kernel,./lapack-netlib` * Correct argument of CPU_ISSET for glibc <2.5 fixes #2104 * conflict resolve * Revert reference/ fixes * Revert Changelog.txt typos * Disable the SkyLakeX DGEMMITCOPY kernel as well as a stopgap measure for https://github.com/numpy/numpy/issues/13401 as mentioned in #1955 * Disable DGEMMINCOPY as well for now #1955 * init * Fix errors in cpu enumeration with glibc 2.6 for #2114 * Change two http links to https Closes #2109 * remove redundant code #2113 * Set up CI with Azure Pipelines [skip ci] * TST: add native POWER8 to CI * add native POWER8 testing to Travis CI matrix with ppc64le os entry * Update link to IBM MASS library, update cpu support status * first try migrating one of the arm builds from travis * fix tabbing in azure commands * Update azure-pipelines.yml take out offending lines (although stolen from https://github.com/conda-forge/opencv-feedstock azure-pipelines fiie) * Update azure-pipelines.yml * Update azure-pipelines.yml * Update azure-pipelines.yml * Update azure-pipelines.yml * DOC: Add Azure CI status badge * Add ARMV6 build to azure CI setup (#2122) using aytekinar's Alpine image and docker script from the Travis setup [skip ci] * TST: Azure manylinux1 & clean-up * remove some of the steps & comments from the original Azure yml template * modify the trigger section to use develop since OpenBLAS primarily uses this branch; use the same batching behavior as downstream projects NumPy/ SciPy * remove Travis emulated ARMv6 gcc build because this now happens in Azure * use documented Ubuntu vmImage name for Azure and add in a manylinux1 test run to the matrix [skip appveyor] * Add NO_AFFINITY to available options on Linux, and set it to ON to match the gmake default. Fixes second part of #2114 * Replace ISMIN and ISAMIN kernels on all x86_64 platforms (#2125) * Mark iamax_sse.S as unsuitable for MIN due to issue #2116 * Use iamax.S rather than iamax_sse.S for ISMIN/ISAMIN on all x86_64 as workaround for #2116 * Move ARMv8 gcc build from Travis to Azure * Move ARMv8 gcc build from Travis to Azure * Update .travis.yml * Test drone CI * install make * remove sudo * Install gcc * Install perl * Install gfortran and add a clang job * gfortran->gcc-gfortran * Switch to ubuntu and parallel jobs * apt update * Fix typo * update yes * no need of gcc in clang build * Add a cmake build as well * Add cmake builds and print options * build without lapack on cmake * parallel build * See if ubuntu 19.04 fixes the ICE * Remove qemu armv8 builds * arm32 build * Fix typo * TST: add SkylakeX AVX512 CI test * adapt the C-level reproducer code for some recent SkylakeX AVX512 kernel issues, provided by Isuru Fernando and modified by Martin Kroeker, for usage in the utest suite * add an Intel SDE SkylakeX emulation utest run to the Azure CI matrix; a custom Docker build was required because Ubuntu image provided by Azure does not support AVX512VL instructions * Add option USE_LOCKING for single-threaded build with locking support for calling from concurrent threads * Add option USE_LOCKING for single-threaded build with locking support * Add option USE_LOCKING for SMP-like locking in USE_THREAD=0 builds * Add option USE_LOCKING but keep default settings intact * Remove unrelated change * Do not try ancient PGI hacks with recent versions of that compiler should fix #2139 * Build and run utests in any case, they do their own checks for fortran availability * Add softfp support in min/max kernels fix for #1912 * Revert "Add softfp support in min/max kernels" * Separate implementations of AMAX and IAMAX on arm As noted in #1912 and comment on #1942, the combined implementation happens to "do the right thing" on hardfp, but cannot return both value and index on softfp where they would have to share the return register * Ensure correct output for DAMAX with softfp * Use generic kernels for complex (I)AMAX to support softfp * improved zgemm power9 based on power8 * upload thread safety test folder * hook up c++ thread safety test (main Makefile) * add c++ thread test option to Makefile.rule * Document NO_AVX512 for #2151 * sgemm pipeline improved, zgemm rewritten without inner packs, ABI lxvx v20 fixed with vs52 * Fix detection of AVX512 capable compilers in getarch 21eda8b5 introduced a check in getarch.c to test if the compiler is capable of AVX512. This check currently fails, since the used __AVX2__ macro is only defined if getarch itself was compiled with AVX2/AVX512 support. Make sure this is the case by building getarch with -march=native on x86_64. It is only supposed to run on the build host anyway. * c_check: Unlink correct file * power9 zgemm ztrmm optimized * conflict resolve * Add gfortran workaround for ABI violations in LAPACKE for #2154 (see gcc bug 90329) * Add gfortran workaround for ABI violations for #2154 (see gcc bug 90329) * Add gfortran workaround for potential ABI violation for #2154 * Update fc.cmake * Remove any inadvertent use of -march=native from DYNAMIC_ARCH builds from #2143, -march=native precludes use of more specific options like -march=skylake-avx512 in individual kernels, and defeats the purpose of dynamic arch anyway. * Avoid unintentional activation of TLS code via USE_TLS=0 fixes #2149 * Do not force gcc options on non-gcc compilers fixes compile failure with pgi 18.10 as reported on OpenBLAS-users * Update Makefile.x86_64 * Zero ecx with a mov instruction PGI assembler does not like the initialization in the constraints. * Fix mov syntax * new sgemm 8x16 * Update dtrmm_kernel_16x4_power8.S * PGI compiler does not like -march=native * Fix build on FreeBSD/powerpc64. Signed-off-by: Piotr Kubaj <pkubaj@anongoth.pl> * Fix build for PPC970 on FreeBSD pt. 1 FreeBSD needs DCBT_ARG=0 as well. * Fix build for PPC970 on FreeBSD pt.2 FreeBSD needs those macros too. * cgemm/ctrmm power9 * Utest needs CBLAS but not necessarily FORTRAN * Add mingw builds to Appveyor config * Add getarch flags to disable AVX on x86 (and other small fixes to match Makefile behaviour) * Make disabling DYNAMIC_ARCH on unsupported systems work needs to be unset in the cache for the change to have any effect * Mingw32 needs leading underscore on object names (also copy BUNDERSCORE settings for FORTRAN from the corresponding Makefile)
6 years ago
rebase? (#1) * With the Intel compiler on Linux, prefer ifort for the final link step icc has known problems with mixed-language builds that ifort can handle just fine. Fixes #1956 * Rename operands to put lda on the input/output constraint list * Fix wrong constraints in inline assembly for #2009 * Fix inline assembly constraints rework indices to allow marking argument lda4 as input and output. For #2009 * Fix inline assembly constraints rework indices to allow marking argument lda as input and output. * Fix inline assembly constraints * Fix inline assembly constraints * Fix inline assembly constraints in Bulldozer TRSM kernels rework indices to allow marking i,as and bs as both input and output (marked operand n1 as well for simplicity). For #2009 * Correct range_n limiting same bug as seen in #1388, somehow missed in corresponding PR #1389 * Allow multithreading TRMV again revert workaround introduced for issue #1332 as the actual cause appears to be my incorrect fix from #1262 (see #1388) * Fix error introduced during cleanup * Reduce list of kernels in the dynamic arch build to make compilation complete reliably within the 1h limit again * init * move fix to right place * Fix missing -c option in AVX512 test * Fix AVX512 test always returning false due to missing compiler option * Make x86_32 imply NO_AVX2, NO_AVX512 in addition to NO_AVX fixes #2033 * Keep xcode8.3 for osx BINARY=32 build as xcode10 deprecated i386 * Make sure that AVX512 is disabled in 32bit builds for #2033 * Improve handling of NO_STATIC and NO_SHARED to avoid surprises from defining either as zero. Fixes #2035 by addressing some concerns from #1422 * init * address warning introed with #1814 et al * Restore locking optimizations for OpenMP case restore another accidentally dropped part of #1468 that was missed in #2004 to address performance regression reported in #1461 * HiSilicon tsv110 CPUs optimization branch add HiSilicon tsv110 CPUs optimization branch * add TARGET support for HiSilicon tsv110 CPUs * add TARGET support for HiSilicon tsv110 CPUs * add TARGET support for HiSilicon tsv110 CPUs * Fix module definition conflicts between LAPACK and ReLAPACK for #2043 * Do not compile in AVX512 check if AVX support is disabled xgetbv is function depends on NO_AVX being undefined - we could change that too, but that combo is unlikely to work anyway * ctest.c : add __POWERPC__ for PowerMac * Fix crash in sgemm SSE/nano kernel on x86_64 Fix bug #2047. Signed-off-by: Celelibi <celelibi@gmail.com> * param.h : enable defines for PPC970 on DarwinOS fixes: gemm.c: In function 'sgemm_': ../common_param.h:981:18: error: 'SGEMM_DEFAULT_P' undeclared (first use in this function) #define SGEMM_P SGEMM_DEFAULT_P ^ * common_power.h: force DCBT_ARG 0 on PPC970 Darwin without this, we see ../kernel/power/gemv_n.S:427:Parameter syntax error and many more similar entries that relates to this assembly command dcbt 8, r24, r18 this change makes the DCBT_ARG = 0 and openblas builds through to completion on PowerMac 970 Tests pass * Make TARGET=GENERIC compatible with DYNAMIC_ARCH=1 for issue #2048 * make DYNAMIC_ARCH=1 package work on TSV110. * make DYNAMIC_ARCH=1 package work on TSV110 * Add Intel Denverton for #2048 * Add Intel Denverton * Change 64-bit detection as explained in #2056 * Trivial typo fix as suggested in #2022 * Disable the AVX512 DGEMM kernel (again) Due to as yet unresolved errors seen in #1955 and #2029 * Use POSIX getenv on Cygwin The Windows-native GetEnvironmentVariable cannot be relied on, as Cygwin does not always copy environment variables set through Cygwin to the Windows environment block, particularly after fork(). * Fix for #2063: The DllMain used in Cygwin did not run the thread memory pool cleanup upon THREAD_DETACH which is needed when compiled with USE_TLS=1. * Also call CloseHandle on each thread, as well as on the event so as to not leak thread handles. * AIX asm syntax changes needed for shared object creation * power9 makefile. dgemm based on power8 kernel with following changes : 32x unrolled 16x4 kernel and 8x4 kernel using (lxv stxv butterfly rank1 update). improvement from 17 to 22-23gflops. dtrmm cases were added into dgemm itself * Expose CBLAS interfaces for I?MIN and I?MAX * Build CBLAS interfaces for I?MIN and I?MAX * Add declarations for ?sum and cblas_?sum * Add interface for ?sum (derived from ?asum) * Add ?sum * Add implementations of ssum/dsum and csum/zsum as trivial copies of asum/zsasum with the fabs calls replaced by fmov to preserve code structure * Add ARM implementations of ?sum (trivial copies of the respective ?asum with the fabs calls removed) * Add ARM64 implementations of ?sum as trivial copies of the respective ?asum kernels with the fabs calls removed * Add ia64 implementation of ?sum as trivial copy of asum with the fabs calls removed * Add MIPS implementation of ?sum as trivial copy of ?asum with the fabs calls removed * Add MIPS64 implementation of ?sum as trivial copy of ?asum with the fabs replaced by mov to preserve code structure * Add POWER implementation of ?sum as trivial copy of ?asum with the fabs replaced by fmr to preserve code structure * Add SPARC implementation of ?sum as trivial copy of ?asum with the fabs replaced by fmov to preserve code structure * Add x86 implementation of ?sum as trivial copy of ?asum with the fabs calls removed * Add x86_64 implementation of ?sum as trivial copy of ?asum with the fabs calls removed * Add ZARCH implementation of ?sum as trivial copies of the respective ?asum kernels with the ABS and vflpsb calls removed * Detect 32bit environment on 64bit ARM hardware for #2056, using same approach as #2058 * Add cmake defaults for ?sum kernels * Add ?sum * Add ?sum definitions for generic kernel * Add declarations for ?sum * Add -lm and disable EXPRECISION support on *BSD fixes #2075 * Add in runtime CPU detection for POWER. * snprintf define consolidated to common.h * Support INTERFACE64=1 * Add support for INTERFACE64 and fix XERBLA calls 1. Replaced all instances of "int" with "blasint" 2. Added string length as "hidden" third parameter in calls to fortran XERBLA * Correct length of name string in xerbla call * Avoid out-of-bounds accesses in LAPACK EIG tests see https://github.com/Reference-LAPACK/lapack/issues/333 * Correct INFO=4 condition * Disable reallocation of work array in xSYTRF as it appears to cause memory management problems (seen in the LAPACK tests) * Disable repeated recursion on Ab_BR in ReLAPACK xGBTRF due to crashes in LAPACK tests * sgemm/strmm * Update Changelog with changes from 0.3.6 * Increment version to 0.3.7.dev * Increment version to 0.3.7.dev * Misc. typo fixes Found via `codespell -q 3 -w -L ith,als,dum,nd,amin,nto,wis,ba -S ./relapack,./kernel,./lapack-netlib` * Correct argument of CPU_ISSET for glibc <2.5 fixes #2104 * conflict resolve * Revert reference/ fixes * Revert Changelog.txt typos * Disable the SkyLakeX DGEMMITCOPY kernel as well as a stopgap measure for https://github.com/numpy/numpy/issues/13401 as mentioned in #1955 * Disable DGEMMINCOPY as well for now #1955 * init * Fix errors in cpu enumeration with glibc 2.6 for #2114 * Change two http links to https Closes #2109 * remove redundant code #2113 * Set up CI with Azure Pipelines [skip ci] * TST: add native POWER8 to CI * add native POWER8 testing to Travis CI matrix with ppc64le os entry * Update link to IBM MASS library, update cpu support status * first try migrating one of the arm builds from travis * fix tabbing in azure commands * Update azure-pipelines.yml take out offending lines (although stolen from https://github.com/conda-forge/opencv-feedstock azure-pipelines fiie) * Update azure-pipelines.yml * Update azure-pipelines.yml * Update azure-pipelines.yml * Update azure-pipelines.yml * DOC: Add Azure CI status badge * Add ARMV6 build to azure CI setup (#2122) using aytekinar's Alpine image and docker script from the Travis setup [skip ci] * TST: Azure manylinux1 & clean-up * remove some of the steps & comments from the original Azure yml template * modify the trigger section to use develop since OpenBLAS primarily uses this branch; use the same batching behavior as downstream projects NumPy/ SciPy * remove Travis emulated ARMv6 gcc build because this now happens in Azure * use documented Ubuntu vmImage name for Azure and add in a manylinux1 test run to the matrix [skip appveyor] * Add NO_AFFINITY to available options on Linux, and set it to ON to match the gmake default. Fixes second part of #2114 * Replace ISMIN and ISAMIN kernels on all x86_64 platforms (#2125) * Mark iamax_sse.S as unsuitable for MIN due to issue #2116 * Use iamax.S rather than iamax_sse.S for ISMIN/ISAMIN on all x86_64 as workaround for #2116 * Move ARMv8 gcc build from Travis to Azure * Move ARMv8 gcc build from Travis to Azure * Update .travis.yml * Test drone CI * install make * remove sudo * Install gcc * Install perl * Install gfortran and add a clang job * gfortran->gcc-gfortran * Switch to ubuntu and parallel jobs * apt update * Fix typo * update yes * no need of gcc in clang build * Add a cmake build as well * Add cmake builds and print options * build without lapack on cmake * parallel build * See if ubuntu 19.04 fixes the ICE * Remove qemu armv8 builds * arm32 build * Fix typo * TST: add SkylakeX AVX512 CI test * adapt the C-level reproducer code for some recent SkylakeX AVX512 kernel issues, provided by Isuru Fernando and modified by Martin Kroeker, for usage in the utest suite * add an Intel SDE SkylakeX emulation utest run to the Azure CI matrix; a custom Docker build was required because Ubuntu image provided by Azure does not support AVX512VL instructions * Add option USE_LOCKING for single-threaded build with locking support for calling from concurrent threads * Add option USE_LOCKING for single-threaded build with locking support * Add option USE_LOCKING for SMP-like locking in USE_THREAD=0 builds * Add option USE_LOCKING but keep default settings intact * Remove unrelated change * Do not try ancient PGI hacks with recent versions of that compiler should fix #2139 * Build and run utests in any case, they do their own checks for fortran availability * Add softfp support in min/max kernels fix for #1912 * Revert "Add softfp support in min/max kernels" * Separate implementations of AMAX and IAMAX on arm As noted in #1912 and comment on #1942, the combined implementation happens to "do the right thing" on hardfp, but cannot return both value and index on softfp where they would have to share the return register * Ensure correct output for DAMAX with softfp * Use generic kernels for complex (I)AMAX to support softfp * improved zgemm power9 based on power8 * upload thread safety test folder * hook up c++ thread safety test (main Makefile) * add c++ thread test option to Makefile.rule * Document NO_AVX512 for #2151 * sgemm pipeline improved, zgemm rewritten without inner packs, ABI lxvx v20 fixed with vs52 * Fix detection of AVX512 capable compilers in getarch 21eda8b5 introduced a check in getarch.c to test if the compiler is capable of AVX512. This check currently fails, since the used __AVX2__ macro is only defined if getarch itself was compiled with AVX2/AVX512 support. Make sure this is the case by building getarch with -march=native on x86_64. It is only supposed to run on the build host anyway. * c_check: Unlink correct file * power9 zgemm ztrmm optimized * conflict resolve * Add gfortran workaround for ABI violations in LAPACKE for #2154 (see gcc bug 90329) * Add gfortran workaround for ABI violations for #2154 (see gcc bug 90329) * Add gfortran workaround for potential ABI violation for #2154 * Update fc.cmake * Remove any inadvertent use of -march=native from DYNAMIC_ARCH builds from #2143, -march=native precludes use of more specific options like -march=skylake-avx512 in individual kernels, and defeats the purpose of dynamic arch anyway. * Avoid unintentional activation of TLS code via USE_TLS=0 fixes #2149 * Do not force gcc options on non-gcc compilers fixes compile failure with pgi 18.10 as reported on OpenBLAS-users * Update Makefile.x86_64 * Zero ecx with a mov instruction PGI assembler does not like the initialization in the constraints. * Fix mov syntax * new sgemm 8x16 * Update dtrmm_kernel_16x4_power8.S * PGI compiler does not like -march=native * Fix build on FreeBSD/powerpc64. Signed-off-by: Piotr Kubaj <pkubaj@anongoth.pl> * Fix build for PPC970 on FreeBSD pt. 1 FreeBSD needs DCBT_ARG=0 as well. * Fix build for PPC970 on FreeBSD pt.2 FreeBSD needs those macros too. * cgemm/ctrmm power9 * Utest needs CBLAS but not necessarily FORTRAN * Add mingw builds to Appveyor config * Add getarch flags to disable AVX on x86 (and other small fixes to match Makefile behaviour) * Make disabling DYNAMIC_ARCH on unsupported systems work needs to be unset in the cache for the change to have any effect * Mingw32 needs leading underscore on object names (also copy BUNDERSCORE settings for FORTRAN from the corresponding Makefile)
6 years ago
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  1. /*********************************************************************/
  2. /* Copyright 2009, 2010 The University of Texas at Austin. */
  3. /* All rights reserved. */
  4. /* */
  5. /* Redistribution and use in source and binary forms, with or */
  6. /* without modification, are permitted provided that the following */
  7. /* conditions are met: */
  8. /* */
  9. /* 1. Redistributions of source code must retain the above */
  10. /* copyright notice, this list of conditions and the following */
  11. /* disclaimer. */
  12. /* */
  13. /* 2. Redistributions in binary form must reproduce the above */
  14. /* copyright notice, this list of conditions and the following */
  15. /* disclaimer in the documentation and/or other materials */
  16. /* provided with the distribution. */
  17. /* */
  18. /* THIS SOFTWARE IS PROVIDED BY THE UNIVERSITY OF TEXAS AT */
  19. /* AUSTIN ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, */
  20. /* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF */
  21. /* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE */
  22. /* DISCLAIMED. IN NO EVENT SHALL THE UNIVERSITY OF TEXAS AT */
  23. /* AUSTIN OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, */
  24. /* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES */
  25. /* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE */
  26. /* GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR */
  27. /* BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF */
  28. /* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT */
  29. /* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT */
  30. /* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE */
  31. /* POSSIBILITY OF SUCH DAMAGE. */
  32. /* */
  33. /* The views and conclusions contained in the software and */
  34. /* documentation are those of the authors and should not be */
  35. /* interpreted as representing official policies, either expressed */
  36. /* or implied, of The University of Texas at Austin. */
  37. /*********************************************************************/
  38. #define ASSEMBLER
  39. #include "common.h"
  40. #ifndef __64BIT__
  41. #define LOAD lwz
  42. #else
  43. #define LOAD ld
  44. #endif
  45. #ifdef __64BIT__
  46. #define STACKSIZE 320
  47. #define ALPHA_R 296(SP)
  48. #define ALPHA_I 304(SP)
  49. #define FZERO 312(SP)
  50. #else
  51. #define STACKSIZE 256
  52. #define ALPHA_R 224(SP)
  53. #define ALPHA_I 232(SP)
  54. #define FZERO 240(SP)
  55. #endif
  56. #define M r3
  57. #define N r4
  58. #define K r5
  59. #if defined(linux) || defined(__FreeBSD__)
  60. #ifndef __64BIT__
  61. #define A r6
  62. #define B r7
  63. #define C r8
  64. #define LDC r9
  65. #define OFFSET r10
  66. #else
  67. #define A r8
  68. #define B r9
  69. #define C r10
  70. #define LDC r6
  71. #define OFFSET r7
  72. #endif
  73. #endif
  74. #if defined(_AIX) || defined(__APPLE__)
  75. #if !defined(__64BIT__) && defined(DOUBLE)
  76. #define A r10
  77. #define B r6
  78. #define C r7
  79. #define LDC r8
  80. #define OFFSET r9
  81. #else
  82. #define A r8
  83. #define B r9
  84. #define C r10
  85. #define LDC r6
  86. #define OFFSET r7
  87. #endif
  88. #endif
  89. #define TEMP r22
  90. #define KK r23
  91. #define I r24
  92. #define J r25
  93. #define AO r26
  94. #define BO r27
  95. #define CO1 r28
  96. #define CO2 r29
  97. #define PREA r30
  98. #define PREC r31
  99. #define PREB PREA
  100. #ifndef NEEDPARAM
  101. PROLOGUE
  102. PROFCODE
  103. addi SP, SP, -STACKSIZE
  104. li r0, 0
  105. stfd f14, 0(SP)
  106. stfd f15, 8(SP)
  107. stfd f16, 16(SP)
  108. stfd f17, 24(SP)
  109. stfd f18, 32(SP)
  110. stfd f19, 40(SP)
  111. stfd f20, 48(SP)
  112. stfd f21, 56(SP)
  113. stfd f22, 64(SP)
  114. stfd f23, 72(SP)
  115. stfd f24, 80(SP)
  116. stfd f25, 88(SP)
  117. stfd f26, 96(SP)
  118. stfd f27, 104(SP)
  119. stfd f28, 112(SP)
  120. stfd f29, 120(SP)
  121. stfd f30, 128(SP)
  122. stfd f31, 136(SP)
  123. #ifdef __64BIT__
  124. std r31, 144(SP)
  125. std r30, 152(SP)
  126. std r29, 160(SP)
  127. std r28, 168(SP)
  128. std r27, 176(SP)
  129. std r26, 184(SP)
  130. std r25, 192(SP)
  131. std r24, 200(SP)
  132. #ifdef TRMMKERNEL
  133. std r23, 208(SP)
  134. std r22, 216(SP)
  135. #endif
  136. #else
  137. stw r31, 144(SP)
  138. stw r30, 148(SP)
  139. stw r29, 152(SP)
  140. stw r28, 156(SP)
  141. stw r27, 160(SP)
  142. stw r26, 164(SP)
  143. stw r25, 168(SP)
  144. stw r24, 172(SP)
  145. #ifdef TRMMKERNEL
  146. stw r23, 176(SP)
  147. stw r22, 180(SP)
  148. #endif
  149. #endif
  150. stfd f1, ALPHA_R
  151. stfd f2, ALPHA_I
  152. stw r0, FZERO
  153. #if defined(linux) || defined(__FreeBSD__)
  154. #ifdef __64BIT__
  155. ld LDC, FRAMESLOT(0) + STACKSIZE(SP)
  156. #endif
  157. #endif
  158. #if defined(_AIX) || defined(__APPLE__)
  159. #ifdef __64BIT__
  160. ld LDC, FRAMESLOT(0) + STACKSIZE(SP)
  161. #else
  162. #ifdef DOUBLE
  163. lwz B, FRAMESLOT(0) + STACKSIZE(SP)
  164. lwz C, FRAMESLOT(1) + STACKSIZE(SP)
  165. lwz LDC, FRAMESLOT(2) + STACKSIZE(SP)
  166. #else
  167. lwz LDC, FRAMESLOT(0) + STACKSIZE(SP)
  168. #endif
  169. #endif
  170. #endif
  171. #ifdef TRMMKERNEL
  172. #if (defined(linux) || defined(__FreeBSD__)) && defined(__64BIT__)
  173. ld OFFSET, FRAMESLOT(1) + STACKSIZE(SP)
  174. #endif
  175. #if defined(_AIX) || defined(__APPLE__)
  176. #ifdef __64BIT__
  177. ld OFFSET, FRAMESLOT(1) + STACKSIZE(SP)
  178. #else
  179. #ifdef DOUBLE
  180. lwz OFFSET, FRAMESLOT(3) + STACKSIZE(SP)
  181. #else
  182. lwz OFFSET, FRAMESLOT(1) + STACKSIZE(SP)
  183. #endif
  184. #endif
  185. #endif
  186. #if defined(TRMMKERNEL) && !defined(LEFT)
  187. neg KK, OFFSET
  188. #endif
  189. #endif
  190. slwi LDC, LDC, ZBASE_SHIFT
  191. cmpwi cr0, M, 0
  192. ble LL(999)
  193. cmpwi cr0, N, 0
  194. ble LL(999)
  195. cmpwi cr0, K, 0
  196. ble LL(999)
  197. #ifndef PREFETCHTEST
  198. #ifdef PPC970
  199. li PREC, 4 * SIZE
  200. #endif
  201. #ifdef POWER4
  202. li PREC, 4 * SIZE /* is 12 best? */
  203. #endif
  204. #ifdef POWER5
  205. li PREC, 4 * SIZE /* is 12 best? */
  206. #endif
  207. #else
  208. #if defined(linux) || defined(__FreeBSD__)
  209. #ifndef __64BIT__
  210. lwz PREA, FRAMESLOT(2) + STACKSIZE(SP)
  211. lwz PREC, FRAMESLOT(3) + STACKSIZE(SP)
  212. #else
  213. ld PREA, FRAMESLOT(3) + STACKSIZE(SP)
  214. ld PREC, FRAMESLOT(4) + STACKSIZE(SP)
  215. #endif
  216. #endif
  217. #if defined(_AIX) || defined(__APPLE__)
  218. #ifdef __64BIT__
  219. ld PREA, FRAMESLOT(3) + STACKSIZE(SP)
  220. ld PREC, FRAMESLOT(4) + STACKSIZE(SP)
  221. #else
  222. #ifdef DOUBLE
  223. lwz PREA, FRAMESLOT(4) + STACKSIZE(SP)
  224. lwz PREC, FRAMESLOT(5) + STACKSIZE(SP)
  225. #else
  226. lwz PREA, FRAMESLOT(3) + STACKSIZE(SP)
  227. lwz PREC, FRAMESLOT(4) + STACKSIZE(SP)
  228. #endif
  229. #endif
  230. #endif
  231. #endif
  232. #ifndef PREFETCHTEST
  233. #ifdef PPC970
  234. #ifdef ALLOC_HUGETLB
  235. li PREA, (16 * 1 * SIZE)
  236. li PREB, (16 * 5 * SIZE)
  237. #else
  238. li PREA, (16 * 15 * SIZE)
  239. li PREB, (16 * 8 * SIZE)
  240. #endif
  241. #endif
  242. #ifdef POWER4
  243. #ifdef ALLOC_HUGETLB
  244. li PREA, (16 * 1 * SIZE)
  245. li PREB, (16 * 1 * SIZE)
  246. #else
  247. li PREA, (16 * 2 * SIZE)
  248. li PREB, (16 * 2 * SIZE)
  249. #endif
  250. #endif
  251. #ifdef POWER5
  252. #ifdef ALLOC_HUGETLB
  253. li PREA, (16 * 7 * SIZE)
  254. li PREB, (16 * 7 * SIZE)
  255. #else
  256. li PREA, (16 * 12 * SIZE)
  257. li PREB, (16 * 6 * SIZE)
  258. #endif
  259. #endif
  260. #endif
  261. lfs f0, FZERO
  262. srawi. J, N, 1
  263. ble LL(30)
  264. .align 4
  265. LL(10):
  266. fmr f1, f0
  267. fmr f2, f0
  268. fmr f3, f0
  269. fmr f4, f0
  270. fmr f5, f0
  271. fmr f6, f0
  272. fmr f7, f0
  273. fmr f8, f0
  274. fmr f9, f0
  275. fmr f10, f0
  276. fmr f11, f0
  277. fmr f12, f0
  278. fmr f13, f0
  279. fmr f14, f0
  280. fmr f15, f0
  281. mr CO1, C
  282. add CO2, C, LDC
  283. add C, CO2, LDC
  284. #if defined(TRMMKERNEL) && defined(LEFT)
  285. mr KK, OFFSET
  286. #endif
  287. srawi. I, M, 1
  288. mr AO, A
  289. ble LL(20)
  290. .align 4
  291. LL(11):
  292. #ifndef TRMMKERNEL
  293. LFD f16, 0 * SIZE(AO)
  294. LFD f17, 1 * SIZE(AO)
  295. LFD f18, 2 * SIZE(AO)
  296. LFD f19, 3 * SIZE(AO)
  297. LFD f20, 0 * SIZE(B)
  298. LFD f21, 1 * SIZE(B)
  299. LFD f22, 2 * SIZE(B)
  300. LFD f23, 3 * SIZE(B)
  301. #ifdef POWER5
  302. LFD f28, 4 * SIZE(B)
  303. LFD f29, 5 * SIZE(B)
  304. LFD f30, 6 * SIZE(B)
  305. LFD f31, 7 * SIZE(B)
  306. #endif
  307. DCBTST(CO1, PREC)
  308. nop
  309. nop
  310. DCBTST(CO2, PREC)
  311. srawi. r0, K, 2
  312. mr BO, B
  313. mtspr CTR, r0
  314. ble LL(15)
  315. #else
  316. #if (defined(TRMMKERNEL) && defined(LEFT) && defined(TRANSA)) || \
  317. (defined(TRMMKERNEL) && !defined(LEFT) && !defined(TRANSA))
  318. LFD f16, 0 * SIZE(AO)
  319. LFD f17, 1 * SIZE(AO)
  320. LFD f18, 2 * SIZE(AO)
  321. LFD f19, 3 * SIZE(AO)
  322. LFD f20, 0 * SIZE(B)
  323. LFD f21, 1 * SIZE(B)
  324. LFD f22, 2 * SIZE(B)
  325. LFD f23, 3 * SIZE(B)
  326. #ifdef POWER5
  327. LFD f28, 4 * SIZE(B)
  328. LFD f29, 5 * SIZE(B)
  329. LFD f30, 6 * SIZE(B)
  330. LFD f31, 7 * SIZE(B)
  331. #endif
  332. mr BO, B
  333. #else
  334. slwi r0, KK, 1 + ZBASE_SHIFT
  335. add AO, AO, r0
  336. add BO, B, r0
  337. LFD f16, 0 * SIZE(AO)
  338. LFD f17, 1 * SIZE(AO)
  339. LFD f18, 2 * SIZE(AO)
  340. LFD f19, 3 * SIZE(AO)
  341. LFD f20, 0 * SIZE(BO)
  342. LFD f21, 1 * SIZE(BO)
  343. LFD f22, 2 * SIZE(BO)
  344. LFD f23, 3 * SIZE(BO)
  345. #ifdef POWER5
  346. LFD f28, 4 * SIZE(BO)
  347. LFD f29, 5 * SIZE(BO)
  348. LFD f30, 6 * SIZE(BO)
  349. LFD f31, 7 * SIZE(BO)
  350. #endif
  351. #endif
  352. DCBTST(CO1, PREC)
  353. nop
  354. nop
  355. DCBTST(CO2, PREC)
  356. #if (defined(LEFT) && !defined(TRANSA)) || (!defined(LEFT) && defined(TRANSA))
  357. sub TEMP, K, KK
  358. #elif defined(LEFT)
  359. addi TEMP, KK, 2
  360. #else
  361. addi TEMP, KK, 2
  362. #endif
  363. srawi. TEMP, TEMP, 2
  364. mtspr CTR, TEMP
  365. ble LL(15)
  366. #endif
  367. .align 4
  368. LL(12):
  369. FMADD f0, f16, f20, f0
  370. FMADD f5, f17, f21, f5
  371. FMADD f10, f18, f22, f10
  372. FMADD f15, f19, f23, f15
  373. #if defined(ALLOC_HUGETLB) && !defined(POWER5)
  374. LFD f28, 4 * SIZE(BO)
  375. LFD f29, 5 * SIZE(BO)
  376. LFD f30, 6 * SIZE(BO)
  377. LFD f31, 7 * SIZE(BO)
  378. #endif
  379. FMADD f1, f17, f20, f1
  380. FMADD f2, f18, f20, f2
  381. FMADD f3, f19, f20, f3
  382. FMADD f4, f16, f21, f4
  383. #if !defined(ALLOC_HUGETLB) && !defined(POWER5)
  384. LFD f28, 4 * SIZE(BO)
  385. LFD f29, 5 * SIZE(BO)
  386. LFD f30, 6 * SIZE(BO)
  387. LFD f31, 7 * SIZE(BO)
  388. #endif
  389. LFD f24, 4 * SIZE(AO)
  390. LFD f25, 5 * SIZE(AO)
  391. LFD f26, 6 * SIZE(AO)
  392. LFD f27, 7 * SIZE(AO)
  393. FMADD f6, f18, f21, f6
  394. FMADD f7, f19, f21, f7
  395. FMADD f8, f16, f22, f8
  396. FMADD f9, f17, f22, f9
  397. FMADD f11, f19, f22, f11
  398. FMADD f12, f16, f23, f12
  399. FMADD f13, f17, f23, f13
  400. FMADD f14, f18, f23, f14
  401. LFD f20, 8 * SIZE(BO)
  402. LFD f21, 9 * SIZE(BO)
  403. LFD f22, 10 * SIZE(BO)
  404. LFD f23, 11 * SIZE(BO)
  405. FMADD f0, f24, f28, f0
  406. FMADD f5, f25, f29, f5
  407. FMADD f10, f26, f30, f10
  408. FMADD f15, f27, f31, f15
  409. LFD f16, 8 * SIZE(AO)
  410. LFD f17, 9 * SIZE(AO)
  411. LFD f18, 10 * SIZE(AO)
  412. LFD f19, 11 * SIZE(AO)
  413. FMADD f1, f25, f28, f1
  414. FMADD f2, f26, f28, f2
  415. FMADD f3, f27, f28, f3
  416. FMADD f4, f24, f29, f4
  417. FMADD f6, f26, f29, f6
  418. FMADD f7, f27, f29, f7
  419. FMADD f8, f24, f30, f8
  420. FMADD f9, f25, f30, f9
  421. FMADD f11, f27, f30, f11
  422. FMADD f12, f24, f31, f12
  423. FMADD f13, f25, f31, f13
  424. FMADD f14, f26, f31, f14
  425. LFD f28, 12 * SIZE(BO)
  426. LFD f29, 13 * SIZE(BO)
  427. LFD f30, 14 * SIZE(BO)
  428. LFD f31, 15 * SIZE(BO)
  429. FMADD f0, f16, f20, f0
  430. FMADD f5, f17, f21, f5
  431. FMADD f10, f18, f22, f10
  432. FMADD f15, f19, f23, f15
  433. LFD f24, 12 * SIZE(AO)
  434. LFD f25, 13 * SIZE(AO)
  435. LFD f26, 14 * SIZE(AO)
  436. LFD f27, 15 * SIZE(AO)
  437. FMADD f1, f17, f20, f1
  438. FMADD f2, f18, f20, f2
  439. FMADD f3, f19, f20, f3
  440. FMADD f4, f16, f21, f4
  441. FMADD f6, f18, f21, f6
  442. FMADD f7, f19, f21, f7
  443. FMADD f8, f16, f22, f8
  444. FMADD f9, f17, f22, f9
  445. FMADD f11, f19, f22, f11
  446. FMADD f12, f16, f23, f12
  447. FMADD f13, f17, f23, f13
  448. FMADD f14, f18, f23, f14
  449. #ifndef POWER5
  450. LFD f16, 16 * SIZE(AO)
  451. LFD f17, 17 * SIZE(AO)
  452. LFD f18, 18 * SIZE(AO)
  453. LFD f19, 19 * SIZE(AO)
  454. #else
  455. LFD f20, 16 * SIZE(BO)
  456. LFD f21, 17 * SIZE(BO)
  457. LFD f22, 18 * SIZE(BO)
  458. LFD f23, 19 * SIZE(BO)
  459. #endif
  460. FMADD f0, f24, f28, f0
  461. FMADD f5, f25, f29, f5
  462. FMADD f10, f26, f30, f10
  463. FMADD f15, f27, f31, f15
  464. #ifndef POWER5
  465. LFD f20, 16 * SIZE(BO)
  466. LFD f21, 17 * SIZE(BO)
  467. LFD f22, 18 * SIZE(BO)
  468. LFD f23, 19 * SIZE(BO)
  469. #else
  470. LFD f16, 16 * SIZE(AO)
  471. LFD f17, 17 * SIZE(AO)
  472. LFD f18, 18 * SIZE(AO)
  473. LFD f19, 19 * SIZE(AO)
  474. #endif
  475. FMADD f1, f25, f28, f1
  476. FMADD f2, f26, f28, f2
  477. FMADD f3, f27, f28, f3
  478. FMADD f4, f24, f29, f4
  479. FMADD f6, f26, f29, f6
  480. FMADD f7, f27, f29, f7
  481. FMADD f8, f24, f30, f8
  482. FMADD f9, f25, f30, f9
  483. FMADD f11, f27, f30, f11
  484. FMADD f12, f24, f31, f12
  485. FMADD f13, f25, f31, f13
  486. FMADD f14, f26, f31, f14
  487. #ifdef POWER5
  488. LFD f28, 20 * SIZE(BO)
  489. LFD f29, 21 * SIZE(BO)
  490. LFD f30, 22 * SIZE(BO)
  491. LFD f31, 23 * SIZE(BO)
  492. #endif
  493. addi AO, AO, 16 * SIZE
  494. addi BO, BO, 16 * SIZE
  495. #ifdef PPC970
  496. #ifndef ALLOC_HUGETLB
  497. DCBT(AO, PREA)
  498. #endif
  499. DCBT(BO, PREB)
  500. #endif
  501. #ifdef POWER4
  502. #ifndef ALLOC_HUGETLB
  503. DCBT(AO, PREA)
  504. #endif
  505. DCBT(BO, PREB)
  506. #endif
  507. #ifdef POWER5
  508. #ifndef ALLOC_HUGETLB
  509. DCBT(BO, PREB)
  510. DCBT(AO, PREA)
  511. #endif
  512. #endif
  513. bdnz LL(12)
  514. .align 4
  515. LL(15):
  516. #ifndef TRMMKERNEL
  517. andi. r0, K, 3
  518. lfd f30, ALPHA_R
  519. lfd f31, ALPHA_I
  520. mtspr CTR, r0
  521. ble LL(KERNEL_MainFinish)
  522. #else
  523. #if (defined(LEFT) && !defined(TRANSA)) || (!defined(LEFT) && defined(TRANSA))
  524. sub TEMP, K, KK
  525. #elif defined(LEFT)
  526. addi TEMP, KK, 2
  527. #else
  528. addi TEMP, KK, 2
  529. #endif
  530. andi. TEMP, TEMP, 3
  531. lfd f30, ALPHA_R
  532. lfd f31, ALPHA_I
  533. mtspr CTR, TEMP
  534. ble LL(KERNEL_MainFinish)
  535. #endif
  536. .align 4
  537. LL(16):
  538. fmadd f0, f16, f20, f0
  539. fmadd f5, f17, f21, f5
  540. fmadd f10, f18, f22, f10
  541. fmadd f15, f19, f23, f15
  542. fmadd f1, f17, f20, f1
  543. fmadd f2, f18, f20, f2
  544. fmadd f3, f19, f20, f3
  545. fmadd f4, f16, f21, f4
  546. fmadd f6, f18, f21, f6
  547. fmadd f7, f19, f21, f7
  548. fmadd f8, f16, f22, f8
  549. fmadd f9, f17, f22, f9
  550. fmadd f11, f19, f22, f11
  551. fmadd f12, f16, f23, f12
  552. fmadd f13, f17, f23, f13
  553. fmadd f14, f18, f23, f14
  554. LFD f16, 4 * SIZE(AO)
  555. LFD f17, 5 * SIZE(AO)
  556. LFD f18, 6 * SIZE(AO)
  557. LFD f19, 7 * SIZE(AO)
  558. LFD f20, 4 * SIZE(BO)
  559. LFD f21, 5 * SIZE(BO)
  560. LFD f22, 6 * SIZE(BO)
  561. LFD f23, 7 * SIZE(BO)
  562. addi BO, BO, 4 * SIZE
  563. addi AO, AO, 4 * SIZE
  564. bdnz LL(16)
  565. .align 4
  566. LL(KERNEL_MainFinish):
  567. #ifndef TRMMKERNEL
  568. LFD f16, 0 * SIZE(CO1)
  569. LFD f17, 1 * SIZE(CO1)
  570. LFD f18, 2 * SIZE(CO1)
  571. LFD f19, 3 * SIZE(CO1)
  572. #endif
  573. #if defined(NN) || defined(NT) || defined(TN) || defined(TT) || \
  574. defined(CC) || defined(CR) || defined(RC) || defined(RR)
  575. FSUB f0, f0, f5
  576. FADD f1, f1, f4
  577. FSUB f2, f2, f7
  578. FADD f3, f3, f6
  579. #ifndef TRMMKERNEL
  580. LFD f20, 0 * SIZE(CO2)
  581. LFD f21, 1 * SIZE(CO2)
  582. LFD f22, 2 * SIZE(CO2)
  583. LFD f23, 3 * SIZE(CO2)
  584. #endif
  585. FSUB f8, f8, f13
  586. FADD f9, f9, f12
  587. FSUB f10, f10, f15
  588. FADD f11, f11, f14
  589. #elif defined(CN) || defined(CT) || defined(RN) || defined(RT)
  590. FADD f0, f0, f5
  591. FSUB f1, f1, f4
  592. FADD f2, f2, f7
  593. FSUB f3, f3, f6
  594. #ifndef TRMMKERNEL
  595. LFD f20, 0 * SIZE(CO2)
  596. LFD f21, 1 * SIZE(CO2)
  597. LFD f22, 2 * SIZE(CO2)
  598. LFD f23, 3 * SIZE(CO2)
  599. #endif
  600. FADD f8, f8, f13
  601. FSUB f9, f9, f12
  602. FADD f10, f10, f15
  603. FSUB f11, f11, f14
  604. #else /* defined(NC) || defined(TC) || defined(NR) || defined(TR) */
  605. FADD f0, f0, f5
  606. FSUB f1, f4, f1
  607. FADD f2, f2, f7
  608. FSUB f3, f6, f3
  609. #ifndef TRMMKERNEL
  610. LFD f20, 0 * SIZE(CO2)
  611. LFD f21, 1 * SIZE(CO2)
  612. LFD f22, 2 * SIZE(CO2)
  613. LFD f23, 3 * SIZE(CO2)
  614. #endif
  615. FADD f8, f8, f13
  616. FSUB f9, f12, f9
  617. FADD f10, f10, f15
  618. FSUB f11, f14, f11
  619. #endif
  620. #if defined(NN) || defined(NT) || defined(TN) || defined(TT)
  621. #ifndef TRMMKERNEL
  622. FMADD f16, f30, f0, f16
  623. FMADD f17, f30, f1, f17
  624. FMADD f18, f30, f2, f18
  625. FMADD f19, f30, f3, f19
  626. FMADD f20, f30, f8, f20
  627. FMADD f21, f30, f9, f21
  628. FMADD f22, f30, f10, f22
  629. FMADD f23, f30, f11, f23
  630. #else
  631. FMUL f16, f30, f0
  632. FMUL f17, f30, f1
  633. FMUL f18, f30, f2
  634. FMUL f19, f30, f3
  635. FMUL f20, f30, f8
  636. FMUL f21, f30, f9
  637. FMUL f22, f30, f10
  638. FMUL f23, f30, f11
  639. #endif
  640. FNMSUB f16, f31, f1, f16
  641. FMADD f17, f31, f0, f17
  642. FNMSUB f18, f31, f3, f18
  643. FMADD f19, f31, f2, f19
  644. FNMSUB f20, f31, f9, f20
  645. FMADD f21, f31, f8, f21
  646. FNMSUB f22, f31, f11, f22
  647. FMADD f23, f31, f10, f23
  648. #else /* defined(CN)||defined(CT)||defined(NC)||defined(TC)||defined(CC) */
  649. /* defined(RN)||defined(RT)||defined(NR)||defined(TR)||defined(CR) */
  650. /* defined(RC)|| defined(RR) */
  651. #ifndef TRMMKERNEL
  652. FMADD f16, f30, f0, f16
  653. FNMSUB f17, f30, f1, f17
  654. FMADD f18, f30, f2, f18
  655. FNMSUB f19, f30, f3, f19
  656. FMADD f20, f30, f8, f20
  657. FNMSUB f21, f30, f9, f21
  658. FMADD f22, f30, f10, f22
  659. FNMSUB f23, f30, f11, f23
  660. FMADD f16, f31, f1, f16
  661. FMADD f17, f31, f0, f17
  662. FMADD f18, f31, f3, f18
  663. FMADD f19, f31, f2, f19
  664. FMADD f20, f31, f9, f20
  665. FMADD f21, f31, f8, f21
  666. FMADD f22, f31, f11, f22
  667. FMADD f23, f31, f10, f23
  668. #else
  669. FMUL f16, f30, f0
  670. FMUL f17, f30, f1
  671. FMUL f18, f30, f2
  672. FMUL f19, f30, f3
  673. FMUL f20, f30, f8
  674. FMUL f21, f30, f9
  675. FMUL f22, f30, f10
  676. FMUL f23, f30, f11
  677. FMADD f16, f31, f1, f16
  678. FNMADD f17, f31, f0, f17
  679. FMADD f18, f31, f3, f18
  680. FNMADD f19, f31, f2, f19
  681. FMADD f20, f31, f9, f20
  682. FNMADD f21, f31, f8, f21
  683. FMADD f22, f31, f11, f22
  684. FNMADD f23, f31, f10, f23
  685. #endif
  686. #endif
  687. STFD f16, 0 * SIZE(CO1)
  688. STFD f17, 1 * SIZE(CO1)
  689. STFD f18, 2 * SIZE(CO1)
  690. STFD f19, 3 * SIZE(CO1)
  691. lfs f0, FZERO
  692. fmr f1, f0
  693. fmr f2, f0
  694. fmr f3, f0
  695. STFD f20, 0 * SIZE(CO2)
  696. STFD f21, 1 * SIZE(CO2)
  697. STFD f22, 2 * SIZE(CO2)
  698. STFD f23, 3 * SIZE(CO2)
  699. fmr f4, f0
  700. fmr f5, f0
  701. fmr f6, f0
  702. fmr f7, f0
  703. fmr f8, f0
  704. fmr f9, f0
  705. fmr f10, f0
  706. fmr f11, f0
  707. fmr f12, f0
  708. fmr f13, f0
  709. fmr f14, f0
  710. fmr f15, f0
  711. addi CO1, CO1, 4 * SIZE
  712. addi CO2, CO2, 4 * SIZE
  713. #ifdef TRMMKERNEL
  714. #if ( defined(LEFT) && defined(TRANSA)) || \
  715. (!defined(LEFT) && !defined(TRANSA))
  716. sub TEMP, K, KK
  717. #ifdef LEFT
  718. addi TEMP, TEMP, -2
  719. #else
  720. addi TEMP, TEMP, -2
  721. #endif
  722. slwi TEMP, TEMP, 1 + ZBASE_SHIFT
  723. add AO, AO, TEMP
  724. add BO, BO, TEMP
  725. #endif
  726. #ifdef LEFT
  727. addi KK, KK, 2
  728. #endif
  729. #endif
  730. addic. I, I, -1
  731. bgt LL(11)
  732. .align 4
  733. LL(20):
  734. andi. I, M, 1
  735. ble LL(29)
  736. #ifndef TRMMKERNEL
  737. LFD f16, 0 * SIZE(AO)
  738. LFD f17, 1 * SIZE(AO)
  739. LFD f18, 2 * SIZE(AO)
  740. LFD f19, 3 * SIZE(AO)
  741. LFD f20, 0 * SIZE(B)
  742. LFD f21, 1 * SIZE(B)
  743. LFD f22, 2 * SIZE(B)
  744. LFD f23, 3 * SIZE(B)
  745. LFD f24, 4 * SIZE(B)
  746. LFD f25, 5 * SIZE(B)
  747. LFD f26, 6 * SIZE(B)
  748. LFD f27, 7 * SIZE(B)
  749. lfs f0, FZERO
  750. fmr f1, f0
  751. fmr f2, f0
  752. fmr f3, f0
  753. fmr f4, f0
  754. fmr f5, f0
  755. fmr f6, f0
  756. fmr f7, f0
  757. srawi. r0, K, 2
  758. mr BO, B
  759. mtspr CTR, r0
  760. ble LL(25)
  761. #else
  762. #if (defined(TRMMKERNEL) && defined(LEFT) && defined(TRANSA)) || \
  763. (defined(TRMMKERNEL) && !defined(LEFT) && !defined(TRANSA))
  764. LFD f16, 0 * SIZE(AO)
  765. LFD f17, 1 * SIZE(AO)
  766. LFD f18, 2 * SIZE(AO)
  767. LFD f19, 3 * SIZE(AO)
  768. LFD f20, 0 * SIZE(B)
  769. LFD f21, 1 * SIZE(B)
  770. LFD f22, 2 * SIZE(B)
  771. LFD f23, 3 * SIZE(B)
  772. LFD f24, 4 * SIZE(B)
  773. LFD f25, 5 * SIZE(B)
  774. LFD f26, 6 * SIZE(B)
  775. LFD f27, 7 * SIZE(B)
  776. mr BO, B
  777. #else
  778. slwi r0, KK, 0 + ZBASE_SHIFT
  779. slwi TEMP, KK, 1 + ZBASE_SHIFT
  780. add AO, AO, r0
  781. add BO, B, TEMP
  782. LFD f16, 0 * SIZE(AO)
  783. LFD f17, 1 * SIZE(AO)
  784. LFD f18, 2 * SIZE(AO)
  785. LFD f19, 3 * SIZE(AO)
  786. LFD f20, 0 * SIZE(BO)
  787. LFD f21, 1 * SIZE(BO)
  788. LFD f22, 2 * SIZE(BO)
  789. LFD f23, 3 * SIZE(BO)
  790. LFD f24, 4 * SIZE(BO)
  791. LFD f25, 5 * SIZE(BO)
  792. LFD f26, 6 * SIZE(BO)
  793. LFD f27, 7 * SIZE(BO)
  794. #endif
  795. #if (defined(LEFT) && !defined(TRANSA)) || (!defined(LEFT) && defined(TRANSA))
  796. sub TEMP, K, KK
  797. #elif defined(LEFT)
  798. addi TEMP, KK, 1
  799. #else
  800. addi TEMP, KK, 2
  801. #endif
  802. srawi. TEMP, TEMP, 2
  803. mtspr CTR, TEMP
  804. ble LL(25)
  805. #endif
  806. .align 4
  807. LL(22):
  808. fmadd f0, f16, f20, f0
  809. fmadd f1, f16, f21, f1
  810. fmadd f2, f16, f22, f2
  811. fmadd f3, f16, f23, f3
  812. fmadd f4, f17, f20, f4
  813. fmadd f5, f17, f21, f5
  814. fmadd f6, f17, f22, f6
  815. fmadd f7, f17, f23, f7
  816. LFD f20, 8 * SIZE(BO)
  817. LFD f21, 9 * SIZE(BO)
  818. LFD f22, 10 * SIZE(BO)
  819. LFD f23, 11 * SIZE(BO)
  820. fmadd f0, f18, f24, f0
  821. fmadd f1, f18, f25, f1
  822. fmadd f2, f18, f26, f2
  823. fmadd f3, f18, f27, f3
  824. fmadd f4, f19, f24, f4
  825. fmadd f5, f19, f25, f5
  826. fmadd f6, f19, f26, f6
  827. fmadd f7, f19, f27, f7
  828. LFD f24, 12 * SIZE(BO)
  829. LFD f25, 13 * SIZE(BO)
  830. LFD f26, 14 * SIZE(BO)
  831. LFD f27, 15 * SIZE(BO)
  832. LFD f16, 4 * SIZE(AO)
  833. LFD f17, 5 * SIZE(AO)
  834. LFD f18, 6 * SIZE(AO)
  835. LFD f19, 7 * SIZE(AO)
  836. fmadd f0, f16, f20, f0
  837. fmadd f1, f16, f21, f1
  838. fmadd f2, f16, f22, f2
  839. fmadd f3, f16, f23, f3
  840. fmadd f4, f17, f20, f4
  841. fmadd f5, f17, f21, f5
  842. fmadd f6, f17, f22, f6
  843. fmadd f7, f17, f23, f7
  844. LFD f20, 16 * SIZE(BO)
  845. LFD f21, 17 * SIZE(BO)
  846. LFD f22, 18 * SIZE(BO)
  847. LFD f23, 19 * SIZE(BO)
  848. fmadd f0, f18, f24, f0
  849. fmadd f1, f18, f25, f1
  850. fmadd f2, f18, f26, f2
  851. fmadd f3, f18, f27, f3
  852. fmadd f4, f19, f24, f4
  853. fmadd f5, f19, f25, f5
  854. fmadd f6, f19, f26, f6
  855. fmadd f7, f19, f27, f7
  856. LFD f16, 8 * SIZE(AO)
  857. LFD f17, 9 * SIZE(AO)
  858. LFD f18, 10 * SIZE(AO)
  859. LFD f19, 11 * SIZE(AO)
  860. LFD f24, 20 * SIZE(BO)
  861. LFD f25, 21 * SIZE(BO)
  862. LFD f26, 22 * SIZE(BO)
  863. LFD f27, 23 * SIZE(BO)
  864. addi BO, BO, 16 * SIZE
  865. addi AO, AO, 8 * SIZE
  866. bdnz LL(22)
  867. .align 4
  868. LL(25):
  869. #ifndef TRMMKERNEL
  870. andi. r0, K, 3
  871. lfd f30, ALPHA_R
  872. lfd f31, ALPHA_I
  873. mtspr CTR, r0
  874. ble LL(27)
  875. #else
  876. #if (defined(LEFT) && !defined(TRANSA)) || (!defined(LEFT) && defined(TRANSA))
  877. sub TEMP, K, KK
  878. #elif defined(LEFT)
  879. addi TEMP, KK, 1
  880. #else
  881. addi TEMP, KK, 2
  882. #endif
  883. andi. TEMP, TEMP, 3
  884. lfd f30, ALPHA_R
  885. lfd f31, ALPHA_I
  886. mtspr CTR, TEMP
  887. ble LL(27)
  888. #endif
  889. .align 4
  890. LL(26):
  891. fmadd f0, f16, f20, f0
  892. fmadd f1, f16, f21, f1
  893. fmadd f2, f16, f22, f2
  894. fmadd f3, f16, f23, f3
  895. fmadd f4, f17, f20, f4
  896. fmadd f5, f17, f21, f5
  897. fmadd f6, f17, f22, f6
  898. fmadd f7, f17, f23, f7
  899. LFD f20, 4 * SIZE(BO)
  900. LFD f21, 5 * SIZE(BO)
  901. LFD f22, 6 * SIZE(BO)
  902. LFD f23, 7 * SIZE(BO)
  903. LFD f16, 2 * SIZE(AO)
  904. LFD f17, 3 * SIZE(AO)
  905. addi AO, AO, 2 * SIZE
  906. addi BO, BO, 4 * SIZE
  907. bdnz LL(26)
  908. .align 4
  909. LL(27):
  910. #if defined(NN) || defined(NT) || defined(TN) || defined(TT) || \
  911. defined(CC) || defined(CR) || defined(RC) || defined(RR)
  912. FSUB f0, f0, f5
  913. FADD f1, f1, f4
  914. FSUB f2, f2, f7
  915. FADD f3, f3, f6
  916. #elif defined(CN) || defined(CT) || defined(RN) || defined(RT)
  917. FADD f0, f0, f5
  918. FSUB f1, f4, f1
  919. FADD f2, f2, f7
  920. FSUB f3, f6, f3
  921. #else /* defined(NC) || defined(TC) || defined(NR) || defined(TR) */
  922. FADD f0, f0, f5
  923. FSUB f1, f1, f4
  924. FADD f2, f2, f7
  925. FSUB f3, f3, f6
  926. #endif
  927. #ifndef TRMMKERNEL
  928. LFD f16, 0 * SIZE(CO1)
  929. LFD f17, 1 * SIZE(CO1)
  930. LFD f18, 0 * SIZE(CO2)
  931. LFD f19, 1 * SIZE(CO2)
  932. #endif
  933. #if defined(NN) || defined(NT) || defined(TN) || defined(TT)
  934. #ifndef TRMMKERNEL
  935. FMADD f16, f30, f0, f16
  936. FMADD f17, f30, f1, f17
  937. FMADD f18, f30, f2, f18
  938. FMADD f19, f30, f3, f19
  939. #else
  940. FMUL f16, f30, f0
  941. FMUL f17, f30, f1
  942. FMUL f18, f30, f2
  943. FMUL f19, f30, f3
  944. #endif
  945. FNMSUB f16, f31, f1, f16
  946. FMADD f17, f31, f0, f17
  947. FNMSUB f18, f31, f3, f18
  948. FMADD f19, f31, f2, f19
  949. #else /* defined(CN)||defined(CT)||defined(NC)||defined(TC)||defined(CC) */
  950. /* defined(RN)||defined(RT)||defined(NR)||defined(TR)||defined(CR) */
  951. /* defined(RC)|| defined(RR) */
  952. #ifndef TRMMKERNEL
  953. FMADD f16, f30, f0, f16
  954. FNMSUB f17, f30, f1, f17
  955. FMADD f18, f30, f2, f18
  956. FNMSUB f19, f30, f3, f19
  957. FMADD f16, f31, f1, f16
  958. FMADD f17, f31, f0, f17
  959. FMADD f18, f31, f3, f18
  960. FMADD f19, f31, f2, f19
  961. #else
  962. FMUL f16, f30, f0
  963. FMUL f17, f30, f1
  964. FMUL f18, f30, f2
  965. FMUL f19, f30, f3
  966. FMADD f16, f31, f1, f16
  967. FNMADD f17, f31, f0, f17
  968. FMADD f18, f31, f3, f18
  969. FNMADD f19, f31, f2, f19
  970. #endif
  971. #endif
  972. STFD f16, 0 * SIZE(CO1)
  973. STFD f17, 1 * SIZE(CO1)
  974. STFD f18, 0 * SIZE(CO2)
  975. STFD f19, 1 * SIZE(CO2)
  976. addi CO1, CO1, 2 * SIZE
  977. addi CO2, CO2, 2 * SIZE
  978. #ifdef TRMMKERNEL
  979. #if ( defined(LEFT) && defined(TRANSA)) || \
  980. (!defined(LEFT) && !defined(TRANSA))
  981. sub TEMP, K, KK
  982. #ifdef LEFT
  983. addi TEMP, TEMP, -1
  984. #else
  985. addi TEMP, TEMP, -2
  986. #endif
  987. slwi r0, TEMP, 0 + ZBASE_SHIFT
  988. slwi TEMP, TEMP, 1 + ZBASE_SHIFT
  989. add AO, AO, r0
  990. add BO, BO, TEMP
  991. #endif
  992. #ifdef LEFT
  993. addi KK, KK, 1
  994. #endif
  995. #endif
  996. .align 4
  997. LL(29):
  998. #if defined(TRMMKERNEL) && !defined(LEFT)
  999. addi KK, KK, 2
  1000. #endif
  1001. mr B, BO
  1002. addic. J, J, -1
  1003. lfs f0, FZERO
  1004. bgt LL(10)
  1005. .align 4
  1006. LL(30):
  1007. andi. J, N, 1
  1008. ble LL(999)
  1009. #if defined(TRMMKERNEL) && defined(LEFT)
  1010. mr KK, OFFSET
  1011. #endif
  1012. srawi. I, M, 1
  1013. mr CO1, C
  1014. add C, C, LDC
  1015. mr AO, A
  1016. ble LL(40)
  1017. .align 4
  1018. LL(31):
  1019. #ifndef TRMMKERNEL
  1020. LFD f20, 0 * SIZE(AO)
  1021. LFD f21, 1 * SIZE(AO)
  1022. LFD f22, 2 * SIZE(AO)
  1023. LFD f23, 3 * SIZE(AO)
  1024. LFD f24, 4 * SIZE(AO)
  1025. LFD f25, 5 * SIZE(AO)
  1026. LFD f26, 6 * SIZE(AO)
  1027. LFD f27, 7 * SIZE(AO)
  1028. LFD f16, 0 * SIZE(B)
  1029. LFD f17, 1 * SIZE(B)
  1030. LFD f18, 2 * SIZE(B)
  1031. LFD f19, 3 * SIZE(B)
  1032. lfs f0, FZERO
  1033. fmr f1, f0
  1034. fmr f2, f0
  1035. fmr f3, f0
  1036. fmr f4, f0
  1037. fmr f5, f0
  1038. fmr f6, f0
  1039. fmr f7, f0
  1040. srawi. r0, K, 2
  1041. mr BO, B
  1042. mtspr CTR, r0
  1043. ble LL(35)
  1044. #else
  1045. #if (defined(TRMMKERNEL) && defined(LEFT) && defined(TRANSA)) || \
  1046. (defined(TRMMKERNEL) && !defined(LEFT) && !defined(TRANSA))
  1047. LFD f20, 0 * SIZE(AO)
  1048. LFD f21, 1 * SIZE(AO)
  1049. LFD f22, 2 * SIZE(AO)
  1050. LFD f23, 3 * SIZE(AO)
  1051. LFD f24, 4 * SIZE(AO)
  1052. LFD f25, 5 * SIZE(AO)
  1053. LFD f26, 6 * SIZE(AO)
  1054. LFD f27, 7 * SIZE(AO)
  1055. LFD f16, 0 * SIZE(B)
  1056. LFD f17, 1 * SIZE(B)
  1057. LFD f18, 2 * SIZE(B)
  1058. LFD f19, 3 * SIZE(B)
  1059. lfs f0, FZERO
  1060. fmr f1, f0
  1061. fmr f2, f0
  1062. fmr f3, f0
  1063. fmr f4, f0
  1064. fmr f5, f0
  1065. fmr f6, f0
  1066. fmr f7, f0
  1067. mr BO, B
  1068. #else
  1069. slwi r0, KK, 1 + ZBASE_SHIFT
  1070. slwi TEMP, KK, 0 + ZBASE_SHIFT
  1071. add AO, AO, r0
  1072. add BO, B, TEMP
  1073. LFD f20, 0 * SIZE(AO)
  1074. LFD f21, 1 * SIZE(AO)
  1075. LFD f22, 2 * SIZE(AO)
  1076. LFD f23, 3 * SIZE(AO)
  1077. LFD f24, 4 * SIZE(AO)
  1078. LFD f25, 5 * SIZE(AO)
  1079. LFD f26, 6 * SIZE(AO)
  1080. LFD f27, 7 * SIZE(AO)
  1081. LFD f16, 0 * SIZE(BO)
  1082. LFD f17, 1 * SIZE(BO)
  1083. LFD f18, 2 * SIZE(BO)
  1084. LFD f19, 3 * SIZE(BO)
  1085. lfs f0, FZERO
  1086. fmr f1, f0
  1087. fmr f2, f0
  1088. fmr f3, f0
  1089. fmr f4, f0
  1090. fmr f5, f0
  1091. fmr f6, f0
  1092. fmr f7, f0
  1093. #endif
  1094. DCBTST(CO1, PREC)
  1095. #if (defined(LEFT) && !defined(TRANSA)) || (!defined(LEFT) && defined(TRANSA))
  1096. sub TEMP, K, KK
  1097. #elif defined(LEFT)
  1098. addi TEMP, KK, 2
  1099. #else
  1100. addi TEMP, KK, 1
  1101. #endif
  1102. srawi. TEMP, TEMP, 2
  1103. mtspr CTR, TEMP
  1104. ble LL(35)
  1105. #endif
  1106. .align 4
  1107. LL(32):
  1108. fmadd f0, f16, f20, f0
  1109. fmadd f1, f16, f21, f1
  1110. fmadd f2, f16, f22, f2
  1111. fmadd f3, f16, f23, f3
  1112. fmadd f4, f17, f20, f4
  1113. fmadd f5, f17, f21, f5
  1114. fmadd f6, f17, f22, f6
  1115. fmadd f7, f17, f23, f7
  1116. LFD f20, 8 * SIZE(AO)
  1117. LFD f21, 9 * SIZE(AO)
  1118. LFD f22, 10 * SIZE(AO)
  1119. LFD f23, 11 * SIZE(AO)
  1120. fmadd f0, f18, f24, f0
  1121. fmadd f1, f18, f25, f1
  1122. fmadd f2, f18, f26, f2
  1123. fmadd f3, f18, f27, f3
  1124. fmadd f4, f19, f24, f4
  1125. fmadd f5, f19, f25, f5
  1126. fmadd f6, f19, f26, f6
  1127. fmadd f7, f19, f27, f7
  1128. LFD f24, 12 * SIZE(AO)
  1129. LFD f25, 13 * SIZE(AO)
  1130. LFD f26, 14 * SIZE(AO)
  1131. LFD f27, 15 * SIZE(AO)
  1132. LFD f16, 4 * SIZE(BO)
  1133. LFD f17, 5 * SIZE(BO)
  1134. LFD f18, 6 * SIZE(BO)
  1135. LFD f19, 7 * SIZE(BO)
  1136. fmadd f0, f16, f20, f0
  1137. fmadd f1, f16, f21, f1
  1138. fmadd f2, f16, f22, f2
  1139. fmadd f3, f16, f23, f3
  1140. fmadd f4, f17, f20, f4
  1141. fmadd f5, f17, f21, f5
  1142. fmadd f6, f17, f22, f6
  1143. fmadd f7, f17, f23, f7
  1144. LFD f20, 16 * SIZE(AO)
  1145. LFD f21, 17 * SIZE(AO)
  1146. LFD f22, 18 * SIZE(AO)
  1147. LFD f23, 19 * SIZE(AO)
  1148. fmadd f0, f18, f24, f0
  1149. fmadd f1, f18, f25, f1
  1150. fmadd f2, f18, f26, f2
  1151. fmadd f3, f18, f27, f3
  1152. fmadd f4, f19, f24, f4
  1153. fmadd f5, f19, f25, f5
  1154. fmadd f6, f19, f26, f6
  1155. fmadd f7, f19, f27, f7
  1156. LFD f24, 20 * SIZE(AO)
  1157. LFD f25, 21 * SIZE(AO)
  1158. LFD f26, 22 * SIZE(AO)
  1159. LFD f27, 23 * SIZE(AO)
  1160. LFD f16, 8 * SIZE(BO)
  1161. LFD f17, 9 * SIZE(BO)
  1162. LFD f18, 10 * SIZE(BO)
  1163. LFD f19, 11 * SIZE(BO)
  1164. addi AO, AO, 16 * SIZE
  1165. addi BO, BO, 8 * SIZE
  1166. DCBT(AO, PREA)
  1167. DCBT(BO, PREB)
  1168. bdnz LL(32)
  1169. .align 4
  1170. LL(35):
  1171. #ifndef TRMMKERNEL
  1172. andi. r0, K, 3
  1173. lfd f30, ALPHA_R
  1174. lfd f31, ALPHA_I
  1175. mtspr CTR, r0
  1176. ble LL(37)
  1177. #else
  1178. #if (defined(LEFT) && !defined(TRANSA)) || (!defined(LEFT) && defined(TRANSA))
  1179. sub TEMP, K, KK
  1180. #elif defined(LEFT)
  1181. addi TEMP, KK, 2
  1182. #else
  1183. addi TEMP, KK, 1
  1184. #endif
  1185. andi. TEMP, TEMP, 3
  1186. lfd f30, ALPHA_R
  1187. lfd f31, ALPHA_I
  1188. mtspr CTR, TEMP
  1189. ble LL(37)
  1190. #endif
  1191. .align 4
  1192. LL(36):
  1193. fmadd f0, f16, f20, f0
  1194. fmadd f1, f16, f21, f1
  1195. fmadd f2, f16, f22, f2
  1196. fmadd f3, f16, f23, f3
  1197. fmadd f4, f17, f20, f4
  1198. fmadd f5, f17, f21, f5
  1199. fmadd f6, f17, f22, f6
  1200. fmadd f7, f17, f23, f7
  1201. LFD f20, 4 * SIZE(AO)
  1202. LFD f21, 5 * SIZE(AO)
  1203. LFD f22, 6 * SIZE(AO)
  1204. LFD f23, 7 * SIZE(AO)
  1205. LFD f16, 2 * SIZE(BO)
  1206. LFD f17, 3 * SIZE(BO)
  1207. addi BO, BO, 2 * SIZE
  1208. addi AO, AO, 4 * SIZE
  1209. bdnz LL(36)
  1210. .align 4
  1211. LL(37):
  1212. #if defined(NN) || defined(NT) || defined(TN) || defined(TT) || \
  1213. defined(CC) || defined(CR) || defined(RC) || defined(RR)
  1214. FSUB f0, f0, f5
  1215. FADD f1, f1, f4
  1216. FSUB f2, f2, f7
  1217. FADD f3, f3, f6
  1218. #elif defined(CN) || defined(CT) || defined(RN) || defined(RT)
  1219. FADD f0, f0, f5
  1220. FSUB f1, f1, f4
  1221. FADD f2, f2, f7
  1222. FSUB f3, f3, f6
  1223. #else /* defined(NC) || defined(TC) || defined(NR) || defined(TR) */
  1224. FADD f0, f0, f5
  1225. FSUB f1, f4, f1
  1226. FADD f2, f2, f7
  1227. FSUB f3, f6, f3
  1228. #endif
  1229. #ifndef TRMMKERNEL
  1230. LFD f16, 0 * SIZE(CO1)
  1231. LFD f17, 1 * SIZE(CO1)
  1232. LFD f18, 2 * SIZE(CO1)
  1233. LFD f19, 3 * SIZE(CO1)
  1234. #endif
  1235. #if defined(NN) || defined(NT) || defined(TN) || defined(TT)
  1236. #ifndef TRMMKERNEL
  1237. FMADD f16, f30, f0, f16
  1238. FMADD f17, f30, f1, f17
  1239. FMADD f18, f30, f2, f18
  1240. FMADD f19, f30, f3, f19
  1241. #else
  1242. FMUL f16, f30, f0
  1243. FMUL f17, f30, f1
  1244. FMUL f18, f30, f2
  1245. FMUL f19, f30, f3
  1246. #endif
  1247. FNMSUB f16, f31, f1, f16
  1248. FMADD f17, f31, f0, f17
  1249. FNMSUB f18, f31, f3, f18
  1250. FMADD f19, f31, f2, f19
  1251. #else /* defined(CN)||defined(CT)||defined(NC)||defined(TC)||defined(CC) */
  1252. /* defined(RN)||defined(RT)||defined(NR)||defined(TR)||defined(CR) */
  1253. /* defined(RC)|| defined(RR) */
  1254. #ifndef TRMMKERNEL
  1255. FMADD f16, f30, f0, f16
  1256. FNMSUB f17, f30, f1, f17
  1257. FMADD f18, f30, f2, f18
  1258. FNMSUB f19, f30, f3, f19
  1259. FMADD f16, f31, f1, f16
  1260. FMADD f17, f31, f0, f17
  1261. FMADD f18, f31, f3, f18
  1262. FMADD f19, f31, f2, f19
  1263. #else
  1264. FMUL f16, f30, f0
  1265. FMUL f17, f30, f1
  1266. FMUL f18, f30, f2
  1267. FMUL f19, f30, f3
  1268. FMADD f16, f31, f1, f16
  1269. FNMADD f17, f31, f0, f17
  1270. FMADD f18, f31, f3, f18
  1271. FNMADD f19, f31, f2, f19
  1272. #endif
  1273. #endif
  1274. STFD f16, 0 * SIZE(CO1)
  1275. STFD f17, 1 * SIZE(CO1)
  1276. STFD f18, 2 * SIZE(CO1)
  1277. STFD f19, 3 * SIZE(CO1)
  1278. addi CO1, CO1, 4 * SIZE
  1279. #ifdef TRMMKERNEL
  1280. #if ( defined(LEFT) && defined(TRANSA)) || \
  1281. (!defined(LEFT) && !defined(TRANSA))
  1282. sub TEMP, K, KK
  1283. #ifdef LEFT
  1284. addi TEMP, TEMP, -2
  1285. #else
  1286. addi TEMP, TEMP, -1
  1287. #endif
  1288. slwi r0, TEMP, 1 + ZBASE_SHIFT
  1289. slwi TEMP, TEMP, 0 + ZBASE_SHIFT
  1290. add AO, AO, r0
  1291. add BO, BO, TEMP
  1292. #endif
  1293. #ifdef LEFT
  1294. addi KK, KK, 2
  1295. #endif
  1296. #endif
  1297. addic. I, I, -1
  1298. bgt LL(31)
  1299. .align 4
  1300. LL(40):
  1301. andi. I, M, 1
  1302. ble LL(999)
  1303. #ifndef TRMMKERNEL
  1304. LFD f16, 0 * SIZE(AO)
  1305. LFD f17, 1 * SIZE(AO)
  1306. LFD f18, 2 * SIZE(AO)
  1307. LFD f19, 3 * SIZE(AO)
  1308. LFD f20, 0 * SIZE(B)
  1309. LFD f21, 1 * SIZE(B)
  1310. LFD f22, 2 * SIZE(B)
  1311. LFD f23, 3 * SIZE(B)
  1312. lfs f0, FZERO
  1313. fmr f1, f0
  1314. fmr f2, f0
  1315. fmr f3, f0
  1316. fmr f4, f0
  1317. fmr f5, f0
  1318. fmr f6, f0
  1319. fmr f7, f0
  1320. srawi. r0, K, 2
  1321. mr BO, B
  1322. mtspr CTR, r0
  1323. ble LL(45)
  1324. #else
  1325. #if (defined(TRMMKERNEL) && defined(LEFT) && defined(TRANSA)) || \
  1326. (defined(TRMMKERNEL) && !defined(LEFT) && !defined(TRANSA))
  1327. LFD f16, 0 * SIZE(AO)
  1328. LFD f17, 1 * SIZE(AO)
  1329. LFD f18, 2 * SIZE(AO)
  1330. LFD f19, 3 * SIZE(AO)
  1331. LFD f20, 0 * SIZE(B)
  1332. LFD f21, 1 * SIZE(B)
  1333. LFD f22, 2 * SIZE(B)
  1334. LFD f23, 3 * SIZE(B)
  1335. lfs f0, FZERO
  1336. fmr f1, f0
  1337. fmr f2, f0
  1338. fmr f3, f0
  1339. fmr f4, f0
  1340. fmr f5, f0
  1341. fmr f6, f0
  1342. fmr f7, f0
  1343. mr BO, B
  1344. #else
  1345. slwi r0, KK, 0 + ZBASE_SHIFT
  1346. slwi TEMP, KK, 0 + ZBASE_SHIFT
  1347. add AO, AO, r0
  1348. add BO, B, TEMP
  1349. LFD f16, 0 * SIZE(AO)
  1350. LFD f17, 1 * SIZE(AO)
  1351. LFD f18, 2 * SIZE(AO)
  1352. LFD f19, 3 * SIZE(AO)
  1353. LFD f20, 0 * SIZE(BO)
  1354. LFD f21, 1 * SIZE(BO)
  1355. LFD f22, 2 * SIZE(BO)
  1356. LFD f23, 3 * SIZE(BO)
  1357. lfs f0, FZERO
  1358. fmr f1, f0
  1359. fmr f2, f0
  1360. fmr f3, f0
  1361. fmr f4, f0
  1362. fmr f5, f0
  1363. fmr f6, f0
  1364. fmr f7, f0
  1365. #endif
  1366. #if (defined(LEFT) && !defined(TRANSA)) || (!defined(LEFT) && defined(TRANSA))
  1367. sub TEMP, K, KK
  1368. #elif defined(LEFT)
  1369. addi TEMP, KK, 1
  1370. #else
  1371. addi TEMP, KK, 1
  1372. #endif
  1373. srawi. TEMP, TEMP, 2
  1374. mtspr CTR, TEMP
  1375. ble LL(45)
  1376. #endif
  1377. .align 4
  1378. LL(42):
  1379. fmadd f0, f16, f20, f0
  1380. fmadd f1, f17, f21, f1
  1381. fmadd f2, f17, f20, f2
  1382. fmadd f3, f16, f21, f3
  1383. LFD f16, 4 * SIZE(AO)
  1384. LFD f17, 5 * SIZE(AO)
  1385. LFD f20, 4 * SIZE(BO)
  1386. LFD f21, 5 * SIZE(BO)
  1387. fmadd f4, f18, f22, f4
  1388. fmadd f5, f19, f23, f5
  1389. fmadd f6, f19, f22, f6
  1390. fmadd f7, f18, f23, f7
  1391. LFD f18, 6 * SIZE(AO)
  1392. LFD f19, 7 * SIZE(AO)
  1393. LFD f22, 6 * SIZE(BO)
  1394. LFD f23, 7 * SIZE(BO)
  1395. fmadd f0, f16, f20, f0
  1396. fmadd f1, f17, f21, f1
  1397. fmadd f2, f17, f20, f2
  1398. fmadd f3, f16, f21, f3
  1399. LFD f16, 8 * SIZE(AO)
  1400. LFD f17, 9 * SIZE(AO)
  1401. LFD f20, 8 * SIZE(BO)
  1402. LFD f21, 9 * SIZE(BO)
  1403. fmadd f4, f18, f22, f4
  1404. fmadd f5, f19, f23, f5
  1405. fmadd f6, f19, f22, f6
  1406. fmadd f7, f18, f23, f7
  1407. LFD f18, 10 * SIZE(AO)
  1408. LFD f19, 11 * SIZE(AO)
  1409. LFD f22, 10 * SIZE(BO)
  1410. LFD f23, 11 * SIZE(BO)
  1411. addi AO, AO, 8 * SIZE
  1412. addi BO, BO, 8 * SIZE
  1413. bdnz LL(42)
  1414. .align 4
  1415. LL(45):
  1416. fadd f0, f0, f4
  1417. fadd f1, f1, f5
  1418. fadd f2, f2, f6
  1419. fadd f3, f3, f7
  1420. #ifndef TRMMKERNEL
  1421. andi. r0, K, 3
  1422. lfd f30, ALPHA_R
  1423. lfd f31, ALPHA_I
  1424. mtspr CTR,r0
  1425. ble LL(47)
  1426. #else
  1427. #if (defined(LEFT) && !defined(TRANSA)) || (!defined(LEFT) && defined(TRANSA))
  1428. sub TEMP, K, KK
  1429. #elif defined(LEFT)
  1430. addi TEMP, KK, 1
  1431. #else
  1432. addi TEMP, KK, 1
  1433. #endif
  1434. andi. TEMP, TEMP, 3
  1435. lfd f30, ALPHA_R
  1436. lfd f31, ALPHA_I
  1437. mtspr CTR,TEMP
  1438. ble LL(47)
  1439. #endif
  1440. .align 4
  1441. LL(46):
  1442. fmadd f0, f16, f20, f0
  1443. fmadd f1, f17, f21, f1
  1444. fmadd f2, f17, f20, f2
  1445. fmadd f3, f16, f21, f3
  1446. LFD f16, 2 * SIZE(AO)
  1447. LFD f17, 3 * SIZE(AO)
  1448. LFD f20, 2 * SIZE(BO)
  1449. LFD f21, 3 * SIZE(BO)
  1450. addi AO, AO, 2 * SIZE
  1451. addi BO, BO, 2 * SIZE
  1452. bdnz LL(46)
  1453. .align 4
  1454. LL(47):
  1455. #if defined(NN) || defined(NT) || defined(TN) || defined(TT) || \
  1456. defined(CC) || defined(CR) || defined(RC) || defined(RR)
  1457. fsub f0, f0, f1
  1458. fadd f2, f2, f3
  1459. #elif defined(CN) || defined(CT) || defined(RN) || defined(RT)
  1460. fadd f0, f0, f1
  1461. fsub f2, f2, f3
  1462. #else
  1463. fadd f0, f0, f1
  1464. fsub f2, f3, f2
  1465. #endif
  1466. #ifndef TRMMKERNEL
  1467. LFD f16, 0 * SIZE(CO1)
  1468. LFD f17, 1 * SIZE(CO1)
  1469. #endif
  1470. #if defined(NN) || defined(NT) || defined(TN) || defined(TT)
  1471. #ifndef TRMMKERNEL
  1472. FMADD f16, f30, f0, f16
  1473. FMADD f17, f30, f2, f17
  1474. #else
  1475. FMUL f16, f30, f0
  1476. FMUL f17, f30, f2
  1477. #endif
  1478. FNMSUB f16, f31, f2, f16
  1479. FMADD f17, f31, f0, f17
  1480. #else /* defined(CN)||defined(CT)||defined(NC)||defined(TC)||defined(CC) */
  1481. /* defined(RN)||defined(RT)||defined(NR)||defined(TR)||defined(CR) */
  1482. /* defined(RC) || defined(RR) */
  1483. #ifndef TRMMKERNEL
  1484. FMADD f16, f30, f0, f16
  1485. FNMSUB f17, f30, f2, f17
  1486. FMADD f16, f31, f2, f16
  1487. FMADD f17, f31, f0, f17
  1488. #else
  1489. FMUL f16, f30, f0
  1490. FMUL f17, f30, f2
  1491. FMADD f16, f31, f2, f16
  1492. FNMADD f17, f31, f0, f17
  1493. #endif
  1494. #endif
  1495. STFD f16, 0 * SIZE(CO1)
  1496. STFD f17, 1 * SIZE(CO1)
  1497. .align 4
  1498. LL(999):
  1499. addi r3, 0, 0
  1500. lfd f14, 0(SP)
  1501. lfd f15, 8(SP)
  1502. lfd f16, 16(SP)
  1503. lfd f17, 24(SP)
  1504. lfd f18, 32(SP)
  1505. lfd f19, 40(SP)
  1506. lfd f20, 48(SP)
  1507. lfd f21, 56(SP)
  1508. lfd f22, 64(SP)
  1509. lfd f23, 72(SP)
  1510. lfd f24, 80(SP)
  1511. lfd f25, 88(SP)
  1512. lfd f26, 96(SP)
  1513. lfd f27, 104(SP)
  1514. lfd f28, 112(SP)
  1515. lfd f29, 120(SP)
  1516. lfd f30, 128(SP)
  1517. lfd f31, 136(SP)
  1518. #ifdef __64BIT__
  1519. ld r31, 144(SP)
  1520. ld r30, 152(SP)
  1521. ld r29, 160(SP)
  1522. ld r28, 168(SP)
  1523. ld r27, 176(SP)
  1524. ld r26, 184(SP)
  1525. ld r25, 192(SP)
  1526. ld r24, 200(SP)
  1527. #ifdef TRMMKERNEL
  1528. ld r23, 208(SP)
  1529. ld r22, 216(SP)
  1530. #endif
  1531. #else
  1532. lwz r31, 144(SP)
  1533. lwz r30, 148(SP)
  1534. lwz r29, 152(SP)
  1535. lwz r28, 156(SP)
  1536. lwz r27, 160(SP)
  1537. lwz r26, 164(SP)
  1538. lwz r25, 168(SP)
  1539. lwz r24, 172(SP)
  1540. #ifdef TRMMKERNEL
  1541. lwz r23, 176(SP)
  1542. lwz r22, 180(SP)
  1543. #endif
  1544. #endif
  1545. addi SP, SP, STACKSIZE
  1546. blr
  1547. EPILOGUE
  1548. #endif