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trsm_kernel_power6_RT.S 63 kB

rebase? (#1) * With the Intel compiler on Linux, prefer ifort for the final link step icc has known problems with mixed-language builds that ifort can handle just fine. Fixes #1956 * Rename operands to put lda on the input/output constraint list * Fix wrong constraints in inline assembly for #2009 * Fix inline assembly constraints rework indices to allow marking argument lda4 as input and output. For #2009 * Fix inline assembly constraints rework indices to allow marking argument lda as input and output. * Fix inline assembly constraints * Fix inline assembly constraints * Fix inline assembly constraints in Bulldozer TRSM kernels rework indices to allow marking i,as and bs as both input and output (marked operand n1 as well for simplicity). For #2009 * Correct range_n limiting same bug as seen in #1388, somehow missed in corresponding PR #1389 * Allow multithreading TRMV again revert workaround introduced for issue #1332 as the actual cause appears to be my incorrect fix from #1262 (see #1388) * Fix error introduced during cleanup * Reduce list of kernels in the dynamic arch build to make compilation complete reliably within the 1h limit again * init * move fix to right place * Fix missing -c option in AVX512 test * Fix AVX512 test always returning false due to missing compiler option * Make x86_32 imply NO_AVX2, NO_AVX512 in addition to NO_AVX fixes #2033 * Keep xcode8.3 for osx BINARY=32 build as xcode10 deprecated i386 * Make sure that AVX512 is disabled in 32bit builds for #2033 * Improve handling of NO_STATIC and NO_SHARED to avoid surprises from defining either as zero. Fixes #2035 by addressing some concerns from #1422 * init * address warning introed with #1814 et al * Restore locking optimizations for OpenMP case restore another accidentally dropped part of #1468 that was missed in #2004 to address performance regression reported in #1461 * HiSilicon tsv110 CPUs optimization branch add HiSilicon tsv110 CPUs optimization branch * add TARGET support for HiSilicon tsv110 CPUs * add TARGET support for HiSilicon tsv110 CPUs * add TARGET support for HiSilicon tsv110 CPUs * Fix module definition conflicts between LAPACK and ReLAPACK for #2043 * Do not compile in AVX512 check if AVX support is disabled xgetbv is function depends on NO_AVX being undefined - we could change that too, but that combo is unlikely to work anyway * ctest.c : add __POWERPC__ for PowerMac * Fix crash in sgemm SSE/nano kernel on x86_64 Fix bug #2047. Signed-off-by: Celelibi <celelibi@gmail.com> * param.h : enable defines for PPC970 on DarwinOS fixes: gemm.c: In function 'sgemm_': ../common_param.h:981:18: error: 'SGEMM_DEFAULT_P' undeclared (first use in this function) #define SGEMM_P SGEMM_DEFAULT_P ^ * common_power.h: force DCBT_ARG 0 on PPC970 Darwin without this, we see ../kernel/power/gemv_n.S:427:Parameter syntax error and many more similar entries that relates to this assembly command dcbt 8, r24, r18 this change makes the DCBT_ARG = 0 and openblas builds through to completion on PowerMac 970 Tests pass * Make TARGET=GENERIC compatible with DYNAMIC_ARCH=1 for issue #2048 * make DYNAMIC_ARCH=1 package work on TSV110. * make DYNAMIC_ARCH=1 package work on TSV110 * Add Intel Denverton for #2048 * Add Intel Denverton * Change 64-bit detection as explained in #2056 * Trivial typo fix as suggested in #2022 * Disable the AVX512 DGEMM kernel (again) Due to as yet unresolved errors seen in #1955 and #2029 * Use POSIX getenv on Cygwin The Windows-native GetEnvironmentVariable cannot be relied on, as Cygwin does not always copy environment variables set through Cygwin to the Windows environment block, particularly after fork(). * Fix for #2063: The DllMain used in Cygwin did not run the thread memory pool cleanup upon THREAD_DETACH which is needed when compiled with USE_TLS=1. * Also call CloseHandle on each thread, as well as on the event so as to not leak thread handles. * AIX asm syntax changes needed for shared object creation * power9 makefile. dgemm based on power8 kernel with following changes : 32x unrolled 16x4 kernel and 8x4 kernel using (lxv stxv butterfly rank1 update). improvement from 17 to 22-23gflops. dtrmm cases were added into dgemm itself * Expose CBLAS interfaces for I?MIN and I?MAX * Build CBLAS interfaces for I?MIN and I?MAX * Add declarations for ?sum and cblas_?sum * Add interface for ?sum (derived from ?asum) * Add ?sum * Add implementations of ssum/dsum and csum/zsum as trivial copies of asum/zsasum with the fabs calls replaced by fmov to preserve code structure * Add ARM implementations of ?sum (trivial copies of the respective ?asum with the fabs calls removed) * Add ARM64 implementations of ?sum as trivial copies of the respective ?asum kernels with the fabs calls removed * Add ia64 implementation of ?sum as trivial copy of asum with the fabs calls removed * Add MIPS implementation of ?sum as trivial copy of ?asum with the fabs calls removed * Add MIPS64 implementation of ?sum as trivial copy of ?asum with the fabs replaced by mov to preserve code structure * Add POWER implementation of ?sum as trivial copy of ?asum with the fabs replaced by fmr to preserve code structure * Add SPARC implementation of ?sum as trivial copy of ?asum with the fabs replaced by fmov to preserve code structure * Add x86 implementation of ?sum as trivial copy of ?asum with the fabs calls removed * Add x86_64 implementation of ?sum as trivial copy of ?asum with the fabs calls removed * Add ZARCH implementation of ?sum as trivial copies of the respective ?asum kernels with the ABS and vflpsb calls removed * Detect 32bit environment on 64bit ARM hardware for #2056, using same approach as #2058 * Add cmake defaults for ?sum kernels * Add ?sum * Add ?sum definitions for generic kernel * Add declarations for ?sum * Add -lm and disable EXPRECISION support on *BSD fixes #2075 * Add in runtime CPU detection for POWER. * snprintf define consolidated to common.h * Support INTERFACE64=1 * Add support for INTERFACE64 and fix XERBLA calls 1. Replaced all instances of "int" with "blasint" 2. Added string length as "hidden" third parameter in calls to fortran XERBLA * Correct length of name string in xerbla call * Avoid out-of-bounds accesses in LAPACK EIG tests see https://github.com/Reference-LAPACK/lapack/issues/333 * Correct INFO=4 condition * Disable reallocation of work array in xSYTRF as it appears to cause memory management problems (seen in the LAPACK tests) * Disable repeated recursion on Ab_BR in ReLAPACK xGBTRF due to crashes in LAPACK tests * sgemm/strmm * Update Changelog with changes from 0.3.6 * Increment version to 0.3.7.dev * Increment version to 0.3.7.dev * Misc. typo fixes Found via `codespell -q 3 -w -L ith,als,dum,nd,amin,nto,wis,ba -S ./relapack,./kernel,./lapack-netlib` * Correct argument of CPU_ISSET for glibc <2.5 fixes #2104 * conflict resolve * Revert reference/ fixes * Revert Changelog.txt typos * Disable the SkyLakeX DGEMMITCOPY kernel as well as a stopgap measure for https://github.com/numpy/numpy/issues/13401 as mentioned in #1955 * Disable DGEMMINCOPY as well for now #1955 * init * Fix errors in cpu enumeration with glibc 2.6 for #2114 * Change two http links to https Closes #2109 * remove redundant code #2113 * Set up CI with Azure Pipelines [skip ci] * TST: add native POWER8 to CI * add native POWER8 testing to Travis CI matrix with ppc64le os entry * Update link to IBM MASS library, update cpu support status * first try migrating one of the arm builds from travis * fix tabbing in azure commands * Update azure-pipelines.yml take out offending lines (although stolen from https://github.com/conda-forge/opencv-feedstock azure-pipelines fiie) * Update azure-pipelines.yml * Update azure-pipelines.yml * Update azure-pipelines.yml * Update azure-pipelines.yml * DOC: Add Azure CI status badge * Add ARMV6 build to azure CI setup (#2122) using aytekinar's Alpine image and docker script from the Travis setup [skip ci] * TST: Azure manylinux1 & clean-up * remove some of the steps & comments from the original Azure yml template * modify the trigger section to use develop since OpenBLAS primarily uses this branch; use the same batching behavior as downstream projects NumPy/ SciPy * remove Travis emulated ARMv6 gcc build because this now happens in Azure * use documented Ubuntu vmImage name for Azure and add in a manylinux1 test run to the matrix [skip appveyor] * Add NO_AFFINITY to available options on Linux, and set it to ON to match the gmake default. Fixes second part of #2114 * Replace ISMIN and ISAMIN kernels on all x86_64 platforms (#2125) * Mark iamax_sse.S as unsuitable for MIN due to issue #2116 * Use iamax.S rather than iamax_sse.S for ISMIN/ISAMIN on all x86_64 as workaround for #2116 * Move ARMv8 gcc build from Travis to Azure * Move ARMv8 gcc build from Travis to Azure * Update .travis.yml * Test drone CI * install make * remove sudo * Install gcc * Install perl * Install gfortran and add a clang job * gfortran->gcc-gfortran * Switch to ubuntu and parallel jobs * apt update * Fix typo * update yes * no need of gcc in clang build * Add a cmake build as well * Add cmake builds and print options * build without lapack on cmake * parallel build * See if ubuntu 19.04 fixes the ICE * Remove qemu armv8 builds * arm32 build * Fix typo * TST: add SkylakeX AVX512 CI test * adapt the C-level reproducer code for some recent SkylakeX AVX512 kernel issues, provided by Isuru Fernando and modified by Martin Kroeker, for usage in the utest suite * add an Intel SDE SkylakeX emulation utest run to the Azure CI matrix; a custom Docker build was required because Ubuntu image provided by Azure does not support AVX512VL instructions * Add option USE_LOCKING for single-threaded build with locking support for calling from concurrent threads * Add option USE_LOCKING for single-threaded build with locking support * Add option USE_LOCKING for SMP-like locking in USE_THREAD=0 builds * Add option USE_LOCKING but keep default settings intact * Remove unrelated change * Do not try ancient PGI hacks with recent versions of that compiler should fix #2139 * Build and run utests in any case, they do their own checks for fortran availability * Add softfp support in min/max kernels fix for #1912 * Revert "Add softfp support in min/max kernels" * Separate implementations of AMAX and IAMAX on arm As noted in #1912 and comment on #1942, the combined implementation happens to "do the right thing" on hardfp, but cannot return both value and index on softfp where they would have to share the return register * Ensure correct output for DAMAX with softfp * Use generic kernels for complex (I)AMAX to support softfp * improved zgemm power9 based on power8 * upload thread safety test folder * hook up c++ thread safety test (main Makefile) * add c++ thread test option to Makefile.rule * Document NO_AVX512 for #2151 * sgemm pipeline improved, zgemm rewritten without inner packs, ABI lxvx v20 fixed with vs52 * Fix detection of AVX512 capable compilers in getarch 21eda8b5 introduced a check in getarch.c to test if the compiler is capable of AVX512. This check currently fails, since the used __AVX2__ macro is only defined if getarch itself was compiled with AVX2/AVX512 support. Make sure this is the case by building getarch with -march=native on x86_64. It is only supposed to run on the build host anyway. * c_check: Unlink correct file * power9 zgemm ztrmm optimized * conflict resolve * Add gfortran workaround for ABI violations in LAPACKE for #2154 (see gcc bug 90329) * Add gfortran workaround for ABI violations for #2154 (see gcc bug 90329) * Add gfortran workaround for potential ABI violation for #2154 * Update fc.cmake * Remove any inadvertent use of -march=native from DYNAMIC_ARCH builds from #2143, -march=native precludes use of more specific options like -march=skylake-avx512 in individual kernels, and defeats the purpose of dynamic arch anyway. * Avoid unintentional activation of TLS code via USE_TLS=0 fixes #2149 * Do not force gcc options on non-gcc compilers fixes compile failure with pgi 18.10 as reported on OpenBLAS-users * Update Makefile.x86_64 * Zero ecx with a mov instruction PGI assembler does not like the initialization in the constraints. * Fix mov syntax * new sgemm 8x16 * Update dtrmm_kernel_16x4_power8.S * PGI compiler does not like -march=native * Fix build on FreeBSD/powerpc64. Signed-off-by: Piotr Kubaj <pkubaj@anongoth.pl> * Fix build for PPC970 on FreeBSD pt. 1 FreeBSD needs DCBT_ARG=0 as well. * Fix build for PPC970 on FreeBSD pt.2 FreeBSD needs those macros too. * cgemm/ctrmm power9 * Utest needs CBLAS but not necessarily FORTRAN * Add mingw builds to Appveyor config * Add getarch flags to disable AVX on x86 (and other small fixes to match Makefile behaviour) * Make disabling DYNAMIC_ARCH on unsupported systems work needs to be unset in the cache for the change to have any effect * Mingw32 needs leading underscore on object names (also copy BUNDERSCORE settings for FORTRAN from the corresponding Makefile)
7 years ago
rebase? (#1) * With the Intel compiler on Linux, prefer ifort for the final link step icc has known problems with mixed-language builds that ifort can handle just fine. Fixes #1956 * Rename operands to put lda on the input/output constraint list * Fix wrong constraints in inline assembly for #2009 * Fix inline assembly constraints rework indices to allow marking argument lda4 as input and output. For #2009 * Fix inline assembly constraints rework indices to allow marking argument lda as input and output. * Fix inline assembly constraints * Fix inline assembly constraints * Fix inline assembly constraints in Bulldozer TRSM kernels rework indices to allow marking i,as and bs as both input and output (marked operand n1 as well for simplicity). For #2009 * Correct range_n limiting same bug as seen in #1388, somehow missed in corresponding PR #1389 * Allow multithreading TRMV again revert workaround introduced for issue #1332 as the actual cause appears to be my incorrect fix from #1262 (see #1388) * Fix error introduced during cleanup * Reduce list of kernels in the dynamic arch build to make compilation complete reliably within the 1h limit again * init * move fix to right place * Fix missing -c option in AVX512 test * Fix AVX512 test always returning false due to missing compiler option * Make x86_32 imply NO_AVX2, NO_AVX512 in addition to NO_AVX fixes #2033 * Keep xcode8.3 for osx BINARY=32 build as xcode10 deprecated i386 * Make sure that AVX512 is disabled in 32bit builds for #2033 * Improve handling of NO_STATIC and NO_SHARED to avoid surprises from defining either as zero. Fixes #2035 by addressing some concerns from #1422 * init * address warning introed with #1814 et al * Restore locking optimizations for OpenMP case restore another accidentally dropped part of #1468 that was missed in #2004 to address performance regression reported in #1461 * HiSilicon tsv110 CPUs optimization branch add HiSilicon tsv110 CPUs optimization branch * add TARGET support for HiSilicon tsv110 CPUs * add TARGET support for HiSilicon tsv110 CPUs * add TARGET support for HiSilicon tsv110 CPUs * Fix module definition conflicts between LAPACK and ReLAPACK for #2043 * Do not compile in AVX512 check if AVX support is disabled xgetbv is function depends on NO_AVX being undefined - we could change that too, but that combo is unlikely to work anyway * ctest.c : add __POWERPC__ for PowerMac * Fix crash in sgemm SSE/nano kernel on x86_64 Fix bug #2047. Signed-off-by: Celelibi <celelibi@gmail.com> * param.h : enable defines for PPC970 on DarwinOS fixes: gemm.c: In function 'sgemm_': ../common_param.h:981:18: error: 'SGEMM_DEFAULT_P' undeclared (first use in this function) #define SGEMM_P SGEMM_DEFAULT_P ^ * common_power.h: force DCBT_ARG 0 on PPC970 Darwin without this, we see ../kernel/power/gemv_n.S:427:Parameter syntax error and many more similar entries that relates to this assembly command dcbt 8, r24, r18 this change makes the DCBT_ARG = 0 and openblas builds through to completion on PowerMac 970 Tests pass * Make TARGET=GENERIC compatible with DYNAMIC_ARCH=1 for issue #2048 * make DYNAMIC_ARCH=1 package work on TSV110. * make DYNAMIC_ARCH=1 package work on TSV110 * Add Intel Denverton for #2048 * Add Intel Denverton * Change 64-bit detection as explained in #2056 * Trivial typo fix as suggested in #2022 * Disable the AVX512 DGEMM kernel (again) Due to as yet unresolved errors seen in #1955 and #2029 * Use POSIX getenv on Cygwin The Windows-native GetEnvironmentVariable cannot be relied on, as Cygwin does not always copy environment variables set through Cygwin to the Windows environment block, particularly after fork(). * Fix for #2063: The DllMain used in Cygwin did not run the thread memory pool cleanup upon THREAD_DETACH which is needed when compiled with USE_TLS=1. * Also call CloseHandle on each thread, as well as on the event so as to not leak thread handles. * AIX asm syntax changes needed for shared object creation * power9 makefile. dgemm based on power8 kernel with following changes : 32x unrolled 16x4 kernel and 8x4 kernel using (lxv stxv butterfly rank1 update). improvement from 17 to 22-23gflops. dtrmm cases were added into dgemm itself * Expose CBLAS interfaces for I?MIN and I?MAX * Build CBLAS interfaces for I?MIN and I?MAX * Add declarations for ?sum and cblas_?sum * Add interface for ?sum (derived from ?asum) * Add ?sum * Add implementations of ssum/dsum and csum/zsum as trivial copies of asum/zsasum with the fabs calls replaced by fmov to preserve code structure * Add ARM implementations of ?sum (trivial copies of the respective ?asum with the fabs calls removed) * Add ARM64 implementations of ?sum as trivial copies of the respective ?asum kernels with the fabs calls removed * Add ia64 implementation of ?sum as trivial copy of asum with the fabs calls removed * Add MIPS implementation of ?sum as trivial copy of ?asum with the fabs calls removed * Add MIPS64 implementation of ?sum as trivial copy of ?asum with the fabs replaced by mov to preserve code structure * Add POWER implementation of ?sum as trivial copy of ?asum with the fabs replaced by fmr to preserve code structure * Add SPARC implementation of ?sum as trivial copy of ?asum with the fabs replaced by fmov to preserve code structure * Add x86 implementation of ?sum as trivial copy of ?asum with the fabs calls removed * Add x86_64 implementation of ?sum as trivial copy of ?asum with the fabs calls removed * Add ZARCH implementation of ?sum as trivial copies of the respective ?asum kernels with the ABS and vflpsb calls removed * Detect 32bit environment on 64bit ARM hardware for #2056, using same approach as #2058 * Add cmake defaults for ?sum kernels * Add ?sum * Add ?sum definitions for generic kernel * Add declarations for ?sum * Add -lm and disable EXPRECISION support on *BSD fixes #2075 * Add in runtime CPU detection for POWER. * snprintf define consolidated to common.h * Support INTERFACE64=1 * Add support for INTERFACE64 and fix XERBLA calls 1. Replaced all instances of "int" with "blasint" 2. Added string length as "hidden" third parameter in calls to fortran XERBLA * Correct length of name string in xerbla call * Avoid out-of-bounds accesses in LAPACK EIG tests see https://github.com/Reference-LAPACK/lapack/issues/333 * Correct INFO=4 condition * Disable reallocation of work array in xSYTRF as it appears to cause memory management problems (seen in the LAPACK tests) * Disable repeated recursion on Ab_BR in ReLAPACK xGBTRF due to crashes in LAPACK tests * sgemm/strmm * Update Changelog with changes from 0.3.6 * Increment version to 0.3.7.dev * Increment version to 0.3.7.dev * Misc. typo fixes Found via `codespell -q 3 -w -L ith,als,dum,nd,amin,nto,wis,ba -S ./relapack,./kernel,./lapack-netlib` * Correct argument of CPU_ISSET for glibc <2.5 fixes #2104 * conflict resolve * Revert reference/ fixes * Revert Changelog.txt typos * Disable the SkyLakeX DGEMMITCOPY kernel as well as a stopgap measure for https://github.com/numpy/numpy/issues/13401 as mentioned in #1955 * Disable DGEMMINCOPY as well for now #1955 * init * Fix errors in cpu enumeration with glibc 2.6 for #2114 * Change two http links to https Closes #2109 * remove redundant code #2113 * Set up CI with Azure Pipelines [skip ci] * TST: add native POWER8 to CI * add native POWER8 testing to Travis CI matrix with ppc64le os entry * Update link to IBM MASS library, update cpu support status * first try migrating one of the arm builds from travis * fix tabbing in azure commands * Update azure-pipelines.yml take out offending lines (although stolen from https://github.com/conda-forge/opencv-feedstock azure-pipelines fiie) * Update azure-pipelines.yml * Update azure-pipelines.yml * Update azure-pipelines.yml * Update azure-pipelines.yml * DOC: Add Azure CI status badge * Add ARMV6 build to azure CI setup (#2122) using aytekinar's Alpine image and docker script from the Travis setup [skip ci] * TST: Azure manylinux1 & clean-up * remove some of the steps & comments from the original Azure yml template * modify the trigger section to use develop since OpenBLAS primarily uses this branch; use the same batching behavior as downstream projects NumPy/ SciPy * remove Travis emulated ARMv6 gcc build because this now happens in Azure * use documented Ubuntu vmImage name for Azure and add in a manylinux1 test run to the matrix [skip appveyor] * Add NO_AFFINITY to available options on Linux, and set it to ON to match the gmake default. Fixes second part of #2114 * Replace ISMIN and ISAMIN kernels on all x86_64 platforms (#2125) * Mark iamax_sse.S as unsuitable for MIN due to issue #2116 * Use iamax.S rather than iamax_sse.S for ISMIN/ISAMIN on all x86_64 as workaround for #2116 * Move ARMv8 gcc build from Travis to Azure * Move ARMv8 gcc build from Travis to Azure * Update .travis.yml * Test drone CI * install make * remove sudo * Install gcc * Install perl * Install gfortran and add a clang job * gfortran->gcc-gfortran * Switch to ubuntu and parallel jobs * apt update * Fix typo * update yes * no need of gcc in clang build * Add a cmake build as well * Add cmake builds and print options * build without lapack on cmake * parallel build * See if ubuntu 19.04 fixes the ICE * Remove qemu armv8 builds * arm32 build * Fix typo * TST: add SkylakeX AVX512 CI test * adapt the C-level reproducer code for some recent SkylakeX AVX512 kernel issues, provided by Isuru Fernando and modified by Martin Kroeker, for usage in the utest suite * add an Intel SDE SkylakeX emulation utest run to the Azure CI matrix; a custom Docker build was required because Ubuntu image provided by Azure does not support AVX512VL instructions * Add option USE_LOCKING for single-threaded build with locking support for calling from concurrent threads * Add option USE_LOCKING for single-threaded build with locking support * Add option USE_LOCKING for SMP-like locking in USE_THREAD=0 builds * Add option USE_LOCKING but keep default settings intact * Remove unrelated change * Do not try ancient PGI hacks with recent versions of that compiler should fix #2139 * Build and run utests in any case, they do their own checks for fortran availability * Add softfp support in min/max kernels fix for #1912 * Revert "Add softfp support in min/max kernels" * Separate implementations of AMAX and IAMAX on arm As noted in #1912 and comment on #1942, the combined implementation happens to "do the right thing" on hardfp, but cannot return both value and index on softfp where they would have to share the return register * Ensure correct output for DAMAX with softfp * Use generic kernels for complex (I)AMAX to support softfp * improved zgemm power9 based on power8 * upload thread safety test folder * hook up c++ thread safety test (main Makefile) * add c++ thread test option to Makefile.rule * Document NO_AVX512 for #2151 * sgemm pipeline improved, zgemm rewritten without inner packs, ABI lxvx v20 fixed with vs52 * Fix detection of AVX512 capable compilers in getarch 21eda8b5 introduced a check in getarch.c to test if the compiler is capable of AVX512. This check currently fails, since the used __AVX2__ macro is only defined if getarch itself was compiled with AVX2/AVX512 support. Make sure this is the case by building getarch with -march=native on x86_64. It is only supposed to run on the build host anyway. * c_check: Unlink correct file * power9 zgemm ztrmm optimized * conflict resolve * Add gfortran workaround for ABI violations in LAPACKE for #2154 (see gcc bug 90329) * Add gfortran workaround for ABI violations for #2154 (see gcc bug 90329) * Add gfortran workaround for potential ABI violation for #2154 * Update fc.cmake * Remove any inadvertent use of -march=native from DYNAMIC_ARCH builds from #2143, -march=native precludes use of more specific options like -march=skylake-avx512 in individual kernels, and defeats the purpose of dynamic arch anyway. * Avoid unintentional activation of TLS code via USE_TLS=0 fixes #2149 * Do not force gcc options on non-gcc compilers fixes compile failure with pgi 18.10 as reported on OpenBLAS-users * Update Makefile.x86_64 * Zero ecx with a mov instruction PGI assembler does not like the initialization in the constraints. * Fix mov syntax * new sgemm 8x16 * Update dtrmm_kernel_16x4_power8.S * PGI compiler does not like -march=native * Fix build on FreeBSD/powerpc64. Signed-off-by: Piotr Kubaj <pkubaj@anongoth.pl> * Fix build for PPC970 on FreeBSD pt. 1 FreeBSD needs DCBT_ARG=0 as well. * Fix build for PPC970 on FreeBSD pt.2 FreeBSD needs those macros too. * cgemm/ctrmm power9 * Utest needs CBLAS but not necessarily FORTRAN * Add mingw builds to Appveyor config * Add getarch flags to disable AVX on x86 (and other small fixes to match Makefile behaviour) * Make disabling DYNAMIC_ARCH on unsupported systems work needs to be unset in the cache for the change to have any effect * Mingw32 needs leading underscore on object names (also copy BUNDERSCORE settings for FORTRAN from the corresponding Makefile)
7 years ago
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  1. /*********************************************************************/
  2. /* Copyright 2009, 2010 The University of Texas at Austin. */
  3. /* All rights reserved. */
  4. /* */
  5. /* Redistribution and use in source and binary forms, with or */
  6. /* without modification, are permitted provided that the following */
  7. /* conditions are met: */
  8. /* */
  9. /* 1. Redistributions of source code must retain the above */
  10. /* copyright notice, this list of conditions and the following */
  11. /* disclaimer. */
  12. /* */
  13. /* 2. Redistributions in binary form must reproduce the above */
  14. /* copyright notice, this list of conditions and the following */
  15. /* disclaimer in the documentation and/or other materials */
  16. /* provided with the distribution. */
  17. /* */
  18. /* THIS SOFTWARE IS PROVIDED BY THE UNIVERSITY OF TEXAS AT */
  19. /* AUSTIN ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, */
  20. /* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF */
  21. /* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE */
  22. /* DISCLAIMED. IN NO EVENT SHALL THE UNIVERSITY OF TEXAS AT */
  23. /* AUSTIN OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, */
  24. /* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES */
  25. /* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE */
  26. /* GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR */
  27. /* BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF */
  28. /* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT */
  29. /* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT */
  30. /* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE */
  31. /* POSSIBILITY OF SUCH DAMAGE. */
  32. /* */
  33. /* The views and conclusions contained in the software and */
  34. /* documentation are those of the authors and should not be */
  35. /* interpreted as representing official policies, either expressed */
  36. /* or implied, of The University of Texas at Austin. */
  37. /*********************************************************************/
  38. #define ASSEMBLER
  39. #include "common.h"
  40. #ifndef __64BIT__
  41. #define LOAD lwz
  42. #else
  43. #define LOAD ld
  44. #endif
  45. #ifdef __64BIT__
  46. #define STACKSIZE 320
  47. #define ALPHA 296(SP)
  48. #define FZERO 304(SP)
  49. #else
  50. #define STACKSIZE 240
  51. #define ALPHA 224(SP)
  52. #define FZERO 232(SP)
  53. #endif
  54. #define M r3
  55. #define N r4
  56. #define K r5
  57. #if defined(linux) || defined(__FreeBSD__)
  58. #ifndef __64BIT__
  59. #define A r6
  60. #define B r7
  61. #define C r8
  62. #define LDC r9
  63. #define OFFSET r10
  64. #else
  65. #define A r7
  66. #define B r8
  67. #define C r9
  68. #define LDC r10
  69. #define OFFSET r6
  70. #endif
  71. #endif
  72. #if defined(_AIX) || defined(__APPLE__)
  73. #if !defined(__64BIT__) && defined(DOUBLE)
  74. #define A r8
  75. #define B r9
  76. #define C r10
  77. #define LDC r7
  78. #define OFFSET r6
  79. #else
  80. #define A r7
  81. #define B r8
  82. #define C r9
  83. #define LDC r10
  84. #define OFFSET r6
  85. #endif
  86. #endif
  87. #define AORIG r18
  88. #define TEMP r19
  89. #define KK r20
  90. #define I r21
  91. #define J r22
  92. #define AO r23
  93. #define BO r24
  94. #define CO1 r25
  95. #define CO2 r26
  96. #define CO3 r27
  97. #define CO4 r28
  98. #define PREA r29
  99. #define PREC r31
  100. #ifndef NEEDPARAM
  101. PROLOGUE
  102. PROFCODE
  103. addi SP, SP, -STACKSIZE
  104. li r0, 0
  105. stfd f14, 0(SP)
  106. stfd f15, 8(SP)
  107. stfd f16, 16(SP)
  108. stfd f17, 24(SP)
  109. stfd f18, 32(SP)
  110. stfd f19, 40(SP)
  111. stfd f20, 48(SP)
  112. stfd f21, 56(SP)
  113. stfd f22, 64(SP)
  114. stfd f23, 72(SP)
  115. stfd f24, 80(SP)
  116. stfd f25, 88(SP)
  117. stfd f26, 96(SP)
  118. stfd f27, 104(SP)
  119. stfd f28, 112(SP)
  120. stfd f29, 120(SP)
  121. stfd f30, 128(SP)
  122. stfd f31, 136(SP)
  123. #ifdef __64BIT__
  124. std r31, 144(SP)
  125. std r30, 152(SP)
  126. std r29, 160(SP)
  127. std r28, 168(SP)
  128. std r27, 176(SP)
  129. std r26, 184(SP)
  130. std r25, 192(SP)
  131. std r24, 200(SP)
  132. std r23, 208(SP)
  133. std r22, 216(SP)
  134. std r21, 224(SP)
  135. std r20, 232(SP)
  136. std r19, 240(SP)
  137. std r18, 248(SP)
  138. #else
  139. stw r31, 144(SP)
  140. stw r30, 148(SP)
  141. stw r29, 152(SP)
  142. stw r28, 156(SP)
  143. stw r27, 160(SP)
  144. stw r26, 164(SP)
  145. stw r25, 168(SP)
  146. stw r24, 172(SP)
  147. stw r23, 176(SP)
  148. stw r22, 180(SP)
  149. stw r21, 184(SP)
  150. stw r20, 188(SP)
  151. stw r19, 192(SP)
  152. stw r18, 196(SP)
  153. #endif
  154. stw r0, FZERO
  155. #if defined(_AIX) || defined(__APPLE__)
  156. #if !defined(__64BIT__) && defined(DOUBLE)
  157. lwz LDC, FRAMESLOT(0) + STACKSIZE(SP)
  158. #endif
  159. #endif
  160. slwi LDC, LDC, BASE_SHIFT
  161. #if (defined(linux) || defined(__FreeBSD__)) && defined(__64BIT__)
  162. ld OFFSET, FRAMESLOT(0) + STACKSIZE(SP)
  163. #endif
  164. #if defined(_AIX) || defined(__APPLE__)
  165. #ifdef __64BIT__
  166. ld OFFSET, FRAMESLOT(0) + STACKSIZE(SP)
  167. #else
  168. #ifdef DOUBLE
  169. lwz OFFSET, FRAMESLOT(1) + STACKSIZE(SP)
  170. #else
  171. lwz OFFSET, FRAMESLOT(0) + STACKSIZE(SP)
  172. #endif
  173. #endif
  174. #endif
  175. #ifdef LN
  176. mullw r0, M, K
  177. slwi r0, r0, BASE_SHIFT
  178. add A, A, r0
  179. slwi r0, M, BASE_SHIFT
  180. add C, C, r0
  181. #endif
  182. #ifdef RN
  183. neg KK, OFFSET
  184. #endif
  185. #ifdef RT
  186. mullw r0, N, K
  187. slwi r0, r0, BASE_SHIFT
  188. add B, B, r0
  189. mullw r0, N, LDC
  190. add C, C, r0
  191. sub KK, N, OFFSET
  192. #endif
  193. cmpwi cr0, M, 0
  194. ble LL(999)
  195. cmpwi cr0, N, 0
  196. ble LL(999)
  197. cmpwi cr0, K, 0
  198. ble LL(999)
  199. li PREA, (16 * 3 * SIZE)
  200. li PREC, 4 * SIZE
  201. lfs f0, FZERO
  202. andi. J, N, 1
  203. ble LL(40)
  204. #ifdef RT
  205. slwi r0, K, 0 + BASE_SHIFT
  206. sub B, B, r0
  207. sub C, C, LDC
  208. #endif
  209. mr CO1, C
  210. #ifdef LN
  211. add KK, M, OFFSET
  212. #endif
  213. #ifdef LT
  214. mr KK, OFFSET
  215. #endif
  216. fmr f1, f0
  217. fmr f2, f0
  218. fmr f3, f0
  219. srawi. I, M, 2
  220. #if defined(LN) || defined(RT)
  221. mr AORIG, A
  222. #else
  223. mr AO, A
  224. #endif
  225. #ifndef RT
  226. add C, CO1, LDC
  227. #endif
  228. ble LL(80)
  229. .align 4
  230. LL(71):
  231. #if defined(LT) || defined(RN)
  232. LFD f16, 0 * SIZE(AO)
  233. LFD f17, 1 * SIZE(AO)
  234. LFD f18, 2 * SIZE(AO)
  235. LFD f19, 3 * SIZE(AO)
  236. LFD f20, 0 * SIZE(B)
  237. LFD f21, 1 * SIZE(B)
  238. LFD f22, 2 * SIZE(B)
  239. LFD f23, 3 * SIZE(B)
  240. dcbtst CO1, PREC
  241. srawi. r0, KK, 2
  242. mtspr CTR, r0
  243. mr BO, B
  244. #else
  245. #ifdef LN
  246. slwi r0, K, 2 + BASE_SHIFT
  247. sub AORIG, AORIG, r0
  248. #endif
  249. slwi r0, KK, 2 + BASE_SHIFT
  250. slwi TEMP, KK, 0 + BASE_SHIFT
  251. add AO, AORIG, r0
  252. add BO, B, TEMP
  253. sub TEMP, K, KK
  254. LFD f16, 0 * SIZE(AO)
  255. LFD f17, 1 * SIZE(AO)
  256. LFD f18, 2 * SIZE(AO)
  257. LFD f19, 3 * SIZE(AO)
  258. LFD f20, 0 * SIZE(BO)
  259. LFD f21, 1 * SIZE(BO)
  260. LFD f22, 2 * SIZE(BO)
  261. LFD f23, 3 * SIZE(BO)
  262. dcbtst CO1, PREC
  263. srawi. r0, TEMP, 2
  264. mtspr CTR, r0
  265. #endif
  266. ble LL(75)
  267. .align 5
  268. LL(72):
  269. FMADD f0, f16, f20, f0
  270. FMADD f1, f17, f20, f1
  271. FMADD f2, f18, f20, f2
  272. FMADD f3, f19, f20, f3
  273. LFD f16, 4 * SIZE(AO)
  274. LFD f17, 5 * SIZE(AO)
  275. LFD f18, 6 * SIZE(AO)
  276. LFD f19, 7 * SIZE(AO)
  277. FMADD f0, f16, f21, f0
  278. FMADD f1, f17, f21, f1
  279. FMADD f2, f18, f21, f2
  280. FMADD f3, f19, f21, f3
  281. LFD f16, 8 * SIZE(AO)
  282. LFD f17, 9 * SIZE(AO)
  283. LFD f18, 10 * SIZE(AO)
  284. LFD f19, 11 * SIZE(AO)
  285. FMADD f0, f16, f22, f0
  286. FMADD f1, f17, f22, f1
  287. FMADD f2, f18, f22, f2
  288. FMADD f3, f19, f22, f3
  289. LFD f16, 12 * SIZE(AO)
  290. LFD f17, 13 * SIZE(AO)
  291. LFD f18, 14 * SIZE(AO)
  292. LFD f19, 15 * SIZE(AO)
  293. FMADD f0, f16, f23, f0
  294. FMADD f1, f17, f23, f1
  295. FMADD f2, f18, f23, f2
  296. FMADD f3, f19, f23, f3
  297. LFD f16, 16 * SIZE(AO)
  298. LFD f17, 17 * SIZE(AO)
  299. LFD f18, 18 * SIZE(AO)
  300. LFD f19, 19 * SIZE(AO)
  301. LFD f20, 4 * SIZE(BO)
  302. LFD f21, 5 * SIZE(BO)
  303. LFD f22, 6 * SIZE(BO)
  304. LFD f23, 7 * SIZE(BO)
  305. addi AO, AO, 16 * SIZE
  306. addi BO, BO, 4 * SIZE
  307. dcbtst AO, PREA
  308. bdnz LL(72)
  309. .align 4
  310. LL(75):
  311. #if defined(LT) || defined(RN)
  312. andi. r0, KK, 3
  313. #else
  314. andi. r0, TEMP, 3
  315. #endif
  316. mtspr CTR, r0
  317. ble+ LL(78)
  318. .align 4
  319. LL(76):
  320. FMADD f0, f16, f20, f0
  321. FMADD f1, f17, f20, f1
  322. FMADD f2, f18, f20, f2
  323. FMADD f3, f19, f20, f3
  324. LFD f16, 4 * SIZE(AO)
  325. LFD f17, 5 * SIZE(AO)
  326. LFD f18, 6 * SIZE(AO)
  327. LFD f19, 7 * SIZE(AO)
  328. LFD f20, 1 * SIZE(BO)
  329. addi BO, BO, 1 * SIZE
  330. addi AO, AO, 4 * SIZE
  331. bdnz LL(76)
  332. .align 4
  333. LL(78):
  334. #if defined(LN) || defined(RT)
  335. #ifdef LN
  336. subi r0, KK, 4
  337. #else
  338. subi r0, KK, 1
  339. #endif
  340. slwi TEMP, r0, 2 + BASE_SHIFT
  341. slwi r0, r0, 0 + BASE_SHIFT
  342. add AO, AORIG, TEMP
  343. add BO, B, r0
  344. #endif
  345. #if defined(LN) || defined(LT)
  346. LFD f16, 0 * SIZE(BO)
  347. LFD f20, 1 * SIZE(BO)
  348. LFD f24, 2 * SIZE(BO)
  349. LFD f28, 3 * SIZE(BO)
  350. FSUB f0, f16, f0
  351. FSUB f1, f20, f1
  352. FSUB f2, f24, f2
  353. FSUB f3, f28, f3
  354. #else
  355. LFD f16, 0 * SIZE(AO)
  356. LFD f17, 1 * SIZE(AO)
  357. LFD f18, 2 * SIZE(AO)
  358. LFD f19, 3 * SIZE(AO)
  359. FSUB f0, f16, f0
  360. FSUB f1, f17, f1
  361. FSUB f2, f18, f2
  362. FSUB f3, f19, f3
  363. #endif
  364. #ifdef LN
  365. LFD f16, 15 * SIZE(AO)
  366. LFD f17, 14 * SIZE(AO)
  367. LFD f18, 13 * SIZE(AO)
  368. LFD f19, 12 * SIZE(AO)
  369. FMUL f3, f16, f3
  370. FNMSUB f2, f17, f3, f2
  371. FNMSUB f1, f18, f3, f1
  372. FNMSUB f0, f19, f3, f0
  373. LFD f16, 10 * SIZE(AO)
  374. LFD f17, 9 * SIZE(AO)
  375. LFD f18, 8 * SIZE(AO)
  376. LFD f19, 5 * SIZE(AO)
  377. LFD f20, 4 * SIZE(AO)
  378. LFD f21, 0 * SIZE(AO)
  379. FMUL f2, f16, f2
  380. FNMSUB f1, f17, f2, f1
  381. FNMSUB f0, f18, f2, f0
  382. FMUL f1, f19, f1
  383. FNMSUB f0, f20, f1, f0
  384. FMUL f0, f21, f0
  385. #endif
  386. #ifdef LT
  387. LFD f16, 0 * SIZE(AO)
  388. LFD f17, 1 * SIZE(AO)
  389. LFD f18, 2 * SIZE(AO)
  390. LFD f19, 3 * SIZE(AO)
  391. FMUL f0, f16, f0
  392. FNMSUB f1, f17, f0, f1
  393. FNMSUB f2, f18, f0, f2
  394. FNMSUB f3, f19, f0, f3
  395. LFD f17, 5 * SIZE(AO)
  396. LFD f18, 6 * SIZE(AO)
  397. LFD f19, 7 * SIZE(AO)
  398. FMUL f1, f17, f1
  399. FNMSUB f2, f18, f1, f2
  400. FNMSUB f3, f19, f1, f3
  401. LFD f18, 10 * SIZE(AO)
  402. LFD f19, 11 * SIZE(AO)
  403. FMUL f2, f18, f2
  404. FNMSUB f3, f19, f2, f3
  405. LFD f19, 15 * SIZE(AO)
  406. FMUL f3, f19, f3
  407. #endif
  408. #ifdef RN
  409. LFD f16, 0 * SIZE(BO)
  410. FMUL f0, f16, f0
  411. FMUL f1, f16, f1
  412. FMUL f2, f16, f2
  413. FMUL f3, f16, f3
  414. #endif
  415. #ifdef RT
  416. LFD f21, 0 * SIZE(BO)
  417. FMUL f0, f21, f0
  418. FMUL f1, f21, f1
  419. FMUL f2, f21, f2
  420. FMUL f3, f21, f3
  421. #endif
  422. #ifdef LN
  423. subi CO1, CO1, 4 * SIZE
  424. #endif
  425. #if defined(LN) || defined(LT)
  426. STFD f0, 0 * SIZE(BO)
  427. STFD f1, 1 * SIZE(BO)
  428. STFD f2, 2 * SIZE(BO)
  429. STFD f3, 3 * SIZE(BO)
  430. #else
  431. STFD f0, 0 * SIZE(AO)
  432. STFD f1, 1 * SIZE(AO)
  433. STFD f2, 2 * SIZE(AO)
  434. STFD f3, 3 * SIZE(AO)
  435. #endif
  436. STFD f0, 0 * SIZE(CO1)
  437. STFD f1, 1 * SIZE(CO1)
  438. STFD f2, 2 * SIZE(CO1)
  439. STFD f3, 3 * SIZE(CO1)
  440. lfs f0, FZERO
  441. fmr f1, f0
  442. fmr f2, f0
  443. fmr f3, f0
  444. #ifndef LN
  445. addi CO1, CO1, 4 * SIZE
  446. #endif
  447. #ifdef RT
  448. slwi r0, K, 2 + BASE_SHIFT
  449. add AORIG, AORIG, r0
  450. #endif
  451. #if defined(LT) || defined(RN)
  452. sub TEMP, K, KK
  453. slwi r0, TEMP, 2 + BASE_SHIFT
  454. slwi TEMP, TEMP, 0 + BASE_SHIFT
  455. add AO, AO, r0
  456. add BO, BO, TEMP
  457. #endif
  458. #ifdef LN
  459. subi KK, KK, 4
  460. #endif
  461. #ifdef LT
  462. addi KK, KK, 4
  463. #endif
  464. addic. I, I, -1
  465. bgt+ LL(71)
  466. .align 4
  467. LL(80):
  468. andi. I, M, 2
  469. ble LL(90)
  470. #if defined(LT) || defined(RN)
  471. LFD f16, 0 * SIZE(AO)
  472. LFD f17, 1 * SIZE(AO)
  473. LFD f18, 2 * SIZE(AO)
  474. LFD f19, 3 * SIZE(AO)
  475. LFD f20, 0 * SIZE(B)
  476. LFD f21, 1 * SIZE(B)
  477. LFD f22, 2 * SIZE(B)
  478. LFD f23, 3 * SIZE(B)
  479. srawi. r0, KK, 2
  480. mtspr CTR, r0
  481. mr BO, B
  482. #else
  483. #ifdef LN
  484. slwi r0, K, 1 + BASE_SHIFT
  485. sub AORIG, AORIG, r0
  486. #endif
  487. slwi r0, KK, 1 + BASE_SHIFT
  488. slwi TEMP, KK, 0 + BASE_SHIFT
  489. add AO, AORIG, r0
  490. add BO, B, TEMP
  491. sub TEMP, K, KK
  492. LFD f16, 0 * SIZE(AO)
  493. LFD f17, 1 * SIZE(AO)
  494. LFD f18, 2 * SIZE(AO)
  495. LFD f19, 3 * SIZE(AO)
  496. LFD f20, 0 * SIZE(BO)
  497. LFD f21, 1 * SIZE(BO)
  498. LFD f22, 2 * SIZE(BO)
  499. LFD f23, 3 * SIZE(BO)
  500. srawi. r0, TEMP, 2
  501. mtspr CTR, r0
  502. #endif
  503. ble LL(85)
  504. .align 5
  505. LL(82):
  506. FMADD f0, f16, f20, f0
  507. FMADD f1, f17, f20, f1
  508. FMADD f2, f18, f21, f2
  509. FMADD f3, f19, f21, f3
  510. LFD f16, 4 * SIZE(AO)
  511. LFD f17, 5 * SIZE(AO)
  512. LFD f18, 6 * SIZE(AO)
  513. LFD f19, 7 * SIZE(AO)
  514. FMADD f0, f16, f22, f0
  515. FMADD f1, f17, f22, f1
  516. FMADD f2, f18, f23, f2
  517. FMADD f3, f19, f23, f3
  518. LFD f16, 8 * SIZE(AO)
  519. LFD f17, 9 * SIZE(AO)
  520. LFD f18, 10 * SIZE(AO)
  521. LFD f19, 11 * SIZE(AO)
  522. LFD f20, 4 * SIZE(BO)
  523. LFD f21, 5 * SIZE(BO)
  524. LFD f22, 6 * SIZE(BO)
  525. LFD f23, 7 * SIZE(BO)
  526. addi AO, AO, 8 * SIZE
  527. addi BO, BO, 4 * SIZE
  528. dcbt AO, PREA
  529. bdnz LL(82)
  530. .align 4
  531. LL(85):
  532. #if defined(LT) || defined(RN)
  533. andi. r0, KK, 3
  534. #else
  535. andi. r0, TEMP, 3
  536. #endif
  537. mtspr CTR, r0
  538. ble+ LL(88)
  539. .align 4
  540. LL(86):
  541. FMADD f0, f16, f20, f0
  542. FMADD f1, f17, f20, f1
  543. LFD f16, 2 * SIZE(AO)
  544. LFD f17, 3 * SIZE(AO)
  545. LFD f20, 1 * SIZE(BO)
  546. addi BO, BO, 1 * SIZE
  547. addi AO, AO, 2 * SIZE
  548. bdnz LL(86)
  549. .align 4
  550. LL(88):
  551. FADD f0, f2, f0
  552. FADD f1, f3, f1
  553. #if defined(LN) || defined(RT)
  554. #ifdef LN
  555. subi r0, KK, 2
  556. #else
  557. subi r0, KK, 1
  558. #endif
  559. slwi TEMP, r0, 1 + BASE_SHIFT
  560. slwi r0, r0, 0 + BASE_SHIFT
  561. add AO, AORIG, TEMP
  562. add BO, B, r0
  563. #endif
  564. #if defined(LN) || defined(LT)
  565. LFD f16, 0 * SIZE(BO)
  566. LFD f20, 1 * SIZE(BO)
  567. FSUB f0, f16, f0
  568. FSUB f1, f20, f1
  569. #else
  570. LFD f16, 0 * SIZE(AO)
  571. LFD f17, 1 * SIZE(AO)
  572. FSUB f0, f16, f0
  573. FSUB f1, f17, f1
  574. #endif
  575. #ifdef LN
  576. LFD f19, 3 * SIZE(AO)
  577. LFD f20, 2 * SIZE(AO)
  578. LFD f21, 0 * SIZE(AO)
  579. FMUL f1, f19, f1
  580. FNMSUB f0, f20, f1, f0
  581. FMUL f0, f21, f0
  582. #endif
  583. #ifdef LT
  584. LFD f16, 0 * SIZE(AO)
  585. LFD f17, 1 * SIZE(AO)
  586. FMUL f0, f16, f0
  587. FNMSUB f1, f17, f0, f1
  588. LFD f17, 3 * SIZE(AO)
  589. FMUL f1, f17, f1
  590. #endif
  591. #ifdef RN
  592. LFD f16, 0 * SIZE(BO)
  593. FMUL f0, f16, f0
  594. FMUL f1, f16, f1
  595. #endif
  596. #ifdef RT
  597. LFD f21, 0 * SIZE(BO)
  598. FMUL f0, f21, f0
  599. FMUL f1, f21, f1
  600. #endif
  601. #ifdef LN
  602. subi CO1, CO1, 2 * SIZE
  603. #endif
  604. #if defined(LN) || defined(LT)
  605. STFD f0, 0 * SIZE(BO)
  606. STFD f1, 1 * SIZE(BO)
  607. #else
  608. STFD f0, 0 * SIZE(AO)
  609. STFD f1, 1 * SIZE(AO)
  610. #endif
  611. STFD f0, 0 * SIZE(CO1)
  612. STFD f1, 1 * SIZE(CO1)
  613. lfs f0, FZERO
  614. fmr f1, f0
  615. fmr f2, f0
  616. fmr f3, f0
  617. #ifndef LN
  618. addi CO1, CO1, 2 * SIZE
  619. #endif
  620. #ifdef RT
  621. slwi r0, K, 1 + BASE_SHIFT
  622. add AORIG, AORIG, r0
  623. #endif
  624. #if defined(LT) || defined(RN)
  625. sub TEMP, K, KK
  626. slwi r0, TEMP, 1 + BASE_SHIFT
  627. slwi TEMP, TEMP, 0 + BASE_SHIFT
  628. add AO, AO, r0
  629. add BO, BO, TEMP
  630. #endif
  631. #ifdef LN
  632. subi KK, KK, 2
  633. #endif
  634. #ifdef LT
  635. addi KK, KK, 2
  636. #endif
  637. .align 4
  638. LL(90):
  639. andi. I, M, 1
  640. ble LL(99)
  641. #if defined(LT) || defined(RN)
  642. LFD f16, 0 * SIZE(AO)
  643. LFD f17, 1 * SIZE(AO)
  644. LFD f18, 2 * SIZE(AO)
  645. LFD f19, 3 * SIZE(AO)
  646. LFD f20, 0 * SIZE(B)
  647. LFD f21, 1 * SIZE(B)
  648. LFD f22, 2 * SIZE(B)
  649. LFD f23, 3 * SIZE(B)
  650. srawi. r0, KK, 3
  651. mtspr CTR, r0
  652. mr BO, B
  653. #else
  654. #ifdef LN
  655. slwi r0, K, BASE_SHIFT
  656. sub AORIG, AORIG, r0
  657. #endif
  658. slwi r0, KK, 0 + BASE_SHIFT
  659. slwi TEMP, KK, 0 + BASE_SHIFT
  660. add AO, AORIG, r0
  661. add BO, B, TEMP
  662. sub TEMP, K, KK
  663. LFD f16, 0 * SIZE(AO)
  664. LFD f17, 1 * SIZE(AO)
  665. LFD f18, 2 * SIZE(AO)
  666. LFD f19, 3 * SIZE(AO)
  667. LFD f20, 0 * SIZE(BO)
  668. LFD f21, 1 * SIZE(BO)
  669. LFD f22, 2 * SIZE(BO)
  670. LFD f23, 3 * SIZE(BO)
  671. srawi. r0, TEMP, 3
  672. mtspr CTR, r0
  673. #endif
  674. ble LL(95)
  675. .align 5
  676. LL(92):
  677. FMADD f0, f16, f20, f0
  678. FMADD f1, f17, f21, f1
  679. FMADD f2, f18, f22, f2
  680. FMADD f3, f19, f23, f3
  681. LFD f16, 4 * SIZE(AO)
  682. LFD f17, 5 * SIZE(AO)
  683. LFD f18, 6 * SIZE(AO)
  684. LFD f19, 7 * SIZE(AO)
  685. LFD f20, 4 * SIZE(BO)
  686. LFD f21, 5 * SIZE(BO)
  687. LFD f22, 6 * SIZE(BO)
  688. LFD f23, 7 * SIZE(BO)
  689. FMADD f0, f16, f20, f0
  690. FMADD f1, f17, f21, f1
  691. FMADD f2, f18, f22, f2
  692. FMADD f3, f19, f23, f3
  693. LFD f16, 8 * SIZE(AO)
  694. LFD f17, 9 * SIZE(AO)
  695. LFD f18, 10 * SIZE(AO)
  696. LFD f19, 11 * SIZE(AO)
  697. LFD f20, 8 * SIZE(BO)
  698. LFD f21, 9 * SIZE(BO)
  699. LFD f22, 10 * SIZE(BO)
  700. LFD f23, 11 * SIZE(BO)
  701. addi AO, AO, 8 * SIZE
  702. addi BO, BO, 8 * SIZE
  703. bdnz LL(92)
  704. .align 4
  705. LL(95):
  706. #if defined(LT) || defined(RN)
  707. andi. r0, KK, 7
  708. #else
  709. andi. r0, TEMP, 7
  710. #endif
  711. mtspr CTR, r0
  712. ble+ LL(98)
  713. .align 4
  714. LL(96):
  715. FMADD f0, f16, f20, f0
  716. LFD f16, 1 * SIZE(AO)
  717. LFD f20, 1 * SIZE(BO)
  718. addi BO, BO, 1 * SIZE
  719. addi AO, AO, 1 * SIZE
  720. bdnz LL(96)
  721. .align 4
  722. LL(98):
  723. FADD f0, f1, f0
  724. FADD f2, f3, f2
  725. FADD f0, f2, f0
  726. #if defined(LN) || defined(RT)
  727. #ifdef LN
  728. subi r0, KK, 1
  729. #else
  730. subi r0, KK, 1
  731. #endif
  732. slwi TEMP, r0, 0 + BASE_SHIFT
  733. slwi r0, r0, 0 + BASE_SHIFT
  734. add AO, AORIG, TEMP
  735. add BO, B, r0
  736. #endif
  737. #if defined(LN) || defined(LT)
  738. LFD f16, 0 * SIZE(BO)
  739. FSUB f0, f16, f0
  740. #else
  741. LFD f16, 0 * SIZE(AO)
  742. FSUB f0, f16, f0
  743. #endif
  744. #ifdef LN
  745. LFD f21, 0 * SIZE(AO)
  746. FMUL f0, f21, f0
  747. #endif
  748. #ifdef LT
  749. LFD f16, 0 * SIZE(AO)
  750. FMUL f0, f16, f0
  751. #endif
  752. #ifdef RN
  753. LFD f16, 0 * SIZE(BO)
  754. FMUL f0, f16, f0
  755. #endif
  756. #ifdef RT
  757. LFD f21, 0 * SIZE(BO)
  758. FMUL f0, f21, f0
  759. #endif
  760. #ifdef LN
  761. subi CO1, CO1, 1 * SIZE
  762. #endif
  763. #if defined(LN) || defined(LT)
  764. STFD f0, 0 * SIZE(BO)
  765. #else
  766. STFD f0, 0 * SIZE(AO)
  767. #endif
  768. STFD f0, 0 * SIZE(CO1)
  769. lfs f0, FZERO
  770. #ifndef LN
  771. addi CO1, CO1, 1 * SIZE
  772. #endif
  773. #ifdef RT
  774. slwi r0, K, 0 + BASE_SHIFT
  775. add AORIG, AORIG, r0
  776. #endif
  777. #if defined(LT) || defined(RN)
  778. sub TEMP, K, KK
  779. slwi r0, TEMP, 0 + BASE_SHIFT
  780. slwi TEMP, TEMP, 0 + BASE_SHIFT
  781. add AO, AO, r0
  782. add BO, BO, TEMP
  783. #endif
  784. #ifdef LN
  785. subi KK, KK, 1
  786. #endif
  787. #ifdef LT
  788. addi KK, KK, 1
  789. #endif
  790. .align 4
  791. LL(99):
  792. #ifdef LN
  793. slwi r0, K, 0 + BASE_SHIFT
  794. add B, B, r0
  795. #endif
  796. #if defined(LT) || defined(RN)
  797. mr B, BO
  798. #endif
  799. #ifdef RN
  800. addi KK, KK, 1
  801. #endif
  802. #ifdef RT
  803. subi KK, KK, 1
  804. #endif
  805. .align 4
  806. LL(40):
  807. andi. J, N, 2
  808. ble LL(09)
  809. #ifdef RT
  810. slwi r0, K, 1 + BASE_SHIFT
  811. sub B, B, r0
  812. slwi r0, LDC, 1
  813. sub C, C, r0
  814. #endif
  815. mr CO1, C
  816. add CO2, C, LDC
  817. #ifdef LN
  818. add KK, M, OFFSET
  819. #endif
  820. #ifdef LT
  821. mr KK, OFFSET
  822. #endif
  823. fmr f1, f0
  824. fmr f2, f0
  825. fmr f3, f0
  826. fmr f4, f0
  827. fmr f5, f0
  828. fmr f6, f0
  829. fmr f7, f0
  830. srawi. I, M, 2
  831. #if defined(LN) || defined(RT)
  832. mr AORIG, A
  833. #else
  834. mr AO, A
  835. #endif
  836. #ifndef RT
  837. add C, CO2, LDC
  838. #endif
  839. ble LL(50)
  840. .align 4
  841. LL(41):
  842. #if defined(LT) || defined(RN)
  843. LFD f16, 0 * SIZE(AO)
  844. LFD f17, 1 * SIZE(AO)
  845. LFD f18, 2 * SIZE(AO)
  846. LFD f19, 3 * SIZE(AO)
  847. LFD f20, 0 * SIZE(B)
  848. LFD f21, 1 * SIZE(B)
  849. LFD f22, 2 * SIZE(B)
  850. LFD f23, 3 * SIZE(B)
  851. dcbtst CO1, PREC
  852. dcbtst CO2, PREC
  853. srawi. r0, KK, 2
  854. mtspr CTR, r0
  855. mr BO, B
  856. #else
  857. #ifdef LN
  858. slwi r0, K, 2 + BASE_SHIFT
  859. sub AORIG, AORIG, r0
  860. #endif
  861. slwi r0, KK, 2 + BASE_SHIFT
  862. slwi TEMP, KK, 1 + BASE_SHIFT
  863. add AO, AORIG, r0
  864. add BO, B, TEMP
  865. sub TEMP, K, KK
  866. LFD f16, 0 * SIZE(AO)
  867. LFD f17, 1 * SIZE(AO)
  868. LFD f18, 2 * SIZE(AO)
  869. LFD f19, 3 * SIZE(AO)
  870. LFD f20, 0 * SIZE(BO)
  871. LFD f21, 1 * SIZE(BO)
  872. LFD f22, 2 * SIZE(BO)
  873. LFD f23, 3 * SIZE(BO)
  874. dcbtst CO1, PREC
  875. dcbtst CO2, PREC
  876. srawi. r0, TEMP, 2
  877. mtspr CTR, r0
  878. #endif
  879. ble LL(45)
  880. .align 5
  881. LL(42):
  882. FMADD f0, f16, f20, f0
  883. FMADD f1, f17, f20, f1
  884. FMADD f2, f18, f20, f2
  885. FMADD f3, f19, f20, f3
  886. FMADD f4, f16, f21, f4
  887. FMADD f5, f17, f21, f5
  888. FMADD f6, f18, f21, f6
  889. FMADD f7, f19, f21, f7
  890. LFD f16, 4 * SIZE(AO)
  891. LFD f17, 5 * SIZE(AO)
  892. LFD f18, 6 * SIZE(AO)
  893. LFD f19, 7 * SIZE(AO)
  894. FMADD f0, f16, f22, f0
  895. FMADD f1, f17, f22, f1
  896. FMADD f2, f18, f22, f2
  897. FMADD f3, f19, f22, f3
  898. FMADD f4, f16, f23, f4
  899. FMADD f5, f17, f23, f5
  900. FMADD f6, f18, f23, f6
  901. FMADD f7, f19, f23, f7
  902. LFD f16, 8 * SIZE(AO)
  903. LFD f17, 9 * SIZE(AO)
  904. LFD f18, 10 * SIZE(AO)
  905. LFD f19, 11 * SIZE(AO)
  906. LFD f20, 4 * SIZE(BO)
  907. LFD f21, 5 * SIZE(BO)
  908. LFD f22, 6 * SIZE(BO)
  909. LFD f23, 7 * SIZE(BO)
  910. FMADD f0, f16, f20, f0
  911. FMADD f1, f17, f20, f1
  912. FMADD f2, f18, f20, f2
  913. FMADD f3, f19, f20, f3
  914. FMADD f4, f16, f21, f4
  915. FMADD f5, f17, f21, f5
  916. FMADD f6, f18, f21, f6
  917. FMADD f7, f19, f21, f7
  918. LFD f16, 12 * SIZE(AO)
  919. LFD f17, 13 * SIZE(AO)
  920. LFD f18, 14 * SIZE(AO)
  921. LFD f19, 15 * SIZE(AO)
  922. FMADD f0, f16, f22, f0
  923. FMADD f1, f17, f22, f1
  924. FMADD f2, f18, f22, f2
  925. FMADD f3, f19, f22, f3
  926. FMADD f4, f16, f23, f4
  927. FMADD f5, f17, f23, f5
  928. FMADD f6, f18, f23, f6
  929. FMADD f7, f19, f23, f7
  930. LFD f16, 16 * SIZE(AO)
  931. LFD f17, 17 * SIZE(AO)
  932. LFD f18, 18 * SIZE(AO)
  933. LFD f19, 19 * SIZE(AO)
  934. LFD f20, 8 * SIZE(BO)
  935. LFD f21, 9 * SIZE(BO)
  936. LFD f22, 10 * SIZE(BO)
  937. LFD f23, 11 * SIZE(BO)
  938. addi AO, AO, 16 * SIZE
  939. addi BO, BO, 8 * SIZE
  940. dcbtst AO, PREA
  941. bdnz LL(42)
  942. .align 4
  943. LL(45):
  944. #if defined(LT) || defined(RN)
  945. andi. r0, KK, 3
  946. #else
  947. andi. r0, TEMP, 3
  948. #endif
  949. mtspr CTR, r0
  950. ble+ LL(48)
  951. .align 4
  952. LL(46):
  953. FMADD f0, f16, f20, f0
  954. FMADD f1, f17, f20, f1
  955. FMADD f2, f18, f20, f2
  956. FMADD f3, f19, f20, f3
  957. FMADD f4, f16, f21, f4
  958. FMADD f5, f17, f21, f5
  959. FMADD f6, f18, f21, f6
  960. FMADD f7, f19, f21, f7
  961. LFD f16, 4 * SIZE(AO)
  962. LFD f17, 5 * SIZE(AO)
  963. LFD f18, 6 * SIZE(AO)
  964. LFD f19, 7 * SIZE(AO)
  965. LFD f20, 2 * SIZE(BO)
  966. LFD f21, 3 * SIZE(BO)
  967. addi BO, BO, 2 * SIZE
  968. addi AO, AO, 4 * SIZE
  969. bdnz LL(46)
  970. .align 4
  971. LL(48):
  972. #if defined(LN) || defined(RT)
  973. #ifdef LN
  974. subi r0, KK, 4
  975. #else
  976. subi r0, KK, 2
  977. #endif
  978. slwi TEMP, r0, 2 + BASE_SHIFT
  979. slwi r0, r0, 1 + BASE_SHIFT
  980. add AO, AORIG, TEMP
  981. add BO, B, r0
  982. #endif
  983. #if defined(LN) || defined(LT)
  984. LFD f16, 0 * SIZE(BO)
  985. LFD f17, 1 * SIZE(BO)
  986. LFD f20, 2 * SIZE(BO)
  987. LFD f21, 3 * SIZE(BO)
  988. LFD f24, 4 * SIZE(BO)
  989. LFD f25, 5 * SIZE(BO)
  990. LFD f28, 6 * SIZE(BO)
  991. LFD f29, 7 * SIZE(BO)
  992. FSUB f0, f16, f0
  993. FSUB f4, f17, f4
  994. FSUB f1, f20, f1
  995. FSUB f5, f21, f5
  996. FSUB f2, f24, f2
  997. FSUB f6, f25, f6
  998. FSUB f3, f28, f3
  999. FSUB f7, f29, f7
  1000. #else
  1001. LFD f16, 0 * SIZE(AO)
  1002. LFD f17, 1 * SIZE(AO)
  1003. LFD f18, 2 * SIZE(AO)
  1004. LFD f19, 3 * SIZE(AO)
  1005. LFD f20, 4 * SIZE(AO)
  1006. LFD f21, 5 * SIZE(AO)
  1007. LFD f22, 6 * SIZE(AO)
  1008. LFD f23, 7 * SIZE(AO)
  1009. FSUB f0, f16, f0
  1010. FSUB f1, f17, f1
  1011. FSUB f2, f18, f2
  1012. FSUB f3, f19, f3
  1013. FSUB f4, f20, f4
  1014. FSUB f5, f21, f5
  1015. FSUB f6, f22, f6
  1016. FSUB f7, f23, f7
  1017. #endif
  1018. #ifdef LN
  1019. LFD f16, 15 * SIZE(AO)
  1020. LFD f17, 14 * SIZE(AO)
  1021. LFD f18, 13 * SIZE(AO)
  1022. LFD f19, 12 * SIZE(AO)
  1023. FMUL f3, f16, f3
  1024. FMUL f7, f16, f7
  1025. FNMSUB f2, f17, f3, f2
  1026. FNMSUB f6, f17, f7, f6
  1027. FNMSUB f1, f18, f3, f1
  1028. FNMSUB f5, f18, f7, f5
  1029. FNMSUB f0, f19, f3, f0
  1030. FNMSUB f4, f19, f7, f4
  1031. LFD f16, 10 * SIZE(AO)
  1032. LFD f17, 9 * SIZE(AO)
  1033. LFD f18, 8 * SIZE(AO)
  1034. LFD f19, 5 * SIZE(AO)
  1035. LFD f20, 4 * SIZE(AO)
  1036. LFD f21, 0 * SIZE(AO)
  1037. FMUL f2, f16, f2
  1038. FMUL f6, f16, f6
  1039. FNMSUB f1, f17, f2, f1
  1040. FNMSUB f5, f17, f6, f5
  1041. FNMSUB f0, f18, f2, f0
  1042. FNMSUB f4, f18, f6, f4
  1043. FMUL f1, f19, f1
  1044. FMUL f5, f19, f5
  1045. FNMSUB f0, f20, f1, f0
  1046. FNMSUB f4, f20, f5, f4
  1047. FMUL f0, f21, f0
  1048. FMUL f4, f21, f4
  1049. #endif
  1050. #ifdef LT
  1051. LFD f16, 0 * SIZE(AO)
  1052. LFD f17, 1 * SIZE(AO)
  1053. LFD f18, 2 * SIZE(AO)
  1054. LFD f19, 3 * SIZE(AO)
  1055. FMUL f0, f16, f0
  1056. FMUL f4, f16, f4
  1057. FNMSUB f1, f17, f0, f1
  1058. FNMSUB f5, f17, f4, f5
  1059. FNMSUB f2, f18, f0, f2
  1060. FNMSUB f6, f18, f4, f6
  1061. FNMSUB f3, f19, f0, f3
  1062. FNMSUB f7, f19, f4, f7
  1063. LFD f17, 5 * SIZE(AO)
  1064. LFD f18, 6 * SIZE(AO)
  1065. LFD f19, 7 * SIZE(AO)
  1066. FMUL f1, f17, f1
  1067. FMUL f5, f17, f5
  1068. FNMSUB f2, f18, f1, f2
  1069. FNMSUB f6, f18, f5, f6
  1070. FNMSUB f3, f19, f1, f3
  1071. FNMSUB f7, f19, f5, f7
  1072. LFD f18, 10 * SIZE(AO)
  1073. LFD f19, 11 * SIZE(AO)
  1074. FMUL f2, f18, f2
  1075. FMUL f6, f18, f6
  1076. FNMSUB f3, f19, f2, f3
  1077. FNMSUB f7, f19, f6, f7
  1078. LFD f19, 15 * SIZE(AO)
  1079. FMUL f3, f19, f3
  1080. FMUL f7, f19, f7
  1081. #endif
  1082. #ifdef RN
  1083. LFD f16, 0 * SIZE(BO)
  1084. LFD f17, 1 * SIZE(BO)
  1085. LFD f18, 3 * SIZE(BO)
  1086. FMUL f0, f16, f0
  1087. FMUL f1, f16, f1
  1088. FMUL f2, f16, f2
  1089. FMUL f3, f16, f3
  1090. FNMSUB f4, f17, f0, f4
  1091. FNMSUB f5, f17, f1, f5
  1092. FNMSUB f6, f17, f2, f6
  1093. FNMSUB f7, f17, f3, f7
  1094. FMUL f4, f18, f4
  1095. FMUL f5, f18, f5
  1096. FMUL f6, f18, f6
  1097. FMUL f7, f18, f7
  1098. #endif
  1099. #ifdef RT
  1100. LFD f19, 3 * SIZE(BO)
  1101. LFD f20, 2 * SIZE(BO)
  1102. LFD f21, 0 * SIZE(BO)
  1103. FMUL f4, f19, f4
  1104. FMUL f5, f19, f5
  1105. FMUL f6, f19, f6
  1106. FMUL f7, f19, f7
  1107. FNMSUB f0, f20, f4, f0
  1108. FNMSUB f1, f20, f5, f1
  1109. FNMSUB f2, f20, f6, f2
  1110. FNMSUB f3, f20, f7, f3
  1111. FMUL f0, f21, f0
  1112. FMUL f1, f21, f1
  1113. FMUL f2, f21, f2
  1114. FMUL f3, f21, f3
  1115. #endif
  1116. #ifdef LN
  1117. subi CO1, CO1, 4 * SIZE
  1118. subi CO2, CO2, 4 * SIZE
  1119. #endif
  1120. #if defined(LN) || defined(LT)
  1121. STFD f0, 0 * SIZE(BO)
  1122. STFD f4, 1 * SIZE(BO)
  1123. STFD f1, 2 * SIZE(BO)
  1124. STFD f5, 3 * SIZE(BO)
  1125. STFD f2, 4 * SIZE(BO)
  1126. STFD f6, 5 * SIZE(BO)
  1127. STFD f3, 6 * SIZE(BO)
  1128. STFD f7, 7 * SIZE(BO)
  1129. #else
  1130. STFD f0, 0 * SIZE(AO)
  1131. STFD f1, 1 * SIZE(AO)
  1132. STFD f2, 2 * SIZE(AO)
  1133. STFD f3, 3 * SIZE(AO)
  1134. STFD f4, 4 * SIZE(AO)
  1135. STFD f5, 5 * SIZE(AO)
  1136. STFD f6, 6 * SIZE(AO)
  1137. STFD f7, 7 * SIZE(AO)
  1138. #endif
  1139. STFD f0, 0 * SIZE(CO1)
  1140. STFD f1, 1 * SIZE(CO1)
  1141. STFD f2, 2 * SIZE(CO1)
  1142. STFD f3, 3 * SIZE(CO1)
  1143. STFD f4, 0 * SIZE(CO2)
  1144. STFD f5, 1 * SIZE(CO2)
  1145. STFD f6, 2 * SIZE(CO2)
  1146. STFD f7, 3 * SIZE(CO2)
  1147. lfs f0, FZERO
  1148. fmr f1, f0
  1149. fmr f2, f0
  1150. fmr f3, f0
  1151. fmr f4, f0
  1152. fmr f5, f0
  1153. fmr f6, f0
  1154. fmr f7, f0
  1155. #ifndef LN
  1156. addi CO1, CO1, 4 * SIZE
  1157. addi CO2, CO2, 4 * SIZE
  1158. #endif
  1159. #ifdef RT
  1160. slwi r0, K, 2 + BASE_SHIFT
  1161. add AORIG, AORIG, r0
  1162. #endif
  1163. #if defined(LT) || defined(RN)
  1164. sub TEMP, K, KK
  1165. slwi r0, TEMP, 2 + BASE_SHIFT
  1166. slwi TEMP, TEMP, 1 + BASE_SHIFT
  1167. add AO, AO, r0
  1168. add BO, BO, TEMP
  1169. #endif
  1170. #ifdef LN
  1171. subi KK, KK, 4
  1172. #endif
  1173. #ifdef LT
  1174. addi KK, KK, 4
  1175. #endif
  1176. addic. I, I, -1
  1177. bgt+ LL(41)
  1178. .align 4
  1179. LL(50):
  1180. andi. I, M, 2
  1181. ble LL(60)
  1182. #if defined(LT) || defined(RN)
  1183. LFD f16, 0 * SIZE(AO)
  1184. LFD f17, 1 * SIZE(AO)
  1185. LFD f18, 2 * SIZE(AO)
  1186. LFD f19, 3 * SIZE(AO)
  1187. LFD f20, 0 * SIZE(B)
  1188. LFD f21, 1 * SIZE(B)
  1189. LFD f22, 2 * SIZE(B)
  1190. LFD f23, 3 * SIZE(B)
  1191. LFD f24, 4 * SIZE(B)
  1192. LFD f25, 5 * SIZE(B)
  1193. LFD f26, 6 * SIZE(B)
  1194. LFD f27, 7 * SIZE(B)
  1195. srawi. r0, KK, 2
  1196. mtspr CTR, r0
  1197. mr BO, B
  1198. #else
  1199. #ifdef LN
  1200. slwi r0, K, 1 + BASE_SHIFT
  1201. sub AORIG, AORIG, r0
  1202. #endif
  1203. slwi r0, KK, 1 + BASE_SHIFT
  1204. slwi TEMP, KK, 1 + BASE_SHIFT
  1205. add AO, AORIG, r0
  1206. add BO, B, TEMP
  1207. sub TEMP, K, KK
  1208. LFD f16, 0 * SIZE(AO)
  1209. LFD f17, 1 * SIZE(AO)
  1210. LFD f18, 2 * SIZE(AO)
  1211. LFD f19, 3 * SIZE(AO)
  1212. LFD f20, 0 * SIZE(BO)
  1213. LFD f21, 1 * SIZE(BO)
  1214. LFD f22, 2 * SIZE(BO)
  1215. LFD f23, 3 * SIZE(BO)
  1216. LFD f24, 4 * SIZE(BO)
  1217. LFD f25, 5 * SIZE(BO)
  1218. LFD f26, 6 * SIZE(BO)
  1219. LFD f27, 7 * SIZE(BO)
  1220. srawi. r0, TEMP, 2
  1221. mtspr CTR, r0
  1222. #endif
  1223. ble LL(55)
  1224. .align 5
  1225. LL(52):
  1226. FMADD f0, f16, f20, f0
  1227. FMADD f1, f17, f20, f1
  1228. FMADD f2, f16, f21, f2
  1229. FMADD f3, f17, f21, f3
  1230. FMADD f4, f18, f22, f4
  1231. FMADD f5, f19, f22, f5
  1232. FMADD f6, f18, f23, f6
  1233. FMADD f7, f19, f23, f7
  1234. LFD f16, 4 * SIZE(AO)
  1235. LFD f17, 5 * SIZE(AO)
  1236. LFD f18, 6 * SIZE(AO)
  1237. LFD f19, 7 * SIZE(AO)
  1238. LFD f20, 8 * SIZE(BO)
  1239. LFD f21, 9 * SIZE(BO)
  1240. LFD f22, 10 * SIZE(BO)
  1241. LFD f23, 11 * SIZE(BO)
  1242. FMADD f0, f16, f24, f0
  1243. FMADD f1, f17, f24, f1
  1244. FMADD f2, f16, f25, f2
  1245. FMADD f3, f17, f25, f3
  1246. FMADD f4, f18, f26, f4
  1247. FMADD f5, f19, f26, f5
  1248. FMADD f6, f18, f27, f6
  1249. FMADD f7, f19, f27, f7
  1250. LFD f16, 8 * SIZE(AO)
  1251. LFD f17, 9 * SIZE(AO)
  1252. LFD f18, 10 * SIZE(AO)
  1253. LFD f19, 11 * SIZE(AO)
  1254. LFD f24, 12 * SIZE(BO)
  1255. LFD f25, 13 * SIZE(BO)
  1256. LFD f26, 14 * SIZE(BO)
  1257. LFD f27, 15 * SIZE(BO)
  1258. addi AO, AO, 8 * SIZE
  1259. addi BO, BO, 8 * SIZE
  1260. dcbt AO, PREA
  1261. bdnz LL(52)
  1262. .align 4
  1263. LL(55):
  1264. #if defined(LT) || defined(RN)
  1265. andi. r0, KK, 3
  1266. #else
  1267. andi. r0, TEMP, 3
  1268. #endif
  1269. mtspr CTR, r0
  1270. ble+ LL(58)
  1271. .align 4
  1272. LL(56):
  1273. FMADD f0, f16, f20, f0
  1274. FMADD f1, f17, f20, f1
  1275. FMADD f2, f16, f21, f2
  1276. FMADD f3, f17, f21, f3
  1277. LFD f16, 2 * SIZE(AO)
  1278. LFD f17, 3 * SIZE(AO)
  1279. LFD f20, 2 * SIZE(BO)
  1280. LFD f21, 3 * SIZE(BO)
  1281. addi BO, BO, 2 * SIZE
  1282. addi AO, AO, 2 * SIZE
  1283. bdnz LL(56)
  1284. .align 4
  1285. LL(58):
  1286. FADD f0, f4, f0
  1287. FADD f1, f5, f1
  1288. FADD f2, f6, f2
  1289. FADD f3, f7, f3
  1290. #if defined(LN) || defined(RT)
  1291. #ifdef LN
  1292. subi r0, KK, 2
  1293. #else
  1294. subi r0, KK, 2
  1295. #endif
  1296. slwi TEMP, r0, 1 + BASE_SHIFT
  1297. slwi r0, r0, 1 + BASE_SHIFT
  1298. add AO, AORIG, TEMP
  1299. add BO, B, r0
  1300. #endif
  1301. #if defined(LN) || defined(LT)
  1302. LFD f16, 0 * SIZE(BO)
  1303. LFD f17, 1 * SIZE(BO)
  1304. LFD f20, 2 * SIZE(BO)
  1305. LFD f21, 3 * SIZE(BO)
  1306. FSUB f0, f16, f0
  1307. FSUB f2, f17, f2
  1308. FSUB f1, f20, f1
  1309. FSUB f3, f21, f3
  1310. #else
  1311. LFD f16, 0 * SIZE(AO)
  1312. LFD f17, 1 * SIZE(AO)
  1313. LFD f20, 2 * SIZE(AO)
  1314. LFD f21, 3 * SIZE(AO)
  1315. FSUB f0, f16, f0
  1316. FSUB f1, f17, f1
  1317. FSUB f2, f20, f2
  1318. FSUB f3, f21, f3
  1319. #endif
  1320. #ifdef LN
  1321. LFD f19, 3 * SIZE(AO)
  1322. LFD f20, 2 * SIZE(AO)
  1323. LFD f21, 0 * SIZE(AO)
  1324. FMUL f1, f19, f1
  1325. FMUL f3, f19, f3
  1326. FNMSUB f0, f20, f1, f0
  1327. FNMSUB f2, f20, f3, f2
  1328. FMUL f0, f21, f0
  1329. FMUL f2, f21, f2
  1330. #endif
  1331. #ifdef LT
  1332. LFD f16, 0 * SIZE(AO)
  1333. LFD f17, 1 * SIZE(AO)
  1334. FMUL f0, f16, f0
  1335. FMUL f2, f16, f2
  1336. FNMSUB f1, f17, f0, f1
  1337. FNMSUB f3, f17, f2, f3
  1338. LFD f17, 3 * SIZE(AO)
  1339. FMUL f1, f17, f1
  1340. FMUL f3, f17, f3
  1341. #endif
  1342. #ifdef RN
  1343. LFD f16, 0 * SIZE(BO)
  1344. LFD f17, 1 * SIZE(BO)
  1345. LFD f18, 3 * SIZE(BO)
  1346. FMUL f0, f16, f0
  1347. FMUL f1, f16, f1
  1348. FNMSUB f2, f17, f0, f2
  1349. FNMSUB f3, f17, f1, f3
  1350. FMUL f2, f18, f2
  1351. FMUL f3, f18, f3
  1352. #endif
  1353. #ifdef RT
  1354. LFD f19, 3 * SIZE(BO)
  1355. LFD f20, 2 * SIZE(BO)
  1356. LFD f21, 0 * SIZE(BO)
  1357. FMUL f2, f19, f2
  1358. FMUL f3, f19, f3
  1359. FNMSUB f0, f20, f2, f0
  1360. FNMSUB f1, f20, f3, f1
  1361. FMUL f0, f21, f0
  1362. FMUL f1, f21, f1
  1363. #endif
  1364. #ifdef LN
  1365. subi CO1, CO1, 2 * SIZE
  1366. subi CO2, CO2, 2 * SIZE
  1367. #endif
  1368. #if defined(LN) || defined(LT)
  1369. STFD f0, 0 * SIZE(BO)
  1370. STFD f2, 1 * SIZE(BO)
  1371. STFD f1, 2 * SIZE(BO)
  1372. STFD f3, 3 * SIZE(BO)
  1373. #else
  1374. STFD f0, 0 * SIZE(AO)
  1375. STFD f1, 1 * SIZE(AO)
  1376. STFD f2, 2 * SIZE(AO)
  1377. STFD f3, 3 * SIZE(AO)
  1378. #endif
  1379. STFD f0, 0 * SIZE(CO1)
  1380. STFD f1, 1 * SIZE(CO1)
  1381. STFD f2, 0 * SIZE(CO2)
  1382. STFD f3, 1 * SIZE(CO2)
  1383. lfs f0, FZERO
  1384. fmr f1, f0
  1385. fmr f2, f0
  1386. fmr f3, f0
  1387. fmr f4, f0
  1388. fmr f5, f0
  1389. fmr f6, f0
  1390. fmr f7, f0
  1391. #ifndef LN
  1392. addi CO1, CO1, 2 * SIZE
  1393. addi CO2, CO2, 2 * SIZE
  1394. #endif
  1395. #ifdef RT
  1396. slwi r0, K, 1 + BASE_SHIFT
  1397. add AORIG, AORIG, r0
  1398. #endif
  1399. #if defined(LT) || defined(RN)
  1400. sub TEMP, K, KK
  1401. slwi r0, TEMP, 1 + BASE_SHIFT
  1402. slwi TEMP, TEMP, 1 + BASE_SHIFT
  1403. add AO, AO, r0
  1404. add BO, BO, TEMP
  1405. #endif
  1406. #ifdef LN
  1407. subi KK, KK, 2
  1408. #endif
  1409. #ifdef LT
  1410. addi KK, KK, 2
  1411. #endif
  1412. .align 4
  1413. LL(60):
  1414. andi. I, M, 1
  1415. ble LL(69)
  1416. #if defined(LT) || defined(RN)
  1417. LFD f16, 0 * SIZE(AO)
  1418. LFD f17, 1 * SIZE(AO)
  1419. LFD f18, 2 * SIZE(AO)
  1420. LFD f19, 3 * SIZE(AO)
  1421. LFD f20, 0 * SIZE(B)
  1422. LFD f21, 1 * SIZE(B)
  1423. LFD f22, 2 * SIZE(B)
  1424. LFD f23, 3 * SIZE(B)
  1425. LFD f24, 4 * SIZE(B)
  1426. LFD f25, 5 * SIZE(B)
  1427. LFD f26, 6 * SIZE(B)
  1428. LFD f27, 7 * SIZE(B)
  1429. srawi. r0, KK, 2
  1430. mtspr CTR, r0
  1431. mr BO, B
  1432. #else
  1433. #ifdef LN
  1434. slwi r0, K, BASE_SHIFT
  1435. sub AORIG, AORIG, r0
  1436. #endif
  1437. slwi r0, KK, 0 + BASE_SHIFT
  1438. slwi TEMP, KK, 1 + BASE_SHIFT
  1439. add AO, AORIG, r0
  1440. add BO, B, TEMP
  1441. sub TEMP, K, KK
  1442. LFD f16, 0 * SIZE(AO)
  1443. LFD f17, 1 * SIZE(AO)
  1444. LFD f18, 2 * SIZE(AO)
  1445. LFD f19, 3 * SIZE(AO)
  1446. LFD f20, 0 * SIZE(BO)
  1447. LFD f21, 1 * SIZE(BO)
  1448. LFD f22, 2 * SIZE(BO)
  1449. LFD f23, 3 * SIZE(BO)
  1450. LFD f24, 4 * SIZE(BO)
  1451. LFD f25, 5 * SIZE(BO)
  1452. LFD f26, 6 * SIZE(BO)
  1453. LFD f27, 7 * SIZE(BO)
  1454. srawi. r0, TEMP, 2
  1455. mtspr CTR, r0
  1456. #endif
  1457. ble LL(65)
  1458. .align 5
  1459. LL(62):
  1460. FMADD f0, f16, f20, f0
  1461. FMADD f1, f16, f21, f1
  1462. FMADD f2, f17, f22, f2
  1463. FMADD f3, f17, f23, f3
  1464. LFD f20, 8 * SIZE(BO)
  1465. LFD f21, 9 * SIZE(BO)
  1466. LFD f22, 10 * SIZE(BO)
  1467. LFD f23, 11 * SIZE(BO)
  1468. FMADD f0, f18, f24, f0
  1469. FMADD f1, f18, f25, f1
  1470. FMADD f2, f19, f26, f2
  1471. FMADD f3, f19, f27, f3
  1472. LFD f16, 4 * SIZE(AO)
  1473. LFD f17, 5 * SIZE(AO)
  1474. LFD f18, 6 * SIZE(AO)
  1475. LFD f19, 7 * SIZE(AO)
  1476. LFD f24, 12 * SIZE(BO)
  1477. LFD f25, 13 * SIZE(BO)
  1478. LFD f26, 14 * SIZE(BO)
  1479. LFD f27, 15 * SIZE(BO)
  1480. addi AO, AO, 4 * SIZE
  1481. addi BO, BO, 8 * SIZE
  1482. bdnz LL(62)
  1483. .align 4
  1484. LL(65):
  1485. #if defined(LT) || defined(RN)
  1486. andi. r0, KK, 3
  1487. #else
  1488. andi. r0, TEMP, 3
  1489. #endif
  1490. mtspr CTR, r0
  1491. ble+ LL(68)
  1492. .align 4
  1493. LL(66):
  1494. FMADD f0, f16, f20, f0
  1495. FMADD f1, f16, f21, f1
  1496. LFD f16, 1 * SIZE(AO)
  1497. LFD f20, 2 * SIZE(BO)
  1498. LFD f21, 3 * SIZE(BO)
  1499. addi BO, BO, 2 * SIZE
  1500. addi AO, AO, 1 * SIZE
  1501. bdnz LL(66)
  1502. .align 4
  1503. LL(68):
  1504. FADD f0, f2, f0
  1505. FADD f1, f3, f1
  1506. #if defined(LN) || defined(RT)
  1507. #ifdef LN
  1508. subi r0, KK, 1
  1509. #else
  1510. subi r0, KK, 2
  1511. #endif
  1512. slwi TEMP, r0, 0 + BASE_SHIFT
  1513. slwi r0, r0, 1 + BASE_SHIFT
  1514. add AO, AORIG, TEMP
  1515. add BO, B, r0
  1516. #endif
  1517. #if defined(LN) || defined(LT)
  1518. LFD f16, 0 * SIZE(BO)
  1519. LFD f17, 1 * SIZE(BO)
  1520. FSUB f0, f16, f0
  1521. FSUB f1, f17, f1
  1522. #else
  1523. LFD f16, 0 * SIZE(AO)
  1524. LFD f20, 1 * SIZE(AO)
  1525. FSUB f0, f16, f0
  1526. FSUB f1, f20, f1
  1527. #endif
  1528. #ifdef LN
  1529. LFD f21, 0 * SIZE(AO)
  1530. FMUL f0, f21, f0
  1531. FMUL f1, f21, f1
  1532. #endif
  1533. #ifdef LT
  1534. LFD f16, 0 * SIZE(AO)
  1535. FMUL f0, f16, f0
  1536. FMUL f1, f16, f1
  1537. #endif
  1538. #ifdef RN
  1539. LFD f16, 0 * SIZE(BO)
  1540. LFD f17, 1 * SIZE(BO)
  1541. LFD f18, 3 * SIZE(BO)
  1542. FMUL f0, f16, f0
  1543. FNMSUB f1, f17, f0, f1
  1544. FMUL f1, f18, f1
  1545. #endif
  1546. #ifdef RT
  1547. LFD f19, 3 * SIZE(BO)
  1548. LFD f20, 2 * SIZE(BO)
  1549. LFD f21, 0 * SIZE(BO)
  1550. FMUL f1, f19, f1
  1551. FNMSUB f0, f20, f1, f0
  1552. FMUL f0, f21, f0
  1553. #endif
  1554. #ifdef LN
  1555. subi CO1, CO1, 1 * SIZE
  1556. subi CO2, CO2, 1 * SIZE
  1557. #endif
  1558. #if defined(LN) || defined(LT)
  1559. STFD f0, 0 * SIZE(BO)
  1560. STFD f1, 1 * SIZE(BO)
  1561. #else
  1562. STFD f0, 0 * SIZE(AO)
  1563. STFD f1, 1 * SIZE(AO)
  1564. #endif
  1565. STFD f0, 0 * SIZE(CO1)
  1566. STFD f1, 0 * SIZE(CO2)
  1567. lfs f0, FZERO
  1568. fmr f1, f0
  1569. fmr f4, f0
  1570. fmr f5, f0
  1571. #ifndef LN
  1572. addi CO1, CO1, 1 * SIZE
  1573. addi CO2, CO2, 1 * SIZE
  1574. #endif
  1575. #ifdef RT
  1576. slwi r0, K, 0 + BASE_SHIFT
  1577. add AORIG, AORIG, r0
  1578. #endif
  1579. #if defined(LT) || defined(RN)
  1580. sub TEMP, K, KK
  1581. slwi r0, TEMP, 0 + BASE_SHIFT
  1582. slwi TEMP, TEMP, 1 + BASE_SHIFT
  1583. add AO, AO, r0
  1584. add BO, BO, TEMP
  1585. #endif
  1586. #ifdef LN
  1587. subi KK, KK, 1
  1588. #endif
  1589. #ifdef LT
  1590. addi KK, KK, 1
  1591. #endif
  1592. .align 4
  1593. LL(69):
  1594. #ifdef LN
  1595. slwi r0, K, 1 + BASE_SHIFT
  1596. add B, B, r0
  1597. #endif
  1598. #if defined(LT) || defined(RN)
  1599. mr B, BO
  1600. #endif
  1601. #ifdef RN
  1602. addi KK, KK, 2
  1603. #endif
  1604. #ifdef RT
  1605. subi KK, KK, 2
  1606. #endif
  1607. lfs f0, FZERO
  1608. .align 4
  1609. LL(09):
  1610. srawi. J, N, 2
  1611. ble LL(999)
  1612. .align 4
  1613. LL(10):
  1614. #ifdef RT
  1615. slwi r0, K, 2 + BASE_SHIFT
  1616. sub B, B, r0
  1617. slwi r0, LDC, 2
  1618. sub C, C, r0
  1619. #endif
  1620. mr CO1, C
  1621. add CO2, C, LDC
  1622. add CO3, CO2, LDC
  1623. add CO4, CO3, LDC
  1624. #ifdef LN
  1625. add KK, M, OFFSET
  1626. #endif
  1627. #ifdef LT
  1628. mr KK, OFFSET
  1629. #endif
  1630. fmr f1, f0
  1631. fmr f2, f0
  1632. fmr f3, f0
  1633. fmr f4, f0
  1634. fmr f5, f0
  1635. fmr f6, f0
  1636. fmr f7, f0
  1637. fmr f8, f0
  1638. fmr f9, f0
  1639. fmr f10, f0
  1640. fmr f11, f0
  1641. fmr f12, f0
  1642. fmr f13, f0
  1643. fmr f14, f0
  1644. fmr f15, f0
  1645. srawi. I, M, 2
  1646. #if defined(LN) || defined(RT)
  1647. mr AORIG, A
  1648. #else
  1649. mr AO, A
  1650. #endif
  1651. #ifndef RT
  1652. add C, CO4, LDC
  1653. #endif
  1654. ble LL(20)
  1655. .align 4
  1656. LL(11):
  1657. #if defined(LT) || defined(RN)
  1658. LFD f16, 0 * SIZE(AO)
  1659. LFD f17, 1 * SIZE(AO)
  1660. LFD f18, 2 * SIZE(AO)
  1661. LFD f19, 3 * SIZE(AO)
  1662. LFD f20, 0 * SIZE(B)
  1663. LFD f21, 1 * SIZE(B)
  1664. LFD f22, 2 * SIZE(B)
  1665. LFD f23, 3 * SIZE(B)
  1666. dcbtst CO1, PREC
  1667. dcbtst CO2, PREC
  1668. dcbtst CO3, PREC
  1669. dcbtst CO4, PREC
  1670. srawi. r0, KK, 3
  1671. mtspr CTR, r0
  1672. mr BO, B
  1673. #else
  1674. #ifdef LN
  1675. slwi r0, K, 2 + BASE_SHIFT
  1676. sub AORIG, AORIG, r0
  1677. #endif
  1678. slwi TEMP, KK, 2 + BASE_SHIFT
  1679. add AO, AORIG, TEMP
  1680. add BO, B, TEMP
  1681. sub TEMP, K, KK
  1682. LFD f16, 0 * SIZE(AO)
  1683. LFD f17, 1 * SIZE(AO)
  1684. LFD f18, 2 * SIZE(AO)
  1685. LFD f19, 3 * SIZE(AO)
  1686. LFD f20, 0 * SIZE(BO)
  1687. LFD f21, 1 * SIZE(BO)
  1688. LFD f22, 2 * SIZE(BO)
  1689. LFD f23, 3 * SIZE(BO)
  1690. dcbtst CO1, PREC
  1691. dcbtst CO2, PREC
  1692. dcbtst CO3, PREC
  1693. dcbtst CO4, PREC
  1694. srawi. r0, TEMP, 3
  1695. mtspr CTR, r0
  1696. #endif
  1697. ble LL(15)
  1698. .align 4
  1699. LL(12):
  1700. dcbt AO, PREA
  1701. dcbtst BO, PREA
  1702. FMADD f0, f16, f20, f0
  1703. FMADD f4, f16, f21, f4
  1704. FMADD f8, f16, f22, f8
  1705. FMADD f12, f16, f23, f12
  1706. LFD f24, 4 * SIZE(AO)
  1707. LFD f28, 4 * SIZE(BO)
  1708. LFD f25, 5 * SIZE(AO)
  1709. LFD f29, 5 * SIZE(BO)
  1710. FMADD f1, f17, f20, f1
  1711. FMADD f5, f17, f21, f5
  1712. FMADD f9, f17, f22, f9
  1713. FMADD f13, f17, f23, f13
  1714. FMADD f2, f18, f20, f2
  1715. FMADD f6, f18, f21, f6
  1716. FMADD f10, f18, f22, f10
  1717. FMADD f14, f18, f23, f14
  1718. LFD f26, 6 * SIZE(AO)
  1719. LFD f30, 6 * SIZE(BO)
  1720. LFD f27, 7 * SIZE(AO)
  1721. LFD f31, 7 * SIZE(BO)
  1722. FMADD f3, f19, f20, f3
  1723. FMADD f7, f19, f21, f7
  1724. FMADD f11, f19, f22, f11
  1725. FMADD f15, f19, f23, f15
  1726. FMADD f0, f24, f28, f0
  1727. FMADD f4, f24, f29, f4
  1728. FMADD f8, f24, f30, f8
  1729. FMADD f12, f24, f31, f12
  1730. LFD f16, 8 * SIZE(AO)
  1731. LFD f20, 8 * SIZE(BO)
  1732. LFD f17, 9 * SIZE(AO)
  1733. LFD f21, 9 * SIZE(BO)
  1734. FMADD f1, f25, f28, f1
  1735. FMADD f5, f25, f29, f5
  1736. FMADD f9, f25, f30, f9
  1737. FMADD f13, f25, f31, f13
  1738. FMADD f2, f26, f28, f2
  1739. FMADD f6, f26, f29, f6
  1740. FMADD f10, f26, f30, f10
  1741. FMADD f14, f26, f31, f14
  1742. LFD f18, 10 * SIZE(AO)
  1743. LFD f22, 10 * SIZE(BO)
  1744. LFD f19, 11 * SIZE(AO)
  1745. LFD f23, 11 * SIZE(BO)
  1746. FMADD f3, f27, f28, f3
  1747. FMADD f7, f27, f29, f7
  1748. FMADD f11, f27, f30, f11
  1749. FMADD f15, f27, f31, f15
  1750. FMADD f0, f16, f20, f0
  1751. FMADD f4, f16, f21, f4
  1752. FMADD f8, f16, f22, f8
  1753. FMADD f12, f16, f23, f12
  1754. LFD f24, 12 * SIZE(AO)
  1755. LFD f28, 12 * SIZE(BO)
  1756. LFD f25, 13 * SIZE(AO)
  1757. LFD f29, 13 * SIZE(BO)
  1758. FMADD f1, f17, f20, f1
  1759. FMADD f5, f17, f21, f5
  1760. FMADD f9, f17, f22, f9
  1761. FMADD f13, f17, f23, f13
  1762. FMADD f2, f18, f20, f2
  1763. FMADD f6, f18, f21, f6
  1764. FMADD f10, f18, f22, f10
  1765. FMADD f14, f18, f23, f14
  1766. LFD f26, 14 * SIZE(AO)
  1767. LFD f30, 14 * SIZE(BO)
  1768. LFD f27, 15 * SIZE(AO)
  1769. LFD f31, 15 * SIZE(BO)
  1770. FMADD f3, f19, f20, f3
  1771. FMADD f7, f19, f21, f7
  1772. FMADD f11, f19, f22, f11
  1773. FMADD f15, f19, f23, f15
  1774. FMADD f0, f24, f28, f0
  1775. FMADD f4, f24, f29, f4
  1776. FMADD f8, f24, f30, f8
  1777. FMADD f12, f24, f31, f12
  1778. LFD f16, 16 * SIZE(AO)
  1779. LFD f20, 16 * SIZE(BO)
  1780. LFD f17, 17 * SIZE(AO)
  1781. LFD f21, 17 * SIZE(BO)
  1782. FMADD f1, f25, f28, f1
  1783. FMADD f5, f25, f29, f5
  1784. FMADD f9, f25, f30, f9
  1785. FMADD f13, f25, f31, f13
  1786. FMADD f2, f26, f28, f2
  1787. FMADD f6, f26, f29, f6
  1788. FMADD f10, f26, f30, f10
  1789. FMADD f14, f26, f31, f14
  1790. LFD f18, 18 * SIZE(AO)
  1791. LFD f22, 18 * SIZE(BO)
  1792. LFD f19, 19 * SIZE(AO)
  1793. LFD f23, 19 * SIZE(BO)
  1794. FMADD f3, f27, f28, f3
  1795. FMADD f7, f27, f29, f7
  1796. FMADD f11, f27, f30, f11
  1797. FMADD f15, f27, f31, f15
  1798. FMADD f0, f16, f20, f0
  1799. FMADD f4, f16, f21, f4
  1800. FMADD f8, f16, f22, f8
  1801. FMADD f12, f16, f23, f12
  1802. LFD f24, 20 * SIZE(AO)
  1803. LFD f28, 20 * SIZE(BO)
  1804. LFD f25, 21 * SIZE(AO)
  1805. LFD f29, 21 * SIZE(BO)
  1806. FMADD f1, f17, f20, f1
  1807. FMADD f5, f17, f21, f5
  1808. FMADD f9, f17, f22, f9
  1809. FMADD f13, f17, f23, f13
  1810. FMADD f2, f18, f20, f2
  1811. FMADD f6, f18, f21, f6
  1812. FMADD f10, f18, f22, f10
  1813. FMADD f14, f18, f23, f14
  1814. LFD f26, 22 * SIZE(AO)
  1815. LFD f30, 22 * SIZE(BO)
  1816. LFD f27, 23 * SIZE(AO)
  1817. LFD f31, 23 * SIZE(BO)
  1818. FMADD f3, f19, f20, f3
  1819. FMADD f7, f19, f21, f7
  1820. FMADD f11, f19, f22, f11
  1821. FMADD f15, f19, f23, f15
  1822. FMADD f0, f24, f28, f0
  1823. FMADD f4, f24, f29, f4
  1824. FMADD f8, f24, f30, f8
  1825. FMADD f12, f24, f31, f12
  1826. LFD f16, 24 * SIZE(AO)
  1827. LFD f20, 24 * SIZE(BO)
  1828. LFD f17, 25 * SIZE(AO)
  1829. LFD f21, 25 * SIZE(BO)
  1830. FMADD f1, f25, f28, f1
  1831. FMADD f5, f25, f29, f5
  1832. FMADD f9, f25, f30, f9
  1833. FMADD f13, f25, f31, f13
  1834. FMADD f2, f26, f28, f2
  1835. FMADD f6, f26, f29, f6
  1836. FMADD f10, f26, f30, f10
  1837. FMADD f14, f26, f31, f14
  1838. LFD f18, 26 * SIZE(AO)
  1839. LFD f22, 26 * SIZE(BO)
  1840. LFD f19, 27 * SIZE(AO)
  1841. LFD f23, 27 * SIZE(BO)
  1842. FMADD f3, f27, f28, f3
  1843. FMADD f7, f27, f29, f7
  1844. FMADD f11, f27, f30, f11
  1845. FMADD f15, f27, f31, f15
  1846. FMADD f0, f16, f20, f0
  1847. FMADD f4, f16, f21, f4
  1848. FMADD f8, f16, f22, f8
  1849. FMADD f12, f16, f23, f12
  1850. LFD f24, 28 * SIZE(AO)
  1851. LFD f28, 28 * SIZE(BO)
  1852. LFD f25, 29 * SIZE(AO)
  1853. LFD f29, 29 * SIZE(BO)
  1854. FMADD f1, f17, f20, f1
  1855. FMADD f5, f17, f21, f5
  1856. FMADD f9, f17, f22, f9
  1857. FMADD f13, f17, f23, f13
  1858. FMADD f2, f18, f20, f2
  1859. FMADD f6, f18, f21, f6
  1860. FMADD f10, f18, f22, f10
  1861. FMADD f14, f18, f23, f14
  1862. LFD f26, 30 * SIZE(AO)
  1863. LFD f30, 30 * SIZE(BO)
  1864. LFD f27, 31 * SIZE(AO)
  1865. LFD f31, 31 * SIZE(BO)
  1866. FMADD f3, f19, f20, f3
  1867. FMADD f7, f19, f21, f7
  1868. FMADD f11, f19, f22, f11
  1869. FMADD f15, f19, f23, f15
  1870. FMADD f0, f24, f28, f0
  1871. FMADD f4, f24, f29, f4
  1872. FMADD f8, f24, f30, f8
  1873. FMADD f12, f24, f31, f12
  1874. LFD f16, 32 * SIZE(AO)
  1875. LFD f20, 32 * SIZE(BO)
  1876. LFD f17, 33 * SIZE(AO)
  1877. LFD f21, 33 * SIZE(BO)
  1878. FMADD f1, f25, f28, f1
  1879. FMADD f5, f25, f29, f5
  1880. FMADD f9, f25, f30, f9
  1881. FMADD f13, f25, f31, f13
  1882. FMADD f2, f26, f28, f2
  1883. FMADD f6, f26, f29, f6
  1884. FMADD f10, f26, f30, f10
  1885. FMADD f14, f26, f31, f14
  1886. LFD f18, 34 * SIZE(AO)
  1887. LFD f22, 34 * SIZE(BO)
  1888. LFD f19, 35 * SIZE(AO)
  1889. LFD f23, 35 * SIZE(BO)
  1890. addi AO, AO, 32 * SIZE
  1891. addi BO, BO, 32 * SIZE
  1892. FMADD f3, f27, f28, f3
  1893. FMADD f7, f27, f29, f7
  1894. FMADD f11, f27, f30, f11
  1895. FMADD f15, f27, f31, f15
  1896. bdnz LL(12)
  1897. .align 4
  1898. LL(15):
  1899. #if defined(LT) || defined(RN)
  1900. andi. r0, KK, 7
  1901. #else
  1902. andi. r0, TEMP, 7
  1903. #endif
  1904. mtspr CTR, r0
  1905. ble+ LL(18)
  1906. .align 4
  1907. LL(16):
  1908. FMADD f0, f16, f20, f0
  1909. FMADD f4, f16, f21, f4
  1910. FMADD f8, f16, f22, f8
  1911. FMADD f12, f16, f23, f12
  1912. FMADD f1, f17, f20, f1
  1913. FMADD f5, f17, f21, f5
  1914. FMADD f9, f17, f22, f9
  1915. FMADD f13, f17, f23, f13
  1916. FMADD f2, f18, f20, f2
  1917. FMADD f6, f18, f21, f6
  1918. FMADD f10, f18, f22, f10
  1919. FMADD f14, f18, f23, f14
  1920. FMADD f3, f19, f20, f3
  1921. FMADD f7, f19, f21, f7
  1922. FMADD f11, f19, f22, f11
  1923. FMADD f15, f19, f23, f15
  1924. LFD f16, 4 * SIZE(AO)
  1925. LFD f17, 5 * SIZE(AO)
  1926. LFD f18, 6 * SIZE(AO)
  1927. LFD f19, 7 * SIZE(AO)
  1928. LFD f20, 4 * SIZE(BO)
  1929. LFD f21, 5 * SIZE(BO)
  1930. LFD f22, 6 * SIZE(BO)
  1931. LFD f23, 7 * SIZE(BO)
  1932. addi BO, BO, 4 * SIZE
  1933. addi AO, AO, 4 * SIZE
  1934. bdnz LL(16)
  1935. .align 4
  1936. LL(18):
  1937. #if defined(LN) || defined(RT)
  1938. subi r0, KK, 4
  1939. slwi r0, r0, 2 + BASE_SHIFT
  1940. add AO, AORIG, r0
  1941. add BO, B, r0
  1942. #endif
  1943. #if defined(LN) || defined(LT)
  1944. LFD f16, 0 * SIZE(BO)
  1945. LFD f17, 1 * SIZE(BO)
  1946. LFD f18, 2 * SIZE(BO)
  1947. LFD f19, 3 * SIZE(BO)
  1948. LFD f20, 4 * SIZE(BO)
  1949. LFD f21, 5 * SIZE(BO)
  1950. LFD f22, 6 * SIZE(BO)
  1951. LFD f23, 7 * SIZE(BO)
  1952. LFD f24, 8 * SIZE(BO)
  1953. LFD f25, 9 * SIZE(BO)
  1954. LFD f26, 10 * SIZE(BO)
  1955. LFD f27, 11 * SIZE(BO)
  1956. LFD f28, 12 * SIZE(BO)
  1957. LFD f29, 13 * SIZE(BO)
  1958. LFD f30, 14 * SIZE(BO)
  1959. LFD f31, 15 * SIZE(BO)
  1960. FSUB f0, f16, f0
  1961. FSUB f4, f17, f4
  1962. FSUB f8, f18, f8
  1963. FSUB f12, f19, f12
  1964. FSUB f1, f20, f1
  1965. FSUB f5, f21, f5
  1966. FSUB f9, f22, f9
  1967. FSUB f13, f23, f13
  1968. FSUB f2, f24, f2
  1969. FSUB f6, f25, f6
  1970. FSUB f10, f26, f10
  1971. FSUB f14, f27, f14
  1972. FSUB f3, f28, f3
  1973. FSUB f7, f29, f7
  1974. FSUB f11, f30, f11
  1975. FSUB f15, f31, f15
  1976. #else
  1977. LFD f16, 0 * SIZE(AO)
  1978. LFD f17, 1 * SIZE(AO)
  1979. LFD f18, 2 * SIZE(AO)
  1980. LFD f19, 3 * SIZE(AO)
  1981. LFD f20, 4 * SIZE(AO)
  1982. LFD f21, 5 * SIZE(AO)
  1983. LFD f22, 6 * SIZE(AO)
  1984. LFD f23, 7 * SIZE(AO)
  1985. LFD f24, 8 * SIZE(AO)
  1986. LFD f25, 9 * SIZE(AO)
  1987. LFD f26, 10 * SIZE(AO)
  1988. LFD f27, 11 * SIZE(AO)
  1989. LFD f28, 12 * SIZE(AO)
  1990. LFD f29, 13 * SIZE(AO)
  1991. LFD f30, 14 * SIZE(AO)
  1992. LFD f31, 15 * SIZE(AO)
  1993. FSUB f0, f16, f0
  1994. FSUB f1, f17, f1
  1995. FSUB f2, f18, f2
  1996. FSUB f3, f19, f3
  1997. FSUB f4, f20, f4
  1998. FSUB f5, f21, f5
  1999. FSUB f6, f22, f6
  2000. FSUB f7, f23, f7
  2001. FSUB f8, f24, f8
  2002. FSUB f9, f25, f9
  2003. FSUB f10, f26, f10
  2004. FSUB f11, f27, f11
  2005. FSUB f12, f28, f12
  2006. FSUB f13, f29, f13
  2007. FSUB f14, f30, f14
  2008. FSUB f15, f31, f15
  2009. #endif
  2010. #ifdef LN
  2011. LFD f16, 15 * SIZE(AO)
  2012. LFD f17, 14 * SIZE(AO)
  2013. LFD f18, 13 * SIZE(AO)
  2014. LFD f19, 12 * SIZE(AO)
  2015. FMUL f3, f16, f3
  2016. FMUL f7, f16, f7
  2017. FMUL f11, f16, f11
  2018. FMUL f15, f16, f15
  2019. FNMSUB f2, f17, f3, f2
  2020. FNMSUB f6, f17, f7, f6
  2021. FNMSUB f10, f17, f11, f10
  2022. FNMSUB f14, f17, f15, f14
  2023. FNMSUB f1, f18, f3, f1
  2024. FNMSUB f5, f18, f7, f5
  2025. FNMSUB f9, f18, f11, f9
  2026. FNMSUB f13, f18, f15, f13
  2027. FNMSUB f0, f19, f3, f0
  2028. FNMSUB f4, f19, f7, f4
  2029. FNMSUB f8, f19, f11, f8
  2030. FNMSUB f12, f19, f15, f12
  2031. LFD f16, 10 * SIZE(AO)
  2032. LFD f17, 9 * SIZE(AO)
  2033. LFD f18, 8 * SIZE(AO)
  2034. LFD f19, 5 * SIZE(AO)
  2035. FMUL f2, f16, f2
  2036. FMUL f6, f16, f6
  2037. FMUL f10, f16, f10
  2038. FMUL f14, f16, f14
  2039. LFD f20, 4 * SIZE(AO)
  2040. LFD f21, 0 * SIZE(AO)
  2041. FNMSUB f1, f17, f2, f1
  2042. FNMSUB f5, f17, f6, f5
  2043. FNMSUB f9, f17, f10, f9
  2044. FNMSUB f13, f17, f14, f13
  2045. FNMSUB f0, f18, f2, f0
  2046. FNMSUB f4, f18, f6, f4
  2047. FNMSUB f8, f18, f10, f8
  2048. FNMSUB f12, f18, f14, f12
  2049. FMUL f1, f19, f1
  2050. FMUL f5, f19, f5
  2051. FMUL f9, f19, f9
  2052. FMUL f13, f19, f13
  2053. FNMSUB f0, f20, f1, f0
  2054. FNMSUB f4, f20, f5, f4
  2055. FNMSUB f8, f20, f9, f8
  2056. FNMSUB f12, f20, f13, f12
  2057. FMUL f0, f21, f0
  2058. FMUL f4, f21, f4
  2059. FMUL f8, f21, f8
  2060. FMUL f12, f21, f12
  2061. #endif
  2062. #ifdef LT
  2063. LFD f16, 0 * SIZE(AO)
  2064. LFD f17, 1 * SIZE(AO)
  2065. LFD f18, 2 * SIZE(AO)
  2066. LFD f19, 3 * SIZE(AO)
  2067. FMUL f0, f16, f0
  2068. FMUL f4, f16, f4
  2069. FMUL f8, f16, f8
  2070. FMUL f12, f16, f12
  2071. FNMSUB f1, f17, f0, f1
  2072. FNMSUB f5, f17, f4, f5
  2073. FNMSUB f9, f17, f8, f9
  2074. FNMSUB f13, f17, f12, f13
  2075. FNMSUB f2, f18, f0, f2
  2076. FNMSUB f6, f18, f4, f6
  2077. FNMSUB f10, f18, f8, f10
  2078. FNMSUB f14, f18, f12, f14
  2079. FNMSUB f3, f19, f0, f3
  2080. FNMSUB f7, f19, f4, f7
  2081. FNMSUB f11, f19, f8, f11
  2082. FNMSUB f15, f19, f12, f15
  2083. LFD f16, 5 * SIZE(AO)
  2084. LFD f17, 6 * SIZE(AO)
  2085. LFD f18, 7 * SIZE(AO)
  2086. LFD f19, 10 * SIZE(AO)
  2087. FMUL f1, f16, f1
  2088. FMUL f5, f16, f5
  2089. FMUL f9, f16, f9
  2090. FMUL f13, f16, f13
  2091. LFD f20, 11 * SIZE(AO)
  2092. LFD f21, 15 * SIZE(AO)
  2093. FNMSUB f2, f17, f1, f2
  2094. FNMSUB f6, f17, f5, f6
  2095. FNMSUB f10, f17, f9, f10
  2096. FNMSUB f14, f17, f13, f14
  2097. FNMSUB f3, f18, f1, f3
  2098. FNMSUB f7, f18, f5, f7
  2099. FNMSUB f11, f18, f9, f11
  2100. FNMSUB f15, f18, f13, f15
  2101. FMUL f2, f19, f2
  2102. FMUL f6, f19, f6
  2103. FMUL f10, f19, f10
  2104. FMUL f14, f19, f14
  2105. FNMSUB f3, f20, f2, f3
  2106. FNMSUB f7, f20, f6, f7
  2107. FNMSUB f11, f20, f10, f11
  2108. FNMSUB f15, f20, f14, f15
  2109. FMUL f3, f21, f3
  2110. FMUL f7, f21, f7
  2111. FMUL f11, f21, f11
  2112. FMUL f15, f21, f15
  2113. #endif
  2114. #ifdef RN
  2115. LFD f16, 0 * SIZE(BO)
  2116. LFD f17, 1 * SIZE(BO)
  2117. LFD f18, 2 * SIZE(BO)
  2118. LFD f19, 3 * SIZE(BO)
  2119. FMUL f0, f16, f0
  2120. FMUL f1, f16, f1
  2121. FMUL f2, f16, f2
  2122. FMUL f3, f16, f3
  2123. FNMSUB f4, f17, f0, f4
  2124. FNMSUB f5, f17, f1, f5
  2125. FNMSUB f6, f17, f2, f6
  2126. FNMSUB f7, f17, f3, f7
  2127. FNMSUB f8, f18, f0, f8
  2128. FNMSUB f9, f18, f1, f9
  2129. FNMSUB f10, f18, f2, f10
  2130. FNMSUB f11, f18, f3, f11
  2131. FNMSUB f12, f19, f0, f12
  2132. FNMSUB f13, f19, f1, f13
  2133. FNMSUB f14, f19, f2, f14
  2134. FNMSUB f15, f19, f3, f15
  2135. LFD f16, 5 * SIZE(BO)
  2136. LFD f17, 6 * SIZE(BO)
  2137. LFD f18, 7 * SIZE(BO)
  2138. LFD f19, 10 * SIZE(BO)
  2139. FMUL f4, f16, f4
  2140. FMUL f5, f16, f5
  2141. FMUL f6, f16, f6
  2142. FMUL f7, f16, f7
  2143. LFD f20, 11 * SIZE(BO)
  2144. LFD f21, 15 * SIZE(BO)
  2145. FNMSUB f8, f17, f4, f8
  2146. FNMSUB f9, f17, f5, f9
  2147. FNMSUB f10, f17, f6, f10
  2148. FNMSUB f11, f17, f7, f11
  2149. FNMSUB f12, f18, f4, f12
  2150. FNMSUB f13, f18, f5, f13
  2151. FNMSUB f14, f18, f6, f14
  2152. FNMSUB f15, f18, f7, f15
  2153. FMUL f8, f19, f8
  2154. FMUL f9, f19, f9
  2155. FMUL f10, f19, f10
  2156. FMUL f11, f19, f11
  2157. FNMSUB f12, f20, f8, f12
  2158. FNMSUB f13, f20, f9, f13
  2159. FNMSUB f14, f20, f10, f14
  2160. FNMSUB f15, f20, f11, f15
  2161. FMUL f12, f21, f12
  2162. FMUL f13, f21, f13
  2163. FMUL f14, f21, f14
  2164. FMUL f15, f21, f15
  2165. #endif
  2166. #ifdef RT
  2167. LFD f16, 15 * SIZE(BO)
  2168. LFD f17, 14 * SIZE(BO)
  2169. LFD f18, 13 * SIZE(BO)
  2170. LFD f19, 12 * SIZE(BO)
  2171. FMUL f12, f16, f12
  2172. FMUL f13, f16, f13
  2173. FMUL f14, f16, f14
  2174. FMUL f15, f16, f15
  2175. FNMSUB f8, f17, f12, f8
  2176. FNMSUB f9, f17, f13, f9
  2177. FNMSUB f10, f17, f14, f10
  2178. FNMSUB f11, f17, f15, f11
  2179. FNMSUB f4, f18, f12, f4
  2180. FNMSUB f5, f18, f13, f5
  2181. FNMSUB f6, f18, f14, f6
  2182. FNMSUB f7, f18, f15, f7
  2183. FNMSUB f0, f19, f12, f0
  2184. FNMSUB f1, f19, f13, f1
  2185. FNMSUB f2, f19, f14, f2
  2186. FNMSUB f3, f19, f15, f3
  2187. LFD f16, 10 * SIZE(BO)
  2188. LFD f17, 9 * SIZE(BO)
  2189. LFD f18, 8 * SIZE(BO)
  2190. LFD f19, 5 * SIZE(BO)
  2191. FMUL f8, f16, f8
  2192. FMUL f9, f16, f9
  2193. FMUL f10, f16, f10
  2194. FMUL f11, f16, f11
  2195. LFD f20, 4 * SIZE(BO)
  2196. LFD f21, 0 * SIZE(BO)
  2197. FNMSUB f4, f17, f8, f4
  2198. FNMSUB f5, f17, f9, f5
  2199. FNMSUB f6, f17, f10, f6
  2200. FNMSUB f7, f17, f11, f7
  2201. FNMSUB f0, f18, f8, f0
  2202. FNMSUB f1, f18, f9, f1
  2203. FNMSUB f2, f18, f10, f2
  2204. FNMSUB f3, f18, f11, f3
  2205. FMUL f4, f19, f4
  2206. FMUL f5, f19, f5
  2207. FMUL f6, f19, f6
  2208. FMUL f7, f19, f7
  2209. FNMSUB f0, f20, f4, f0
  2210. FNMSUB f1, f20, f5, f1
  2211. FNMSUB f2, f20, f6, f2
  2212. FNMSUB f3, f20, f7, f3
  2213. FMUL f0, f21, f0
  2214. FMUL f1, f21, f1
  2215. FMUL f2, f21, f2
  2216. FMUL f3, f21, f3
  2217. #endif
  2218. #ifdef LN
  2219. subi CO1, CO1, 4 * SIZE
  2220. subi CO2, CO2, 4 * SIZE
  2221. subi CO3, CO3, 4 * SIZE
  2222. subi CO4, CO4, 4 * SIZE
  2223. #endif
  2224. #if defined(LN) || defined(LT)
  2225. STFD f0, 0 * SIZE(BO)
  2226. STFD f4, 1 * SIZE(BO)
  2227. STFD f8, 2 * SIZE(BO)
  2228. STFD f12, 3 * SIZE(BO)
  2229. STFD f1, 4 * SIZE(BO)
  2230. STFD f5, 5 * SIZE(BO)
  2231. STFD f9, 6 * SIZE(BO)
  2232. STFD f13, 7 * SIZE(BO)
  2233. STFD f2, 8 * SIZE(BO)
  2234. STFD f6, 9 * SIZE(BO)
  2235. STFD f10, 10 * SIZE(BO)
  2236. STFD f14, 11 * SIZE(BO)
  2237. STFD f3, 12 * SIZE(BO)
  2238. STFD f7, 13 * SIZE(BO)
  2239. STFD f11, 14 * SIZE(BO)
  2240. STFD f15, 15 * SIZE(BO)
  2241. #else
  2242. STFD f0, 0 * SIZE(AO)
  2243. STFD f1, 1 * SIZE(AO)
  2244. STFD f2, 2 * SIZE(AO)
  2245. STFD f3, 3 * SIZE(AO)
  2246. STFD f4, 4 * SIZE(AO)
  2247. STFD f5, 5 * SIZE(AO)
  2248. STFD f6, 6 * SIZE(AO)
  2249. STFD f7, 7 * SIZE(AO)
  2250. STFD f8, 8 * SIZE(AO)
  2251. STFD f9, 9 * SIZE(AO)
  2252. STFD f10, 10 * SIZE(AO)
  2253. STFD f11, 11 * SIZE(AO)
  2254. STFD f12, 12 * SIZE(AO)
  2255. STFD f13, 13 * SIZE(AO)
  2256. STFD f14, 14 * SIZE(AO)
  2257. STFD f15, 15 * SIZE(AO)
  2258. #endif
  2259. STFD f0, 0 * SIZE(CO1)
  2260. STFD f1, 1 * SIZE(CO1)
  2261. STFD f2, 2 * SIZE(CO1)
  2262. STFD f3, 3 * SIZE(CO1)
  2263. STFD f4, 0 * SIZE(CO2)
  2264. STFD f5, 1 * SIZE(CO2)
  2265. STFD f6, 2 * SIZE(CO2)
  2266. STFD f7, 3 * SIZE(CO2)
  2267. STFD f8, 0 * SIZE(CO3)
  2268. STFD f9, 1 * SIZE(CO3)
  2269. STFD f10, 2 * SIZE(CO3)
  2270. STFD f11, 3 * SIZE(CO3)
  2271. STFD f12, 0 * SIZE(CO4)
  2272. STFD f13, 1 * SIZE(CO4)
  2273. STFD f14, 2 * SIZE(CO4)
  2274. STFD f15, 3 * SIZE(CO4)
  2275. lfs f0, FZERO
  2276. fmr f1, f0
  2277. fmr f2, f0
  2278. fmr f3, f0
  2279. fmr f4, f0
  2280. fmr f5, f0
  2281. fmr f6, f0
  2282. fmr f7, f0
  2283. fmr f8, f0
  2284. fmr f9, f0
  2285. fmr f10, f0
  2286. fmr f11, f0
  2287. fmr f12, f0
  2288. fmr f13, f0
  2289. fmr f14, f0
  2290. fmr f15, f0
  2291. #ifndef LN
  2292. addi CO1, CO1, 4 * SIZE
  2293. addi CO2, CO2, 4 * SIZE
  2294. addi CO3, CO3, 4 * SIZE
  2295. addi CO4, CO4, 4 * SIZE
  2296. #endif
  2297. #ifdef RT
  2298. slwi r0, K, 2 + BASE_SHIFT
  2299. add AORIG, AORIG, r0
  2300. #endif
  2301. #if defined(LT) || defined(RN)
  2302. sub TEMP, K, KK
  2303. slwi TEMP, TEMP, 2 + BASE_SHIFT
  2304. add AO, AO, TEMP
  2305. add BO, BO, TEMP
  2306. #endif
  2307. #ifdef LT
  2308. addi KK, KK, 4
  2309. #endif
  2310. #ifdef LN
  2311. subi KK, KK, 4
  2312. #endif
  2313. addic. I, I, -1
  2314. bgt+ LL(11)
  2315. .align 4
  2316. LL(20):
  2317. andi. I, M, 2
  2318. ble LL(30)
  2319. #if defined(LT) || defined(RN)
  2320. LFD f16, 0 * SIZE(AO)
  2321. LFD f17, 1 * SIZE(AO)
  2322. LFD f18, 2 * SIZE(AO)
  2323. LFD f19, 3 * SIZE(AO)
  2324. LFD f20, 0 * SIZE(B)
  2325. LFD f21, 1 * SIZE(B)
  2326. LFD f22, 2 * SIZE(B)
  2327. LFD f23, 3 * SIZE(B)
  2328. LFD f24, 4 * SIZE(B)
  2329. LFD f25, 5 * SIZE(B)
  2330. LFD f26, 6 * SIZE(B)
  2331. LFD f27, 7 * SIZE(B)
  2332. srawi. r0, KK, 2
  2333. mtspr CTR, r0
  2334. mr BO, B
  2335. #else
  2336. #ifdef LN
  2337. slwi r0, K, 1 + BASE_SHIFT
  2338. sub AORIG, AORIG, r0
  2339. #endif
  2340. slwi r0, KK, 1 + BASE_SHIFT
  2341. slwi TEMP, KK, 2 + BASE_SHIFT
  2342. add AO, AORIG, r0
  2343. add BO, B, TEMP
  2344. sub TEMP, K, KK
  2345. LFD f16, 0 * SIZE(AO)
  2346. LFD f17, 1 * SIZE(AO)
  2347. LFD f18, 2 * SIZE(AO)
  2348. LFD f19, 3 * SIZE(AO)
  2349. LFD f20, 0 * SIZE(BO)
  2350. LFD f21, 1 * SIZE(BO)
  2351. LFD f22, 2 * SIZE(BO)
  2352. LFD f23, 3 * SIZE(BO)
  2353. LFD f24, 4 * SIZE(BO)
  2354. LFD f25, 5 * SIZE(BO)
  2355. LFD f26, 6 * SIZE(BO)
  2356. LFD f27, 7 * SIZE(BO)
  2357. srawi. r0, TEMP, 2
  2358. mtspr CTR, r0
  2359. #endif
  2360. ble LL(25)
  2361. .align 5
  2362. LL(22):
  2363. FMADD f0, f16, f20, f0
  2364. FMADD f1, f17, f20, f1
  2365. FMADD f4, f16, f21, f4
  2366. FMADD f5, f17, f21, f5
  2367. FMADD f8, f16, f22, f8
  2368. FMADD f9, f17, f22, f9
  2369. FMADD f12, f16, f23, f12
  2370. FMADD f13, f17, f23, f13
  2371. LFD f20, 8 * SIZE(BO)
  2372. LFD f21, 9 * SIZE(BO)
  2373. LFD f22, 10 * SIZE(BO)
  2374. LFD f23, 11 * SIZE(BO)
  2375. FMADD f2, f18, f24, f2
  2376. FMADD f3, f19, f24, f3
  2377. FMADD f6, f18, f25, f6
  2378. FMADD f7, f19, f25, f7
  2379. FMADD f10, f18, f26, f10
  2380. FMADD f11, f19, f26, f11
  2381. FMADD f14, f18, f27, f14
  2382. FMADD f15, f19, f27, f15
  2383. LFD f16, 4 * SIZE(AO)
  2384. LFD f17, 5 * SIZE(AO)
  2385. LFD f18, 6 * SIZE(AO)
  2386. LFD f19, 7 * SIZE(AO)
  2387. FMADD f0, f16, f20, f0
  2388. FMADD f1, f17, f20, f1
  2389. FMADD f4, f16, f21, f4
  2390. FMADD f5, f17, f21, f5
  2391. LFD f24, 12 * SIZE(BO)
  2392. LFD f25, 13 * SIZE(BO)
  2393. LFD f26, 14 * SIZE(BO)
  2394. LFD f27, 15 * SIZE(BO)
  2395. FMADD f8, f16, f22, f8
  2396. FMADD f9, f17, f22, f9
  2397. FMADD f12, f16, f23, f12
  2398. FMADD f13, f17, f23, f13
  2399. LFD f20, 16 * SIZE(BO)
  2400. LFD f21, 17 * SIZE(BO)
  2401. LFD f22, 18 * SIZE(BO)
  2402. LFD f23, 19 * SIZE(BO)
  2403. FMADD f2, f18, f24, f2
  2404. FMADD f3, f19, f24, f3
  2405. FMADD f6, f18, f25, f6
  2406. FMADD f7, f19, f25, f7
  2407. FMADD f10, f18, f26, f10
  2408. FMADD f11, f19, f26, f11
  2409. FMADD f14, f18, f27, f14
  2410. FMADD f15, f19, f27, f15
  2411. LFD f16, 8 * SIZE(AO)
  2412. LFD f17, 9 * SIZE(AO)
  2413. LFD f18, 10 * SIZE(AO)
  2414. LFD f19, 11 * SIZE(AO)
  2415. LFD f24, 20 * SIZE(BO)
  2416. LFD f25, 21 * SIZE(BO)
  2417. LFD f26, 22 * SIZE(BO)
  2418. LFD f27, 23 * SIZE(BO)
  2419. addi AO, AO, 8 * SIZE
  2420. addi BO, BO, 16 * SIZE
  2421. dcbtst AO, PREA
  2422. bdnz LL(22)
  2423. fadd f0, f2, f0
  2424. fadd f1, f3, f1
  2425. fadd f4, f6, f4
  2426. fadd f5, f7, f5
  2427. fadd f8, f10, f8
  2428. fadd f9, f11, f9
  2429. fadd f12, f14, f12
  2430. fadd f13, f15, f13
  2431. .align 4
  2432. LL(25):
  2433. #if defined(LT) || defined(RN)
  2434. andi. r0, KK, 3
  2435. #else
  2436. andi. r0, TEMP, 3
  2437. #endif
  2438. mtspr CTR, r0
  2439. ble+ LL(28)
  2440. .align 4
  2441. LL(26):
  2442. FMADD f0, f16, f20, f0
  2443. FMADD f1, f17, f20, f1
  2444. FMADD f4, f16, f21, f4
  2445. FMADD f5, f17, f21, f5
  2446. FMADD f8, f16, f22, f8
  2447. FMADD f9, f17, f22, f9
  2448. FMADD f12, f16, f23, f12
  2449. FMADD f13, f17, f23, f13
  2450. LFD f16, 2 * SIZE(AO)
  2451. LFD f17, 3 * SIZE(AO)
  2452. LFD f20, 4 * SIZE(BO)
  2453. LFD f21, 5 * SIZE(BO)
  2454. LFD f22, 6 * SIZE(BO)
  2455. LFD f23, 7 * SIZE(BO)
  2456. addi BO, BO, 4 * SIZE
  2457. addi AO, AO, 2 * SIZE
  2458. bdnz LL(26)
  2459. .align 4
  2460. LL(28):
  2461. #if defined(LN) || defined(RT)
  2462. #ifdef LN
  2463. subi r0, KK, 2
  2464. #else
  2465. subi r0, KK, 4
  2466. #endif
  2467. slwi TEMP, r0, 1 + BASE_SHIFT
  2468. slwi r0, r0, 2 + BASE_SHIFT
  2469. add AO, AORIG, TEMP
  2470. add BO, B, r0
  2471. #endif
  2472. #if defined(LN) || defined(LT)
  2473. LFD f16, 0 * SIZE(BO)
  2474. LFD f17, 1 * SIZE(BO)
  2475. LFD f18, 2 * SIZE(BO)
  2476. LFD f19, 3 * SIZE(BO)
  2477. LFD f20, 4 * SIZE(BO)
  2478. LFD f21, 5 * SIZE(BO)
  2479. LFD f22, 6 * SIZE(BO)
  2480. LFD f23, 7 * SIZE(BO)
  2481. FSUB f0, f16, f0
  2482. FSUB f4, f17, f4
  2483. FSUB f8, f18, f8
  2484. FSUB f12, f19, f12
  2485. FSUB f1, f20, f1
  2486. FSUB f5, f21, f5
  2487. FSUB f9, f22, f9
  2488. FSUB f13, f23, f13
  2489. #else
  2490. LFD f16, 0 * SIZE(AO)
  2491. LFD f17, 1 * SIZE(AO)
  2492. LFD f20, 2 * SIZE(AO)
  2493. LFD f21, 3 * SIZE(AO)
  2494. LFD f24, 4 * SIZE(AO)
  2495. LFD f25, 5 * SIZE(AO)
  2496. LFD f28, 6 * SIZE(AO)
  2497. LFD f29, 7 * SIZE(AO)
  2498. FSUB f0, f16, f0
  2499. FSUB f1, f17, f1
  2500. FSUB f4, f20, f4
  2501. FSUB f5, f21, f5
  2502. FSUB f8, f24, f8
  2503. FSUB f9, f25, f9
  2504. FSUB f12, f28, f12
  2505. FSUB f13, f29, f13
  2506. #endif
  2507. #ifdef LN
  2508. LFD f19, 3 * SIZE(AO)
  2509. LFD f20, 2 * SIZE(AO)
  2510. LFD f21, 0 * SIZE(AO)
  2511. FMUL f1, f19, f1
  2512. FMUL f5, f19, f5
  2513. FMUL f9, f19, f9
  2514. FMUL f13, f19, f13
  2515. FNMSUB f0, f20, f1, f0
  2516. FNMSUB f4, f20, f5, f4
  2517. FNMSUB f8, f20, f9, f8
  2518. FNMSUB f12, f20, f13, f12
  2519. FMUL f0, f21, f0
  2520. FMUL f4, f21, f4
  2521. FMUL f8, f21, f8
  2522. FMUL f12, f21, f12
  2523. #endif
  2524. #ifdef LT
  2525. LFD f16, 0 * SIZE(AO)
  2526. LFD f17, 1 * SIZE(AO)
  2527. FMUL f0, f16, f0
  2528. FMUL f4, f16, f4
  2529. FMUL f8, f16, f8
  2530. FMUL f12, f16, f12
  2531. FNMSUB f1, f17, f0, f1
  2532. FNMSUB f5, f17, f4, f5
  2533. FNMSUB f9, f17, f8, f9
  2534. FNMSUB f13, f17, f12, f13
  2535. LFD f17, 3 * SIZE(AO)
  2536. FMUL f1, f17, f1
  2537. FMUL f5, f17, f5
  2538. FMUL f9, f17, f9
  2539. FMUL f13, f17, f13
  2540. #endif
  2541. #ifdef RN
  2542. LFD f16, 0 * SIZE(BO)
  2543. LFD f17, 1 * SIZE(BO)
  2544. LFD f18, 2 * SIZE(BO)
  2545. LFD f19, 3 * SIZE(BO)
  2546. FMUL f0, f16, f0
  2547. FMUL f1, f16, f1
  2548. FNMSUB f4, f17, f0, f4
  2549. FNMSUB f5, f17, f1, f5
  2550. FNMSUB f8, f18, f0, f8
  2551. FNMSUB f9, f18, f1, f9
  2552. FNMSUB f12, f19, f0, f12
  2553. FNMSUB f13, f19, f1, f13
  2554. LFD f16, 5 * SIZE(BO)
  2555. LFD f17, 6 * SIZE(BO)
  2556. LFD f18, 7 * SIZE(BO)
  2557. LFD f19, 10 * SIZE(BO)
  2558. LFD f20, 11 * SIZE(BO)
  2559. LFD f21, 15 * SIZE(BO)
  2560. FMUL f4, f16, f4
  2561. FMUL f5, f16, f5
  2562. FNMSUB f8, f17, f4, f8
  2563. FNMSUB f9, f17, f5, f9
  2564. FNMSUB f12, f18, f4, f12
  2565. FNMSUB f13, f18, f5, f13
  2566. FMUL f8, f19, f8
  2567. FMUL f9, f19, f9
  2568. FNMSUB f12, f20, f8, f12
  2569. FNMSUB f13, f20, f9, f13
  2570. FMUL f12, f21, f12
  2571. FMUL f13, f21, f13
  2572. #endif
  2573. #ifdef RT
  2574. LFD f16, 15 * SIZE(BO)
  2575. LFD f17, 14 * SIZE(BO)
  2576. LFD f18, 13 * SIZE(BO)
  2577. LFD f19, 12 * SIZE(BO)
  2578. FMUL f12, f16, f12
  2579. FMUL f13, f16, f13
  2580. FNMSUB f8, f17, f12, f8
  2581. FNMSUB f9, f17, f13, f9
  2582. FNMSUB f4, f18, f12, f4
  2583. FNMSUB f5, f18, f13, f5
  2584. FNMSUB f0, f19, f12, f0
  2585. FNMSUB f1, f19, f13, f1
  2586. LFD f16, 10 * SIZE(BO)
  2587. LFD f17, 9 * SIZE(BO)
  2588. LFD f18, 8 * SIZE(BO)
  2589. LFD f19, 5 * SIZE(BO)
  2590. LFD f20, 4 * SIZE(BO)
  2591. LFD f21, 0 * SIZE(BO)
  2592. FMUL f8, f16, f8
  2593. FMUL f9, f16, f9
  2594. FNMSUB f4, f17, f8, f4
  2595. FNMSUB f5, f17, f9, f5
  2596. FNMSUB f0, f18, f8, f0
  2597. FNMSUB f1, f18, f9, f1
  2598. FMUL f4, f19, f4
  2599. FMUL f5, f19, f5
  2600. FNMSUB f0, f20, f4, f0
  2601. FNMSUB f1, f20, f5, f1
  2602. FMUL f0, f21, f0
  2603. FMUL f1, f21, f1
  2604. #endif
  2605. #ifdef LN
  2606. subi CO1, CO1, 2 * SIZE
  2607. subi CO2, CO2, 2 * SIZE
  2608. subi CO3, CO3, 2 * SIZE
  2609. subi CO4, CO4, 2 * SIZE
  2610. #endif
  2611. #if defined(LN) || defined(LT)
  2612. STFD f0, 0 * SIZE(BO)
  2613. STFD f4, 1 * SIZE(BO)
  2614. STFD f8, 2 * SIZE(BO)
  2615. STFD f12, 3 * SIZE(BO)
  2616. STFD f1, 4 * SIZE(BO)
  2617. STFD f5, 5 * SIZE(BO)
  2618. STFD f9, 6 * SIZE(BO)
  2619. STFD f13, 7 * SIZE(BO)
  2620. #else
  2621. STFD f0, 0 * SIZE(AO)
  2622. STFD f1, 1 * SIZE(AO)
  2623. STFD f4, 2 * SIZE(AO)
  2624. STFD f5, 3 * SIZE(AO)
  2625. STFD f8, 4 * SIZE(AO)
  2626. STFD f9, 5 * SIZE(AO)
  2627. STFD f12, 6 * SIZE(AO)
  2628. STFD f13, 7 * SIZE(AO)
  2629. #endif
  2630. STFD f0, 0 * SIZE(CO1)
  2631. STFD f1, 1 * SIZE(CO1)
  2632. STFD f4, 0 * SIZE(CO2)
  2633. STFD f5, 1 * SIZE(CO2)
  2634. STFD f8, 0 * SIZE(CO3)
  2635. STFD f9, 1 * SIZE(CO3)
  2636. STFD f12, 0 * SIZE(CO4)
  2637. STFD f13, 1 * SIZE(CO4)
  2638. lfs f0, FZERO
  2639. fmr f1, f0
  2640. fmr f2, f0
  2641. fmr f3, f0
  2642. fmr f4, f0
  2643. fmr f5, f0
  2644. fmr f6, f0
  2645. fmr f7, f0
  2646. fmr f8, f0
  2647. fmr f9, f0
  2648. fmr f10, f0
  2649. fmr f11, f0
  2650. fmr f12, f0
  2651. fmr f13, f0
  2652. fmr f14, f0
  2653. fmr f15, f0
  2654. #ifndef LN
  2655. addi CO1, CO1, 2 * SIZE
  2656. addi CO2, CO2, 2 * SIZE
  2657. addi CO3, CO3, 2 * SIZE
  2658. addi CO4, CO4, 2 * SIZE
  2659. #endif
  2660. #ifdef RT
  2661. slwi r0, K, 1 + BASE_SHIFT
  2662. add AORIG, AORIG, r0
  2663. #endif
  2664. #if defined(LT) || defined(RN)
  2665. sub TEMP, K, KK
  2666. slwi r0, TEMP, 1 + BASE_SHIFT
  2667. slwi TEMP, TEMP, 2 + BASE_SHIFT
  2668. add AO, AO, r0
  2669. add BO, BO, TEMP
  2670. #endif
  2671. #ifdef LN
  2672. subi KK, KK, 2
  2673. #endif
  2674. #ifdef LT
  2675. addi KK, KK, 2
  2676. #endif
  2677. .align 4
  2678. LL(30):
  2679. andi. I, M, 1
  2680. ble LL(39)
  2681. #if defined(LT) || defined(RN)
  2682. LFD f16, 0 * SIZE(AO)
  2683. LFD f17, 1 * SIZE(AO)
  2684. LFD f18, 2 * SIZE(AO)
  2685. LFD f19, 3 * SIZE(AO)
  2686. LFD f20, 0 * SIZE(B)
  2687. LFD f21, 1 * SIZE(B)
  2688. LFD f22, 2 * SIZE(B)
  2689. LFD f23, 3 * SIZE(B)
  2690. LFD f24, 4 * SIZE(B)
  2691. LFD f25, 5 * SIZE(B)
  2692. LFD f26, 6 * SIZE(B)
  2693. LFD f27, 7 * SIZE(B)
  2694. srawi. r0, KK, 2
  2695. mtspr CTR, r0
  2696. mr BO, B
  2697. #else
  2698. #ifdef LN
  2699. slwi r0, K, BASE_SHIFT
  2700. sub AORIG, AORIG, r0
  2701. #endif
  2702. slwi r0, KK, 0 + BASE_SHIFT
  2703. slwi TEMP, KK, 2 + BASE_SHIFT
  2704. add AO, AORIG, r0
  2705. add BO, B, TEMP
  2706. sub TEMP, K, KK
  2707. LFD f16, 0 * SIZE(AO)
  2708. LFD f17, 1 * SIZE(AO)
  2709. LFD f18, 2 * SIZE(AO)
  2710. LFD f19, 3 * SIZE(AO)
  2711. LFD f20, 0 * SIZE(BO)
  2712. LFD f21, 1 * SIZE(BO)
  2713. LFD f22, 2 * SIZE(BO)
  2714. LFD f23, 3 * SIZE(BO)
  2715. LFD f24, 4 * SIZE(BO)
  2716. LFD f25, 5 * SIZE(BO)
  2717. LFD f26, 6 * SIZE(BO)
  2718. LFD f27, 7 * SIZE(BO)
  2719. srawi. r0, TEMP, 2
  2720. mtspr CTR, r0
  2721. #endif
  2722. ble LL(35)
  2723. .align 5
  2724. LL(32):
  2725. FMADD f0, f16, f20, f0
  2726. FMADD f4, f16, f21, f4
  2727. FMADD f8, f16, f22, f8
  2728. FMADD f12, f16, f23, f12
  2729. LFD f20, 8 * SIZE(BO)
  2730. LFD f21, 9 * SIZE(BO)
  2731. LFD f22, 10 * SIZE(BO)
  2732. LFD f23, 11 * SIZE(BO)
  2733. FMADD f1, f17, f24, f1
  2734. FMADD f5, f17, f25, f5
  2735. FMADD f9, f17, f26, f9
  2736. FMADD f13, f17, f27, f13
  2737. LFD f24, 12 * SIZE(BO)
  2738. LFD f25, 13 * SIZE(BO)
  2739. LFD f26, 14 * SIZE(BO)
  2740. LFD f27, 15 * SIZE(BO)
  2741. FMADD f0, f18, f20, f0
  2742. FMADD f4, f18, f21, f4
  2743. FMADD f8, f18, f22, f8
  2744. FMADD f12, f18, f23, f12
  2745. LFD f20, 16 * SIZE(BO)
  2746. LFD f21, 17 * SIZE(BO)
  2747. LFD f22, 18 * SIZE(BO)
  2748. LFD f23, 19 * SIZE(BO)
  2749. FMADD f1, f19, f24, f1
  2750. FMADD f5, f19, f25, f5
  2751. FMADD f9, f19, f26, f9
  2752. FMADD f13, f19, f27, f13
  2753. LFD f16, 4 * SIZE(AO)
  2754. LFD f17, 5 * SIZE(AO)
  2755. LFD f18, 6 * SIZE(AO)
  2756. LFD f19, 7 * SIZE(AO)
  2757. LFD f24, 20 * SIZE(BO)
  2758. LFD f25, 21 * SIZE(BO)
  2759. LFD f26, 22 * SIZE(BO)
  2760. LFD f27, 23 * SIZE(BO)
  2761. addi AO, AO, 4 * SIZE
  2762. addi BO, BO, 16 * SIZE
  2763. dcbtst AO, PREA
  2764. bdnz LL(32)
  2765. fadd f0, f1, f0
  2766. fadd f4, f5, f4
  2767. fadd f8, f9, f8
  2768. fadd f12, f13, f12
  2769. .align 4
  2770. LL(35):
  2771. #if defined(LT) || defined(RN)
  2772. andi. r0, KK, 3
  2773. #else
  2774. andi. r0, TEMP, 3
  2775. #endif
  2776. mtspr CTR, r0
  2777. ble+ LL(38)
  2778. .align 4
  2779. LL(36):
  2780. FMADD f0, f16, f20, f0
  2781. FMADD f4, f16, f21, f4
  2782. FMADD f8, f16, f22, f8
  2783. FMADD f12, f16, f23, f12
  2784. LFD f16, 1 * SIZE(AO)
  2785. LFD f20, 4 * SIZE(BO)
  2786. LFD f21, 5 * SIZE(BO)
  2787. LFD f22, 6 * SIZE(BO)
  2788. LFD f23, 7 * SIZE(BO)
  2789. addi BO, BO, 4 * SIZE
  2790. addi AO, AO, 1 * SIZE
  2791. bdnz LL(36)
  2792. .align 4
  2793. LL(38):
  2794. #if defined(LN) || defined(RT)
  2795. #ifdef LN
  2796. subi r0, KK, 1
  2797. #else
  2798. subi r0, KK, 4
  2799. #endif
  2800. slwi TEMP, r0, 0 + BASE_SHIFT
  2801. slwi r0, r0, 2 + BASE_SHIFT
  2802. add AO, AORIG, TEMP
  2803. add BO, B, r0
  2804. #endif
  2805. #if defined(LN) || defined(LT)
  2806. LFD f16, 0 * SIZE(BO)
  2807. LFD f17, 1 * SIZE(BO)
  2808. LFD f18, 2 * SIZE(BO)
  2809. LFD f19, 3 * SIZE(BO)
  2810. FSUB f0, f16, f0
  2811. FSUB f4, f17, f4
  2812. FSUB f8, f18, f8
  2813. FSUB f12, f19, f12
  2814. #else
  2815. LFD f16, 0 * SIZE(AO)
  2816. LFD f20, 1 * SIZE(AO)
  2817. LFD f24, 2 * SIZE(AO)
  2818. LFD f28, 3 * SIZE(AO)
  2819. FSUB f0, f16, f0
  2820. FSUB f4, f20, f4
  2821. FSUB f8, f24, f8
  2822. FSUB f12, f28, f12
  2823. #endif
  2824. #ifdef LN
  2825. LFD f21, 0 * SIZE(AO)
  2826. FMUL f0, f21, f0
  2827. FMUL f4, f21, f4
  2828. FMUL f8, f21, f8
  2829. FMUL f12, f21, f12
  2830. #endif
  2831. #ifdef LT
  2832. LFD f16, 0 * SIZE(AO)
  2833. FMUL f0, f16, f0
  2834. FMUL f4, f16, f4
  2835. FMUL f8, f16, f8
  2836. FMUL f12, f16, f12
  2837. #endif
  2838. #ifdef RN
  2839. LFD f16, 0 * SIZE(BO)
  2840. LFD f17, 1 * SIZE(BO)
  2841. LFD f18, 2 * SIZE(BO)
  2842. LFD f19, 3 * SIZE(BO)
  2843. FMUL f0, f16, f0
  2844. FNMSUB f4, f17, f0, f4
  2845. FNMSUB f8, f18, f0, f8
  2846. FNMSUB f12, f19, f0, f12
  2847. LFD f16, 5 * SIZE(BO)
  2848. LFD f17, 6 * SIZE(BO)
  2849. LFD f18, 7 * SIZE(BO)
  2850. LFD f19, 10 * SIZE(BO)
  2851. LFD f20, 11 * SIZE(BO)
  2852. LFD f21, 15 * SIZE(BO)
  2853. FMUL f4, f16, f4
  2854. FNMSUB f8, f17, f4, f8
  2855. FNMSUB f12, f18, f4, f12
  2856. FMUL f8, f19, f8
  2857. FNMSUB f12, f20, f8, f12
  2858. FMUL f12, f21, f12
  2859. #endif
  2860. #ifdef RT
  2861. LFD f16, 15 * SIZE(BO)
  2862. LFD f17, 14 * SIZE(BO)
  2863. LFD f18, 13 * SIZE(BO)
  2864. LFD f19, 12 * SIZE(BO)
  2865. FMUL f12, f16, f12
  2866. FNMSUB f8, f17, f12, f8
  2867. FNMSUB f4, f18, f12, f4
  2868. FNMSUB f0, f19, f12, f0
  2869. LFD f16, 10 * SIZE(BO)
  2870. LFD f17, 9 * SIZE(BO)
  2871. LFD f18, 8 * SIZE(BO)
  2872. LFD f19, 5 * SIZE(BO)
  2873. FMUL f8, f16, f8
  2874. LFD f20, 4 * SIZE(BO)
  2875. LFD f21, 0 * SIZE(BO)
  2876. FNMSUB f4, f17, f8, f4
  2877. FNMSUB f0, f18, f8, f0
  2878. FMUL f4, f19, f4
  2879. FNMSUB f0, f20, f4, f0
  2880. FMUL f0, f21, f0
  2881. #endif
  2882. #ifdef LN
  2883. subi CO1, CO1, 1 * SIZE
  2884. subi CO2, CO2, 1 * SIZE
  2885. subi CO3, CO3, 1 * SIZE
  2886. subi CO4, CO4, 1 * SIZE
  2887. #endif
  2888. #if defined(LN) || defined(LT)
  2889. STFD f0, 0 * SIZE(BO)
  2890. STFD f4, 1 * SIZE(BO)
  2891. STFD f8, 2 * SIZE(BO)
  2892. STFD f12, 3 * SIZE(BO)
  2893. #else
  2894. STFD f0, 0 * SIZE(AO)
  2895. STFD f4, 1 * SIZE(AO)
  2896. STFD f8, 2 * SIZE(AO)
  2897. STFD f12, 3 * SIZE(AO)
  2898. #endif
  2899. STFD f0, 0 * SIZE(CO1)
  2900. STFD f4, 0 * SIZE(CO2)
  2901. STFD f8, 0 * SIZE(CO3)
  2902. STFD f12, 0 * SIZE(CO4)
  2903. lfs f0, FZERO
  2904. fmr f1, f0
  2905. fmr f4, f0
  2906. fmr f5, f0
  2907. fmr f8, f0
  2908. fmr f9, f0
  2909. fmr f12, f0
  2910. fmr f13, f0
  2911. #ifndef LN
  2912. addi CO1, CO1, 1 * SIZE
  2913. addi CO2, CO2, 1 * SIZE
  2914. addi CO3, CO3, 1 * SIZE
  2915. addi CO4, CO4, 1 * SIZE
  2916. #endif
  2917. #ifdef RT
  2918. slwi r0, K, 0 + BASE_SHIFT
  2919. add AORIG, AORIG, r0
  2920. #endif
  2921. #if defined(LT) || defined(RN)
  2922. sub TEMP, K, KK
  2923. slwi r0, TEMP, 0 + BASE_SHIFT
  2924. slwi TEMP, TEMP, 2 + BASE_SHIFT
  2925. add AO, AO, r0
  2926. add BO, BO, TEMP
  2927. #endif
  2928. #ifdef LN
  2929. subi KK, KK, 1
  2930. #endif
  2931. #ifdef LT
  2932. addi KK, KK, 1
  2933. #endif
  2934. .align 4
  2935. LL(39):
  2936. #ifdef LN
  2937. slwi r0, K, 2 + BASE_SHIFT
  2938. add B, B, r0
  2939. #endif
  2940. #if defined(LT) || defined(RN)
  2941. mr B, BO
  2942. #endif
  2943. #ifdef RN
  2944. addi KK, KK, 4
  2945. #endif
  2946. #ifdef RT
  2947. subi KK, KK, 4
  2948. #endif
  2949. addic. J, J, -1
  2950. lfs f0, FZERO
  2951. bgt LL(10)
  2952. .align 4
  2953. LL(999):
  2954. addi r3, 0, 0
  2955. lfd f14, 0(SP)
  2956. lfd f15, 8(SP)
  2957. lfd f16, 16(SP)
  2958. lfd f17, 24(SP)
  2959. lfd f18, 32(SP)
  2960. lfd f19, 40(SP)
  2961. lfd f20, 48(SP)
  2962. lfd f21, 56(SP)
  2963. lfd f22, 64(SP)
  2964. lfd f23, 72(SP)
  2965. lfd f24, 80(SP)
  2966. lfd f25, 88(SP)
  2967. lfd f26, 96(SP)
  2968. lfd f27, 104(SP)
  2969. lfd f28, 112(SP)
  2970. lfd f29, 120(SP)
  2971. lfd f30, 128(SP)
  2972. lfd f31, 136(SP)
  2973. #ifdef __64BIT__
  2974. ld r31, 144(SP)
  2975. ld r30, 152(SP)
  2976. ld r29, 160(SP)
  2977. ld r28, 168(SP)
  2978. ld r27, 176(SP)
  2979. ld r26, 184(SP)
  2980. ld r25, 192(SP)
  2981. ld r24, 200(SP)
  2982. ld r23, 208(SP)
  2983. ld r22, 216(SP)
  2984. ld r21, 224(SP)
  2985. ld r20, 232(SP)
  2986. ld r19, 240(SP)
  2987. ld r18, 248(SP)
  2988. #else
  2989. lwz r31, 144(SP)
  2990. lwz r30, 148(SP)
  2991. lwz r29, 152(SP)
  2992. lwz r28, 156(SP)
  2993. lwz r27, 160(SP)
  2994. lwz r26, 164(SP)
  2995. lwz r25, 168(SP)
  2996. lwz r24, 172(SP)
  2997. lwz r23, 176(SP)
  2998. lwz r22, 180(SP)
  2999. lwz r21, 184(SP)
  3000. lwz r20, 188(SP)
  3001. lwz r19, 192(SP)
  3002. lwz r18, 196(SP)
  3003. #endif
  3004. addi SP, SP, STACKSIZE
  3005. blr
  3006. EPILOGUE
  3007. #endif