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trsm_kernel_cell_LN.S 62 kB

rebase? (#1) * With the Intel compiler on Linux, prefer ifort for the final link step icc has known problems with mixed-language builds that ifort can handle just fine. Fixes #1956 * Rename operands to put lda on the input/output constraint list * Fix wrong constraints in inline assembly for #2009 * Fix inline assembly constraints rework indices to allow marking argument lda4 as input and output. For #2009 * Fix inline assembly constraints rework indices to allow marking argument lda as input and output. * Fix inline assembly constraints * Fix inline assembly constraints * Fix inline assembly constraints in Bulldozer TRSM kernels rework indices to allow marking i,as and bs as both input and output (marked operand n1 as well for simplicity). For #2009 * Correct range_n limiting same bug as seen in #1388, somehow missed in corresponding PR #1389 * Allow multithreading TRMV again revert workaround introduced for issue #1332 as the actual cause appears to be my incorrect fix from #1262 (see #1388) * Fix error introduced during cleanup * Reduce list of kernels in the dynamic arch build to make compilation complete reliably within the 1h limit again * init * move fix to right place * Fix missing -c option in AVX512 test * Fix AVX512 test always returning false due to missing compiler option * Make x86_32 imply NO_AVX2, NO_AVX512 in addition to NO_AVX fixes #2033 * Keep xcode8.3 for osx BINARY=32 build as xcode10 deprecated i386 * Make sure that AVX512 is disabled in 32bit builds for #2033 * Improve handling of NO_STATIC and NO_SHARED to avoid surprises from defining either as zero. Fixes #2035 by addressing some concerns from #1422 * init * address warning introed with #1814 et al * Restore locking optimizations for OpenMP case restore another accidentally dropped part of #1468 that was missed in #2004 to address performance regression reported in #1461 * HiSilicon tsv110 CPUs optimization branch add HiSilicon tsv110 CPUs optimization branch * add TARGET support for HiSilicon tsv110 CPUs * add TARGET support for HiSilicon tsv110 CPUs * add TARGET support for HiSilicon tsv110 CPUs * Fix module definition conflicts between LAPACK and ReLAPACK for #2043 * Do not compile in AVX512 check if AVX support is disabled xgetbv is function depends on NO_AVX being undefined - we could change that too, but that combo is unlikely to work anyway * ctest.c : add __POWERPC__ for PowerMac * Fix crash in sgemm SSE/nano kernel on x86_64 Fix bug #2047. Signed-off-by: Celelibi <celelibi@gmail.com> * param.h : enable defines for PPC970 on DarwinOS fixes: gemm.c: In function 'sgemm_': ../common_param.h:981:18: error: 'SGEMM_DEFAULT_P' undeclared (first use in this function) #define SGEMM_P SGEMM_DEFAULT_P ^ * common_power.h: force DCBT_ARG 0 on PPC970 Darwin without this, we see ../kernel/power/gemv_n.S:427:Parameter syntax error and many more similar entries that relates to this assembly command dcbt 8, r24, r18 this change makes the DCBT_ARG = 0 and openblas builds through to completion on PowerMac 970 Tests pass * Make TARGET=GENERIC compatible with DYNAMIC_ARCH=1 for issue #2048 * make DYNAMIC_ARCH=1 package work on TSV110. * make DYNAMIC_ARCH=1 package work on TSV110 * Add Intel Denverton for #2048 * Add Intel Denverton * Change 64-bit detection as explained in #2056 * Trivial typo fix as suggested in #2022 * Disable the AVX512 DGEMM kernel (again) Due to as yet unresolved errors seen in #1955 and #2029 * Use POSIX getenv on Cygwin The Windows-native GetEnvironmentVariable cannot be relied on, as Cygwin does not always copy environment variables set through Cygwin to the Windows environment block, particularly after fork(). * Fix for #2063: The DllMain used in Cygwin did not run the thread memory pool cleanup upon THREAD_DETACH which is needed when compiled with USE_TLS=1. * Also call CloseHandle on each thread, as well as on the event so as to not leak thread handles. * AIX asm syntax changes needed for shared object creation * power9 makefile. dgemm based on power8 kernel with following changes : 32x unrolled 16x4 kernel and 8x4 kernel using (lxv stxv butterfly rank1 update). improvement from 17 to 22-23gflops. dtrmm cases were added into dgemm itself * Expose CBLAS interfaces for I?MIN and I?MAX * Build CBLAS interfaces for I?MIN and I?MAX * Add declarations for ?sum and cblas_?sum * Add interface for ?sum (derived from ?asum) * Add ?sum * Add implementations of ssum/dsum and csum/zsum as trivial copies of asum/zsasum with the fabs calls replaced by fmov to preserve code structure * Add ARM implementations of ?sum (trivial copies of the respective ?asum with the fabs calls removed) * Add ARM64 implementations of ?sum as trivial copies of the respective ?asum kernels with the fabs calls removed * Add ia64 implementation of ?sum as trivial copy of asum with the fabs calls removed * Add MIPS implementation of ?sum as trivial copy of ?asum with the fabs calls removed * Add MIPS64 implementation of ?sum as trivial copy of ?asum with the fabs replaced by mov to preserve code structure * Add POWER implementation of ?sum as trivial copy of ?asum with the fabs replaced by fmr to preserve code structure * Add SPARC implementation of ?sum as trivial copy of ?asum with the fabs replaced by fmov to preserve code structure * Add x86 implementation of ?sum as trivial copy of ?asum with the fabs calls removed * Add x86_64 implementation of ?sum as trivial copy of ?asum with the fabs calls removed * Add ZARCH implementation of ?sum as trivial copies of the respective ?asum kernels with the ABS and vflpsb calls removed * Detect 32bit environment on 64bit ARM hardware for #2056, using same approach as #2058 * Add cmake defaults for ?sum kernels * Add ?sum * Add ?sum definitions for generic kernel * Add declarations for ?sum * Add -lm and disable EXPRECISION support on *BSD fixes #2075 * Add in runtime CPU detection for POWER. * snprintf define consolidated to common.h * Support INTERFACE64=1 * Add support for INTERFACE64 and fix XERBLA calls 1. Replaced all instances of "int" with "blasint" 2. Added string length as "hidden" third parameter in calls to fortran XERBLA * Correct length of name string in xerbla call * Avoid out-of-bounds accesses in LAPACK EIG tests see https://github.com/Reference-LAPACK/lapack/issues/333 * Correct INFO=4 condition * Disable reallocation of work array in xSYTRF as it appears to cause memory management problems (seen in the LAPACK tests) * Disable repeated recursion on Ab_BR in ReLAPACK xGBTRF due to crashes in LAPACK tests * sgemm/strmm * Update Changelog with changes from 0.3.6 * Increment version to 0.3.7.dev * Increment version to 0.3.7.dev * Misc. typo fixes Found via `codespell -q 3 -w -L ith,als,dum,nd,amin,nto,wis,ba -S ./relapack,./kernel,./lapack-netlib` * Correct argument of CPU_ISSET for glibc <2.5 fixes #2104 * conflict resolve * Revert reference/ fixes * Revert Changelog.txt typos * Disable the SkyLakeX DGEMMITCOPY kernel as well as a stopgap measure for https://github.com/numpy/numpy/issues/13401 as mentioned in #1955 * Disable DGEMMINCOPY as well for now #1955 * init * Fix errors in cpu enumeration with glibc 2.6 for #2114 * Change two http links to https Closes #2109 * remove redundant code #2113 * Set up CI with Azure Pipelines [skip ci] * TST: add native POWER8 to CI * add native POWER8 testing to Travis CI matrix with ppc64le os entry * Update link to IBM MASS library, update cpu support status * first try migrating one of the arm builds from travis * fix tabbing in azure commands * Update azure-pipelines.yml take out offending lines (although stolen from https://github.com/conda-forge/opencv-feedstock azure-pipelines fiie) * Update azure-pipelines.yml * Update azure-pipelines.yml * Update azure-pipelines.yml * Update azure-pipelines.yml * DOC: Add Azure CI status badge * Add ARMV6 build to azure CI setup (#2122) using aytekinar's Alpine image and docker script from the Travis setup [skip ci] * TST: Azure manylinux1 & clean-up * remove some of the steps & comments from the original Azure yml template * modify the trigger section to use develop since OpenBLAS primarily uses this branch; use the same batching behavior as downstream projects NumPy/ SciPy * remove Travis emulated ARMv6 gcc build because this now happens in Azure * use documented Ubuntu vmImage name for Azure and add in a manylinux1 test run to the matrix [skip appveyor] * Add NO_AFFINITY to available options on Linux, and set it to ON to match the gmake default. Fixes second part of #2114 * Replace ISMIN and ISAMIN kernels on all x86_64 platforms (#2125) * Mark iamax_sse.S as unsuitable for MIN due to issue #2116 * Use iamax.S rather than iamax_sse.S for ISMIN/ISAMIN on all x86_64 as workaround for #2116 * Move ARMv8 gcc build from Travis to Azure * Move ARMv8 gcc build from Travis to Azure * Update .travis.yml * Test drone CI * install make * remove sudo * Install gcc * Install perl * Install gfortran and add a clang job * gfortran->gcc-gfortran * Switch to ubuntu and parallel jobs * apt update * Fix typo * update yes * no need of gcc in clang build * Add a cmake build as well * Add cmake builds and print options * build without lapack on cmake * parallel build * See if ubuntu 19.04 fixes the ICE * Remove qemu armv8 builds * arm32 build * Fix typo * TST: add SkylakeX AVX512 CI test * adapt the C-level reproducer code for some recent SkylakeX AVX512 kernel issues, provided by Isuru Fernando and modified by Martin Kroeker, for usage in the utest suite * add an Intel SDE SkylakeX emulation utest run to the Azure CI matrix; a custom Docker build was required because Ubuntu image provided by Azure does not support AVX512VL instructions * Add option USE_LOCKING for single-threaded build with locking support for calling from concurrent threads * Add option USE_LOCKING for single-threaded build with locking support * Add option USE_LOCKING for SMP-like locking in USE_THREAD=0 builds * Add option USE_LOCKING but keep default settings intact * Remove unrelated change * Do not try ancient PGI hacks with recent versions of that compiler should fix #2139 * Build and run utests in any case, they do their own checks for fortran availability * Add softfp support in min/max kernels fix for #1912 * Revert "Add softfp support in min/max kernels" * Separate implementations of AMAX and IAMAX on arm As noted in #1912 and comment on #1942, the combined implementation happens to "do the right thing" on hardfp, but cannot return both value and index on softfp where they would have to share the return register * Ensure correct output for DAMAX with softfp * Use generic kernels for complex (I)AMAX to support softfp * improved zgemm power9 based on power8 * upload thread safety test folder * hook up c++ thread safety test (main Makefile) * add c++ thread test option to Makefile.rule * Document NO_AVX512 for #2151 * sgemm pipeline improved, zgemm rewritten without inner packs, ABI lxvx v20 fixed with vs52 * Fix detection of AVX512 capable compilers in getarch 21eda8b5 introduced a check in getarch.c to test if the compiler is capable of AVX512. This check currently fails, since the used __AVX2__ macro is only defined if getarch itself was compiled with AVX2/AVX512 support. Make sure this is the case by building getarch with -march=native on x86_64. It is only supposed to run on the build host anyway. * c_check: Unlink correct file * power9 zgemm ztrmm optimized * conflict resolve * Add gfortran workaround for ABI violations in LAPACKE for #2154 (see gcc bug 90329) * Add gfortran workaround for ABI violations for #2154 (see gcc bug 90329) * Add gfortran workaround for potential ABI violation for #2154 * Update fc.cmake * Remove any inadvertent use of -march=native from DYNAMIC_ARCH builds from #2143, -march=native precludes use of more specific options like -march=skylake-avx512 in individual kernels, and defeats the purpose of dynamic arch anyway. * Avoid unintentional activation of TLS code via USE_TLS=0 fixes #2149 * Do not force gcc options on non-gcc compilers fixes compile failure with pgi 18.10 as reported on OpenBLAS-users * Update Makefile.x86_64 * Zero ecx with a mov instruction PGI assembler does not like the initialization in the constraints. * Fix mov syntax * new sgemm 8x16 * Update dtrmm_kernel_16x4_power8.S * PGI compiler does not like -march=native * Fix build on FreeBSD/powerpc64. Signed-off-by: Piotr Kubaj <pkubaj@anongoth.pl> * Fix build for PPC970 on FreeBSD pt. 1 FreeBSD needs DCBT_ARG=0 as well. * Fix build for PPC970 on FreeBSD pt.2 FreeBSD needs those macros too. * cgemm/ctrmm power9 * Utest needs CBLAS but not necessarily FORTRAN * Add mingw builds to Appveyor config * Add getarch flags to disable AVX on x86 (and other small fixes to match Makefile behaviour) * Make disabling DYNAMIC_ARCH on unsupported systems work needs to be unset in the cache for the change to have any effect * Mingw32 needs leading underscore on object names (also copy BUNDERSCORE settings for FORTRAN from the corresponding Makefile)
6 years ago
rebase? (#1) * With the Intel compiler on Linux, prefer ifort for the final link step icc has known problems with mixed-language builds that ifort can handle just fine. Fixes #1956 * Rename operands to put lda on the input/output constraint list * Fix wrong constraints in inline assembly for #2009 * Fix inline assembly constraints rework indices to allow marking argument lda4 as input and output. For #2009 * Fix inline assembly constraints rework indices to allow marking argument lda as input and output. * Fix inline assembly constraints * Fix inline assembly constraints * Fix inline assembly constraints in Bulldozer TRSM kernels rework indices to allow marking i,as and bs as both input and output (marked operand n1 as well for simplicity). For #2009 * Correct range_n limiting same bug as seen in #1388, somehow missed in corresponding PR #1389 * Allow multithreading TRMV again revert workaround introduced for issue #1332 as the actual cause appears to be my incorrect fix from #1262 (see #1388) * Fix error introduced during cleanup * Reduce list of kernels in the dynamic arch build to make compilation complete reliably within the 1h limit again * init * move fix to right place * Fix missing -c option in AVX512 test * Fix AVX512 test always returning false due to missing compiler option * Make x86_32 imply NO_AVX2, NO_AVX512 in addition to NO_AVX fixes #2033 * Keep xcode8.3 for osx BINARY=32 build as xcode10 deprecated i386 * Make sure that AVX512 is disabled in 32bit builds for #2033 * Improve handling of NO_STATIC and NO_SHARED to avoid surprises from defining either as zero. Fixes #2035 by addressing some concerns from #1422 * init * address warning introed with #1814 et al * Restore locking optimizations for OpenMP case restore another accidentally dropped part of #1468 that was missed in #2004 to address performance regression reported in #1461 * HiSilicon tsv110 CPUs optimization branch add HiSilicon tsv110 CPUs optimization branch * add TARGET support for HiSilicon tsv110 CPUs * add TARGET support for HiSilicon tsv110 CPUs * add TARGET support for HiSilicon tsv110 CPUs * Fix module definition conflicts between LAPACK and ReLAPACK for #2043 * Do not compile in AVX512 check if AVX support is disabled xgetbv is function depends on NO_AVX being undefined - we could change that too, but that combo is unlikely to work anyway * ctest.c : add __POWERPC__ for PowerMac * Fix crash in sgemm SSE/nano kernel on x86_64 Fix bug #2047. Signed-off-by: Celelibi <celelibi@gmail.com> * param.h : enable defines for PPC970 on DarwinOS fixes: gemm.c: In function 'sgemm_': ../common_param.h:981:18: error: 'SGEMM_DEFAULT_P' undeclared (first use in this function) #define SGEMM_P SGEMM_DEFAULT_P ^ * common_power.h: force DCBT_ARG 0 on PPC970 Darwin without this, we see ../kernel/power/gemv_n.S:427:Parameter syntax error and many more similar entries that relates to this assembly command dcbt 8, r24, r18 this change makes the DCBT_ARG = 0 and openblas builds through to completion on PowerMac 970 Tests pass * Make TARGET=GENERIC compatible with DYNAMIC_ARCH=1 for issue #2048 * make DYNAMIC_ARCH=1 package work on TSV110. * make DYNAMIC_ARCH=1 package work on TSV110 * Add Intel Denverton for #2048 * Add Intel Denverton * Change 64-bit detection as explained in #2056 * Trivial typo fix as suggested in #2022 * Disable the AVX512 DGEMM kernel (again) Due to as yet unresolved errors seen in #1955 and #2029 * Use POSIX getenv on Cygwin The Windows-native GetEnvironmentVariable cannot be relied on, as Cygwin does not always copy environment variables set through Cygwin to the Windows environment block, particularly after fork(). * Fix for #2063: The DllMain used in Cygwin did not run the thread memory pool cleanup upon THREAD_DETACH which is needed when compiled with USE_TLS=1. * Also call CloseHandle on each thread, as well as on the event so as to not leak thread handles. * AIX asm syntax changes needed for shared object creation * power9 makefile. dgemm based on power8 kernel with following changes : 32x unrolled 16x4 kernel and 8x4 kernel using (lxv stxv butterfly rank1 update). improvement from 17 to 22-23gflops. dtrmm cases were added into dgemm itself * Expose CBLAS interfaces for I?MIN and I?MAX * Build CBLAS interfaces for I?MIN and I?MAX * Add declarations for ?sum and cblas_?sum * Add interface for ?sum (derived from ?asum) * Add ?sum * Add implementations of ssum/dsum and csum/zsum as trivial copies of asum/zsasum with the fabs calls replaced by fmov to preserve code structure * Add ARM implementations of ?sum (trivial copies of the respective ?asum with the fabs calls removed) * Add ARM64 implementations of ?sum as trivial copies of the respective ?asum kernels with the fabs calls removed * Add ia64 implementation of ?sum as trivial copy of asum with the fabs calls removed * Add MIPS implementation of ?sum as trivial copy of ?asum with the fabs calls removed * Add MIPS64 implementation of ?sum as trivial copy of ?asum with the fabs replaced by mov to preserve code structure * Add POWER implementation of ?sum as trivial copy of ?asum with the fabs replaced by fmr to preserve code structure * Add SPARC implementation of ?sum as trivial copy of ?asum with the fabs replaced by fmov to preserve code structure * Add x86 implementation of ?sum as trivial copy of ?asum with the fabs calls removed * Add x86_64 implementation of ?sum as trivial copy of ?asum with the fabs calls removed * Add ZARCH implementation of ?sum as trivial copies of the respective ?asum kernels with the ABS and vflpsb calls removed * Detect 32bit environment on 64bit ARM hardware for #2056, using same approach as #2058 * Add cmake defaults for ?sum kernels * Add ?sum * Add ?sum definitions for generic kernel * Add declarations for ?sum * Add -lm and disable EXPRECISION support on *BSD fixes #2075 * Add in runtime CPU detection for POWER. * snprintf define consolidated to common.h * Support INTERFACE64=1 * Add support for INTERFACE64 and fix XERBLA calls 1. Replaced all instances of "int" with "blasint" 2. Added string length as "hidden" third parameter in calls to fortran XERBLA * Correct length of name string in xerbla call * Avoid out-of-bounds accesses in LAPACK EIG tests see https://github.com/Reference-LAPACK/lapack/issues/333 * Correct INFO=4 condition * Disable reallocation of work array in xSYTRF as it appears to cause memory management problems (seen in the LAPACK tests) * Disable repeated recursion on Ab_BR in ReLAPACK xGBTRF due to crashes in LAPACK tests * sgemm/strmm * Update Changelog with changes from 0.3.6 * Increment version to 0.3.7.dev * Increment version to 0.3.7.dev * Misc. typo fixes Found via `codespell -q 3 -w -L ith,als,dum,nd,amin,nto,wis,ba -S ./relapack,./kernel,./lapack-netlib` * Correct argument of CPU_ISSET for glibc <2.5 fixes #2104 * conflict resolve * Revert reference/ fixes * Revert Changelog.txt typos * Disable the SkyLakeX DGEMMITCOPY kernel as well as a stopgap measure for https://github.com/numpy/numpy/issues/13401 as mentioned in #1955 * Disable DGEMMINCOPY as well for now #1955 * init * Fix errors in cpu enumeration with glibc 2.6 for #2114 * Change two http links to https Closes #2109 * remove redundant code #2113 * Set up CI with Azure Pipelines [skip ci] * TST: add native POWER8 to CI * add native POWER8 testing to Travis CI matrix with ppc64le os entry * Update link to IBM MASS library, update cpu support status * first try migrating one of the arm builds from travis * fix tabbing in azure commands * Update azure-pipelines.yml take out offending lines (although stolen from https://github.com/conda-forge/opencv-feedstock azure-pipelines fiie) * Update azure-pipelines.yml * Update azure-pipelines.yml * Update azure-pipelines.yml * Update azure-pipelines.yml * DOC: Add Azure CI status badge * Add ARMV6 build to azure CI setup (#2122) using aytekinar's Alpine image and docker script from the Travis setup [skip ci] * TST: Azure manylinux1 & clean-up * remove some of the steps & comments from the original Azure yml template * modify the trigger section to use develop since OpenBLAS primarily uses this branch; use the same batching behavior as downstream projects NumPy/ SciPy * remove Travis emulated ARMv6 gcc build because this now happens in Azure * use documented Ubuntu vmImage name for Azure and add in a manylinux1 test run to the matrix [skip appveyor] * Add NO_AFFINITY to available options on Linux, and set it to ON to match the gmake default. Fixes second part of #2114 * Replace ISMIN and ISAMIN kernels on all x86_64 platforms (#2125) * Mark iamax_sse.S as unsuitable for MIN due to issue #2116 * Use iamax.S rather than iamax_sse.S for ISMIN/ISAMIN on all x86_64 as workaround for #2116 * Move ARMv8 gcc build from Travis to Azure * Move ARMv8 gcc build from Travis to Azure * Update .travis.yml * Test drone CI * install make * remove sudo * Install gcc * Install perl * Install gfortran and add a clang job * gfortran->gcc-gfortran * Switch to ubuntu and parallel jobs * apt update * Fix typo * update yes * no need of gcc in clang build * Add a cmake build as well * Add cmake builds and print options * build without lapack on cmake * parallel build * See if ubuntu 19.04 fixes the ICE * Remove qemu armv8 builds * arm32 build * Fix typo * TST: add SkylakeX AVX512 CI test * adapt the C-level reproducer code for some recent SkylakeX AVX512 kernel issues, provided by Isuru Fernando and modified by Martin Kroeker, for usage in the utest suite * add an Intel SDE SkylakeX emulation utest run to the Azure CI matrix; a custom Docker build was required because Ubuntu image provided by Azure does not support AVX512VL instructions * Add option USE_LOCKING for single-threaded build with locking support for calling from concurrent threads * Add option USE_LOCKING for single-threaded build with locking support * Add option USE_LOCKING for SMP-like locking in USE_THREAD=0 builds * Add option USE_LOCKING but keep default settings intact * Remove unrelated change * Do not try ancient PGI hacks with recent versions of that compiler should fix #2139 * Build and run utests in any case, they do their own checks for fortran availability * Add softfp support in min/max kernels fix for #1912 * Revert "Add softfp support in min/max kernels" * Separate implementations of AMAX and IAMAX on arm As noted in #1912 and comment on #1942, the combined implementation happens to "do the right thing" on hardfp, but cannot return both value and index on softfp where they would have to share the return register * Ensure correct output for DAMAX with softfp * Use generic kernels for complex (I)AMAX to support softfp * improved zgemm power9 based on power8 * upload thread safety test folder * hook up c++ thread safety test (main Makefile) * add c++ thread test option to Makefile.rule * Document NO_AVX512 for #2151 * sgemm pipeline improved, zgemm rewritten without inner packs, ABI lxvx v20 fixed with vs52 * Fix detection of AVX512 capable compilers in getarch 21eda8b5 introduced a check in getarch.c to test if the compiler is capable of AVX512. This check currently fails, since the used __AVX2__ macro is only defined if getarch itself was compiled with AVX2/AVX512 support. Make sure this is the case by building getarch with -march=native on x86_64. It is only supposed to run on the build host anyway. * c_check: Unlink correct file * power9 zgemm ztrmm optimized * conflict resolve * Add gfortran workaround for ABI violations in LAPACKE for #2154 (see gcc bug 90329) * Add gfortran workaround for ABI violations for #2154 (see gcc bug 90329) * Add gfortran workaround for potential ABI violation for #2154 * Update fc.cmake * Remove any inadvertent use of -march=native from DYNAMIC_ARCH builds from #2143, -march=native precludes use of more specific options like -march=skylake-avx512 in individual kernels, and defeats the purpose of dynamic arch anyway. * Avoid unintentional activation of TLS code via USE_TLS=0 fixes #2149 * Do not force gcc options on non-gcc compilers fixes compile failure with pgi 18.10 as reported on OpenBLAS-users * Update Makefile.x86_64 * Zero ecx with a mov instruction PGI assembler does not like the initialization in the constraints. * Fix mov syntax * new sgemm 8x16 * Update dtrmm_kernel_16x4_power8.S * PGI compiler does not like -march=native * Fix build on FreeBSD/powerpc64. Signed-off-by: Piotr Kubaj <pkubaj@anongoth.pl> * Fix build for PPC970 on FreeBSD pt. 1 FreeBSD needs DCBT_ARG=0 as well. * Fix build for PPC970 on FreeBSD pt.2 FreeBSD needs those macros too. * cgemm/ctrmm power9 * Utest needs CBLAS but not necessarily FORTRAN * Add mingw builds to Appveyor config * Add getarch flags to disable AVX on x86 (and other small fixes to match Makefile behaviour) * Make disabling DYNAMIC_ARCH on unsupported systems work needs to be unset in the cache for the change to have any effect * Mingw32 needs leading underscore on object names (also copy BUNDERSCORE settings for FORTRAN from the corresponding Makefile)
6 years ago
rebase? (#1) * With the Intel compiler on Linux, prefer ifort for the final link step icc has known problems with mixed-language builds that ifort can handle just fine. Fixes #1956 * Rename operands to put lda on the input/output constraint list * Fix wrong constraints in inline assembly for #2009 * Fix inline assembly constraints rework indices to allow marking argument lda4 as input and output. For #2009 * Fix inline assembly constraints rework indices to allow marking argument lda as input and output. * Fix inline assembly constraints * Fix inline assembly constraints * Fix inline assembly constraints in Bulldozer TRSM kernels rework indices to allow marking i,as and bs as both input and output (marked operand n1 as well for simplicity). For #2009 * Correct range_n limiting same bug as seen in #1388, somehow missed in corresponding PR #1389 * Allow multithreading TRMV again revert workaround introduced for issue #1332 as the actual cause appears to be my incorrect fix from #1262 (see #1388) * Fix error introduced during cleanup * Reduce list of kernels in the dynamic arch build to make compilation complete reliably within the 1h limit again * init * move fix to right place * Fix missing -c option in AVX512 test * Fix AVX512 test always returning false due to missing compiler option * Make x86_32 imply NO_AVX2, NO_AVX512 in addition to NO_AVX fixes #2033 * Keep xcode8.3 for osx BINARY=32 build as xcode10 deprecated i386 * Make sure that AVX512 is disabled in 32bit builds for #2033 * Improve handling of NO_STATIC and NO_SHARED to avoid surprises from defining either as zero. Fixes #2035 by addressing some concerns from #1422 * init * address warning introed with #1814 et al * Restore locking optimizations for OpenMP case restore another accidentally dropped part of #1468 that was missed in #2004 to address performance regression reported in #1461 * HiSilicon tsv110 CPUs optimization branch add HiSilicon tsv110 CPUs optimization branch * add TARGET support for HiSilicon tsv110 CPUs * add TARGET support for HiSilicon tsv110 CPUs * add TARGET support for HiSilicon tsv110 CPUs * Fix module definition conflicts between LAPACK and ReLAPACK for #2043 * Do not compile in AVX512 check if AVX support is disabled xgetbv is function depends on NO_AVX being undefined - we could change that too, but that combo is unlikely to work anyway * ctest.c : add __POWERPC__ for PowerMac * Fix crash in sgemm SSE/nano kernel on x86_64 Fix bug #2047. Signed-off-by: Celelibi <celelibi@gmail.com> * param.h : enable defines for PPC970 on DarwinOS fixes: gemm.c: In function 'sgemm_': ../common_param.h:981:18: error: 'SGEMM_DEFAULT_P' undeclared (first use in this function) #define SGEMM_P SGEMM_DEFAULT_P ^ * common_power.h: force DCBT_ARG 0 on PPC970 Darwin without this, we see ../kernel/power/gemv_n.S:427:Parameter syntax error and many more similar entries that relates to this assembly command dcbt 8, r24, r18 this change makes the DCBT_ARG = 0 and openblas builds through to completion on PowerMac 970 Tests pass * Make TARGET=GENERIC compatible with DYNAMIC_ARCH=1 for issue #2048 * make DYNAMIC_ARCH=1 package work on TSV110. * make DYNAMIC_ARCH=1 package work on TSV110 * Add Intel Denverton for #2048 * Add Intel Denverton * Change 64-bit detection as explained in #2056 * Trivial typo fix as suggested in #2022 * Disable the AVX512 DGEMM kernel (again) Due to as yet unresolved errors seen in #1955 and #2029 * Use POSIX getenv on Cygwin The Windows-native GetEnvironmentVariable cannot be relied on, as Cygwin does not always copy environment variables set through Cygwin to the Windows environment block, particularly after fork(). * Fix for #2063: The DllMain used in Cygwin did not run the thread memory pool cleanup upon THREAD_DETACH which is needed when compiled with USE_TLS=1. * Also call CloseHandle on each thread, as well as on the event so as to not leak thread handles. * AIX asm syntax changes needed for shared object creation * power9 makefile. dgemm based on power8 kernel with following changes : 32x unrolled 16x4 kernel and 8x4 kernel using (lxv stxv butterfly rank1 update). improvement from 17 to 22-23gflops. dtrmm cases were added into dgemm itself * Expose CBLAS interfaces for I?MIN and I?MAX * Build CBLAS interfaces for I?MIN and I?MAX * Add declarations for ?sum and cblas_?sum * Add interface for ?sum (derived from ?asum) * Add ?sum * Add implementations of ssum/dsum and csum/zsum as trivial copies of asum/zsasum with the fabs calls replaced by fmov to preserve code structure * Add ARM implementations of ?sum (trivial copies of the respective ?asum with the fabs calls removed) * Add ARM64 implementations of ?sum as trivial copies of the respective ?asum kernels with the fabs calls removed * Add ia64 implementation of ?sum as trivial copy of asum with the fabs calls removed * Add MIPS implementation of ?sum as trivial copy of ?asum with the fabs calls removed * Add MIPS64 implementation of ?sum as trivial copy of ?asum with the fabs replaced by mov to preserve code structure * Add POWER implementation of ?sum as trivial copy of ?asum with the fabs replaced by fmr to preserve code structure * Add SPARC implementation of ?sum as trivial copy of ?asum with the fabs replaced by fmov to preserve code structure * Add x86 implementation of ?sum as trivial copy of ?asum with the fabs calls removed * Add x86_64 implementation of ?sum as trivial copy of ?asum with the fabs calls removed * Add ZARCH implementation of ?sum as trivial copies of the respective ?asum kernels with the ABS and vflpsb calls removed * Detect 32bit environment on 64bit ARM hardware for #2056, using same approach as #2058 * Add cmake defaults for ?sum kernels * Add ?sum * Add ?sum definitions for generic kernel * Add declarations for ?sum * Add -lm and disable EXPRECISION support on *BSD fixes #2075 * Add in runtime CPU detection for POWER. * snprintf define consolidated to common.h * Support INTERFACE64=1 * Add support for INTERFACE64 and fix XERBLA calls 1. Replaced all instances of "int" with "blasint" 2. Added string length as "hidden" third parameter in calls to fortran XERBLA * Correct length of name string in xerbla call * Avoid out-of-bounds accesses in LAPACK EIG tests see https://github.com/Reference-LAPACK/lapack/issues/333 * Correct INFO=4 condition * Disable reallocation of work array in xSYTRF as it appears to cause memory management problems (seen in the LAPACK tests) * Disable repeated recursion on Ab_BR in ReLAPACK xGBTRF due to crashes in LAPACK tests * sgemm/strmm * Update Changelog with changes from 0.3.6 * Increment version to 0.3.7.dev * Increment version to 0.3.7.dev * Misc. typo fixes Found via `codespell -q 3 -w -L ith,als,dum,nd,amin,nto,wis,ba -S ./relapack,./kernel,./lapack-netlib` * Correct argument of CPU_ISSET for glibc <2.5 fixes #2104 * conflict resolve * Revert reference/ fixes * Revert Changelog.txt typos * Disable the SkyLakeX DGEMMITCOPY kernel as well as a stopgap measure for https://github.com/numpy/numpy/issues/13401 as mentioned in #1955 * Disable DGEMMINCOPY as well for now #1955 * init * Fix errors in cpu enumeration with glibc 2.6 for #2114 * Change two http links to https Closes #2109 * remove redundant code #2113 * Set up CI with Azure Pipelines [skip ci] * TST: add native POWER8 to CI * add native POWER8 testing to Travis CI matrix with ppc64le os entry * Update link to IBM MASS library, update cpu support status * first try migrating one of the arm builds from travis * fix tabbing in azure commands * Update azure-pipelines.yml take out offending lines (although stolen from https://github.com/conda-forge/opencv-feedstock azure-pipelines fiie) * Update azure-pipelines.yml * Update azure-pipelines.yml * Update azure-pipelines.yml * Update azure-pipelines.yml * DOC: Add Azure CI status badge * Add ARMV6 build to azure CI setup (#2122) using aytekinar's Alpine image and docker script from the Travis setup [skip ci] * TST: Azure manylinux1 & clean-up * remove some of the steps & comments from the original Azure yml template * modify the trigger section to use develop since OpenBLAS primarily uses this branch; use the same batching behavior as downstream projects NumPy/ SciPy * remove Travis emulated ARMv6 gcc build because this now happens in Azure * use documented Ubuntu vmImage name for Azure and add in a manylinux1 test run to the matrix [skip appveyor] * Add NO_AFFINITY to available options on Linux, and set it to ON to match the gmake default. Fixes second part of #2114 * Replace ISMIN and ISAMIN kernels on all x86_64 platforms (#2125) * Mark iamax_sse.S as unsuitable for MIN due to issue #2116 * Use iamax.S rather than iamax_sse.S for ISMIN/ISAMIN on all x86_64 as workaround for #2116 * Move ARMv8 gcc build from Travis to Azure * Move ARMv8 gcc build from Travis to Azure * Update .travis.yml * Test drone CI * install make * remove sudo * Install gcc * Install perl * Install gfortran and add a clang job * gfortran->gcc-gfortran * Switch to ubuntu and parallel jobs * apt update * Fix typo * update yes * no need of gcc in clang build * Add a cmake build as well * Add cmake builds and print options * build without lapack on cmake * parallel build * See if ubuntu 19.04 fixes the ICE * Remove qemu armv8 builds * arm32 build * Fix typo * TST: add SkylakeX AVX512 CI test * adapt the C-level reproducer code for some recent SkylakeX AVX512 kernel issues, provided by Isuru Fernando and modified by Martin Kroeker, for usage in the utest suite * add an Intel SDE SkylakeX emulation utest run to the Azure CI matrix; a custom Docker build was required because Ubuntu image provided by Azure does not support AVX512VL instructions * Add option USE_LOCKING for single-threaded build with locking support for calling from concurrent threads * Add option USE_LOCKING for single-threaded build with locking support * Add option USE_LOCKING for SMP-like locking in USE_THREAD=0 builds * Add option USE_LOCKING but keep default settings intact * Remove unrelated change * Do not try ancient PGI hacks with recent versions of that compiler should fix #2139 * Build and run utests in any case, they do their own checks for fortran availability * Add softfp support in min/max kernels fix for #1912 * Revert "Add softfp support in min/max kernels" * Separate implementations of AMAX and IAMAX on arm As noted in #1912 and comment on #1942, the combined implementation happens to "do the right thing" on hardfp, but cannot return both value and index on softfp where they would have to share the return register * Ensure correct output for DAMAX with softfp * Use generic kernels for complex (I)AMAX to support softfp * improved zgemm power9 based on power8 * upload thread safety test folder * hook up c++ thread safety test (main Makefile) * add c++ thread test option to Makefile.rule * Document NO_AVX512 for #2151 * sgemm pipeline improved, zgemm rewritten without inner packs, ABI lxvx v20 fixed with vs52 * Fix detection of AVX512 capable compilers in getarch 21eda8b5 introduced a check in getarch.c to test if the compiler is capable of AVX512. This check currently fails, since the used __AVX2__ macro is only defined if getarch itself was compiled with AVX2/AVX512 support. Make sure this is the case by building getarch with -march=native on x86_64. It is only supposed to run on the build host anyway. * c_check: Unlink correct file * power9 zgemm ztrmm optimized * conflict resolve * Add gfortran workaround for ABI violations in LAPACKE for #2154 (see gcc bug 90329) * Add gfortran workaround for ABI violations for #2154 (see gcc bug 90329) * Add gfortran workaround for potential ABI violation for #2154 * Update fc.cmake * Remove any inadvertent use of -march=native from DYNAMIC_ARCH builds from #2143, -march=native precludes use of more specific options like -march=skylake-avx512 in individual kernels, and defeats the purpose of dynamic arch anyway. * Avoid unintentional activation of TLS code via USE_TLS=0 fixes #2149 * Do not force gcc options on non-gcc compilers fixes compile failure with pgi 18.10 as reported on OpenBLAS-users * Update Makefile.x86_64 * Zero ecx with a mov instruction PGI assembler does not like the initialization in the constraints. * Fix mov syntax * new sgemm 8x16 * Update dtrmm_kernel_16x4_power8.S * PGI compiler does not like -march=native * Fix build on FreeBSD/powerpc64. Signed-off-by: Piotr Kubaj <pkubaj@anongoth.pl> * Fix build for PPC970 on FreeBSD pt. 1 FreeBSD needs DCBT_ARG=0 as well. * Fix build for PPC970 on FreeBSD pt.2 FreeBSD needs those macros too. * cgemm/ctrmm power9 * Utest needs CBLAS but not necessarily FORTRAN * Add mingw builds to Appveyor config * Add getarch flags to disable AVX on x86 (and other small fixes to match Makefile behaviour) * Make disabling DYNAMIC_ARCH on unsupported systems work needs to be unset in the cache for the change to have any effect * Mingw32 needs leading underscore on object names (also copy BUNDERSCORE settings for FORTRAN from the corresponding Makefile)
6 years ago
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  1. /*********************************************************************/
  2. /* Copyright 2009, 2010 The University of Texas at Austin. */
  3. /* All rights reserved. */
  4. /* */
  5. /* Redistribution and use in source and binary forms, with or */
  6. /* without modification, are permitted provided that the following */
  7. /* conditions are met: */
  8. /* */
  9. /* 1. Redistributions of source code must retain the above */
  10. /* copyright notice, this list of conditions and the following */
  11. /* disclaimer. */
  12. /* */
  13. /* 2. Redistributions in binary form must reproduce the above */
  14. /* copyright notice, this list of conditions and the following */
  15. /* disclaimer in the documentation and/or other materials */
  16. /* provided with the distribution. */
  17. /* */
  18. /* THIS SOFTWARE IS PROVIDED BY THE UNIVERSITY OF TEXAS AT */
  19. /* AUSTIN ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, */
  20. /* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF */
  21. /* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE */
  22. /* DISCLAIMED. IN NO EVENT SHALL THE UNIVERSITY OF TEXAS AT */
  23. /* AUSTIN OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, */
  24. /* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES */
  25. /* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE */
  26. /* GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR */
  27. /* BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF */
  28. /* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT */
  29. /* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT */
  30. /* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE */
  31. /* POSSIBILITY OF SUCH DAMAGE. */
  32. /* */
  33. /* The views and conclusions contained in the software and */
  34. /* documentation are those of the authors and should not be */
  35. /* interpreted as representing official policies, either expressed */
  36. /* or implied, of The University of Texas at Austin. */
  37. /*********************************************************************/
  38. #define ASSEMBLER
  39. #include "common.h"
  40. #ifndef __64BIT__
  41. #define LOAD lwz
  42. #else
  43. #define LOAD ld
  44. #endif
  45. #ifdef __64BIT__
  46. #define STACKSIZE 320
  47. #define ALPHA 296(SP)
  48. #define FZERO 304(SP)
  49. #else
  50. #define STACKSIZE 240
  51. #define ALPHA 224(SP)
  52. #define FZERO 232(SP)
  53. #endif
  54. #define M r3
  55. #define N r4
  56. #define K r5
  57. #if defined(linux) || defined(__FreeBSD__)
  58. #ifndef __64BIT__
  59. #define A r6
  60. #define B r7
  61. #define C r8
  62. #define LDC r9
  63. #define OFFSET r10
  64. #else
  65. #define A r7
  66. #define B r8
  67. #define C r9
  68. #define LDC r10
  69. #define OFFSET r6
  70. #endif
  71. #endif
  72. #if defined(_AIX) || defined(__APPLE__)
  73. #if !defined(__64BIT__) && defined(DOUBLE)
  74. #define A r8
  75. #define B r9
  76. #define C r10
  77. #define LDC r7
  78. #define OFFSET r6
  79. #else
  80. #define A r7
  81. #define B r8
  82. #define C r9
  83. #define LDC r10
  84. #define OFFSET r6
  85. #endif
  86. #endif
  87. #define AORIG r18
  88. #define TEMP r19
  89. #define KK r20
  90. #define I r21
  91. #define J r22
  92. #define AO r23
  93. #define BO r24
  94. #define CO1 r25
  95. #define CO2 r26
  96. #define CO3 r27
  97. #define CO4 r28
  98. #define PREA r29
  99. #define PREB r30
  100. #define PREC r31
  101. #ifndef NEEDPARAM
  102. PROLOGUE
  103. PROFCODE
  104. addi SP, SP, -STACKSIZE
  105. li r0, 0
  106. stfd f14, 0(SP)
  107. stfd f15, 8(SP)
  108. stfd f16, 16(SP)
  109. stfd f17, 24(SP)
  110. stfd f18, 32(SP)
  111. stfd f19, 40(SP)
  112. stfd f20, 48(SP)
  113. stfd f21, 56(SP)
  114. stfd f22, 64(SP)
  115. stfd f23, 72(SP)
  116. stfd f24, 80(SP)
  117. stfd f25, 88(SP)
  118. stfd f26, 96(SP)
  119. stfd f27, 104(SP)
  120. stfd f28, 112(SP)
  121. stfd f29, 120(SP)
  122. stfd f30, 128(SP)
  123. stfd f31, 136(SP)
  124. #ifdef __64BIT__
  125. std r31, 144(SP)
  126. std r30, 152(SP)
  127. std r29, 160(SP)
  128. std r28, 168(SP)
  129. std r27, 176(SP)
  130. std r26, 184(SP)
  131. std r25, 192(SP)
  132. std r24, 200(SP)
  133. std r23, 208(SP)
  134. std r22, 216(SP)
  135. std r21, 224(SP)
  136. std r20, 232(SP)
  137. std r19, 240(SP)
  138. std r18, 248(SP)
  139. #else
  140. stw r31, 144(SP)
  141. stw r30, 148(SP)
  142. stw r29, 152(SP)
  143. stw r28, 156(SP)
  144. stw r27, 160(SP)
  145. stw r26, 164(SP)
  146. stw r25, 168(SP)
  147. stw r24, 172(SP)
  148. stw r23, 176(SP)
  149. stw r22, 180(SP)
  150. stw r21, 184(SP)
  151. stw r20, 188(SP)
  152. stw r19, 192(SP)
  153. stw r18, 196(SP)
  154. #endif
  155. stw r0, FZERO
  156. #if defined(_AIX) || defined(__APPLE__)
  157. #if !defined(__64BIT__) && defined(DOUBLE)
  158. lwz LDC, FRAMESLOT(0) + STACKSIZE(SP)
  159. #endif
  160. #endif
  161. slwi LDC, LDC, BASE_SHIFT
  162. #if (defined(linux) || defined(__FreeBSD__)) && defined(__64BIT__)
  163. ld OFFSET, FRAMESLOT(0) + STACKSIZE(SP)
  164. #endif
  165. #if defined(_AIX) || defined(__APPLE__)
  166. #ifdef __64BIT__
  167. ld OFFSET, FRAMESLOT(0) + STACKSIZE(SP)
  168. #else
  169. #ifdef DOUBLE
  170. lwz OFFSET, FRAMESLOT(1) + STACKSIZE(SP)
  171. #else
  172. lwz OFFSET, FRAMESLOT(0) + STACKSIZE(SP)
  173. #endif
  174. #endif
  175. #endif
  176. #ifdef LN
  177. mullw r0, M, K
  178. slwi r0, r0, BASE_SHIFT
  179. add A, A, r0
  180. slwi r0, M, BASE_SHIFT
  181. add C, C, r0
  182. #endif
  183. #ifdef RN
  184. neg KK, OFFSET
  185. #endif
  186. #ifdef RT
  187. mullw r0, N, K
  188. slwi r0, r0, BASE_SHIFT
  189. add B, B, r0
  190. mullw r0, N, LDC
  191. add C, C, r0
  192. sub KK, N, OFFSET
  193. #endif
  194. cmpwi cr0, M, 0
  195. ble LL(999)
  196. cmpwi cr0, N, 0
  197. ble LL(999)
  198. cmpwi cr0, K, 0
  199. ble LL(999)
  200. #ifndef PREFETCHTEST
  201. li PREC, -4 * SIZE
  202. #else
  203. #if defined(linux) || defined(__FreeBSD__)
  204. #ifndef __64BIT__
  205. mr PREA, r10
  206. lwz PREB, FRAMESLOT(0) + STACKSIZE(SP)
  207. lwz PREC, FRAMESLOT(1) + STACKSIZE(SP)
  208. #else
  209. ld PREA, FRAMESLOT(0) + STACKSIZE(SP)
  210. ld PREB, FRAMESLOT(1) + STACKSIZE(SP)
  211. ld PREC, FRAMESLOT(2) + STACKSIZE(SP)
  212. #endif
  213. #endif
  214. #if defined(_AIX) || defined(__APPLE__)
  215. #ifdef __64BIT__
  216. ld PREA, FRAMESLOT(0) + STACKSIZE(SP)
  217. ld PREB, FRAMESLOT(1) + STACKSIZE(SP)
  218. ld PREC, FRAMESLOT(2) + STACKSIZE(SP)
  219. #else
  220. #ifdef DOUBLE
  221. lwz PREA, FRAMESLOT(1) + STACKSIZE(SP)
  222. lwz PREB, FRAMESLOT(2) + STACKSIZE(SP)
  223. lwz PREC, FRAMESLOT(3) + STACKSIZE(SP)
  224. #else
  225. lwz PREA, FRAMESLOT(0) + STACKSIZE(SP)
  226. lwz PREB, FRAMESLOT(1) + STACKSIZE(SP)
  227. lwz PREC, FRAMESLOT(2) + STACKSIZE(SP)
  228. #endif
  229. #endif
  230. #endif
  231. #endif
  232. #ifndef PREFETCHTEST
  233. #ifdef PPC970
  234. #ifdef ALLOC_HUGETLB
  235. li PREA, (16 * 5 * SIZE | 1)
  236. li PREB, (16 * 5 * SIZE | 3)
  237. #else
  238. li PREA, (16 * 14 * SIZE | 1)
  239. li PREB, (16 * 8 * SIZE | 3)
  240. #endif
  241. #endif
  242. #ifdef POWER4
  243. #ifdef ALLOC_HUGETLB
  244. li PREA, (16 * 1 * SIZE + 16)
  245. li PREB, (16 * 1 * SIZE + 16)
  246. #else
  247. li PREA, (16 * 2 * SIZE + 16)
  248. li PREB, (16 * 2 * SIZE + 16)
  249. #endif
  250. #endif
  251. #ifdef POWER5
  252. #ifdef ALLOC_HUGETLB
  253. li PREA, (16 * 7 * SIZE | 1)
  254. li PREB, (16 * 7 * SIZE | 3)
  255. #else
  256. li PREA, (16 * 12 * SIZE | 1)
  257. li PREB, (16 * 6 * SIZE | 3)
  258. #endif
  259. #endif
  260. #ifdef CELL
  261. li PREA, (16 * 12 * SIZE)
  262. li PREB, (16 * 12 * SIZE)
  263. #endif
  264. #endif
  265. lfs f0, FZERO
  266. srawi. J, N, 2
  267. ble LL(40)
  268. .align 4
  269. LL(10):
  270. #ifdef RT
  271. slwi r0, K, 2 + BASE_SHIFT
  272. sub B, B, r0
  273. slwi r0, LDC, 2
  274. sub C, C, r0
  275. #endif
  276. mr CO1, C
  277. add CO2, C, LDC
  278. add CO3, CO2, LDC
  279. add CO4, CO3, LDC
  280. #ifdef LN
  281. add KK, M, OFFSET
  282. #endif
  283. #ifdef LT
  284. mr KK, OFFSET
  285. #endif
  286. fmr f1, f0
  287. fmr f2, f0
  288. fmr f3, f0
  289. fmr f4, f0
  290. fmr f5, f0
  291. fmr f6, f0
  292. fmr f7, f0
  293. fmr f8, f0
  294. fmr f9, f0
  295. fmr f10, f0
  296. fmr f11, f0
  297. fmr f12, f0
  298. fmr f13, f0
  299. fmr f14, f0
  300. fmr f15, f0
  301. #if defined(LN) || defined(RT)
  302. mr AORIG, A
  303. #else
  304. mr AO, A
  305. #endif
  306. #ifndef RT
  307. add C, CO4, LDC
  308. #endif
  309. LL(30):
  310. andi. I, M, 1
  311. ble LL(20)
  312. #if defined(LT) || defined(RN)
  313. LFD f16, 0 * SIZE(AO)
  314. LFD f17, 1 * SIZE(AO)
  315. LFD f18, 2 * SIZE(AO)
  316. LFD f19, 3 * SIZE(AO)
  317. LFD f20, 0 * SIZE(B)
  318. LFD f21, 1 * SIZE(B)
  319. LFD f22, 2 * SIZE(B)
  320. LFD f23, 3 * SIZE(B)
  321. LFD f24, 4 * SIZE(B)
  322. LFD f25, 5 * SIZE(B)
  323. LFD f26, 6 * SIZE(B)
  324. LFD f27, 7 * SIZE(B)
  325. srawi. r0, KK, 2
  326. mtspr CTR, r0
  327. mr BO, B
  328. #else
  329. #ifdef LN
  330. slwi r0, K, BASE_SHIFT
  331. sub AORIG, AORIG, r0
  332. #endif
  333. slwi r0, KK, 0 + BASE_SHIFT
  334. slwi TEMP, KK, 2 + BASE_SHIFT
  335. add AO, AORIG, r0
  336. add BO, B, TEMP
  337. sub TEMP, K, KK
  338. LFD f16, 0 * SIZE(AO)
  339. LFD f17, 1 * SIZE(AO)
  340. LFD f18, 2 * SIZE(AO)
  341. LFD f19, 3 * SIZE(AO)
  342. LFD f20, 0 * SIZE(BO)
  343. LFD f21, 1 * SIZE(BO)
  344. LFD f22, 2 * SIZE(BO)
  345. LFD f23, 3 * SIZE(BO)
  346. LFD f24, 4 * SIZE(BO)
  347. LFD f25, 5 * SIZE(BO)
  348. LFD f26, 6 * SIZE(BO)
  349. LFD f27, 7 * SIZE(BO)
  350. srawi. r0, TEMP, 2
  351. mtspr CTR, r0
  352. #endif
  353. ble LL(35)
  354. .align 5
  355. LL(32):
  356. FMADD f0, f16, f20, f0
  357. FMADD f4, f16, f21, f4
  358. FMADD f8, f16, f22, f8
  359. FMADD f12, f16, f23, f12
  360. LFD f20, 8 * SIZE(BO)
  361. LFD f21, 9 * SIZE(BO)
  362. LFD f22, 10 * SIZE(BO)
  363. LFD f23, 11 * SIZE(BO)
  364. FMADD f1, f17, f24, f1
  365. FMADD f5, f17, f25, f5
  366. FMADD f9, f17, f26, f9
  367. FMADD f13, f17, f27, f13
  368. LFD f24, 12 * SIZE(BO)
  369. LFD f25, 13 * SIZE(BO)
  370. LFD f26, 14 * SIZE(BO)
  371. LFD f27, 15 * SIZE(BO)
  372. FMADD f0, f18, f20, f0
  373. FMADD f4, f18, f21, f4
  374. FMADD f8, f18, f22, f8
  375. FMADD f12, f18, f23, f12
  376. LFD f20, 16 * SIZE(BO)
  377. LFD f21, 17 * SIZE(BO)
  378. LFD f22, 18 * SIZE(BO)
  379. LFD f23, 19 * SIZE(BO)
  380. FMADD f1, f19, f24, f1
  381. FMADD f5, f19, f25, f5
  382. FMADD f9, f19, f26, f9
  383. FMADD f13, f19, f27, f13
  384. LFD f16, 4 * SIZE(AO)
  385. LFD f17, 5 * SIZE(AO)
  386. LFD f18, 6 * SIZE(AO)
  387. LFD f19, 7 * SIZE(AO)
  388. LFD f24, 20 * SIZE(BO)
  389. LFD f25, 21 * SIZE(BO)
  390. LFD f26, 22 * SIZE(BO)
  391. LFD f27, 23 * SIZE(BO)
  392. addi AO, AO, 4 * SIZE
  393. addi BO, BO, 16 * SIZE
  394. DCBT(BO, PREB)
  395. bdnz LL(32)
  396. fadd f0, f1, f0
  397. fadd f4, f5, f4
  398. fadd f8, f9, f8
  399. fadd f12, f13, f12
  400. .align 4
  401. LL(35):
  402. #if defined(LT) || defined(RN)
  403. andi. r0, KK, 3
  404. #else
  405. andi. r0, TEMP, 3
  406. #endif
  407. mtspr CTR, r0
  408. ble+ LL(38)
  409. .align 4
  410. LL(36):
  411. FMADD f0, f16, f20, f0
  412. FMADD f4, f16, f21, f4
  413. FMADD f8, f16, f22, f8
  414. FMADD f12, f16, f23, f12
  415. LFD f16, 1 * SIZE(AO)
  416. LFD f20, 4 * SIZE(BO)
  417. LFD f21, 5 * SIZE(BO)
  418. LFD f22, 6 * SIZE(BO)
  419. LFD f23, 7 * SIZE(BO)
  420. addi BO, BO, 4 * SIZE
  421. addi AO, AO, 1 * SIZE
  422. bdnz LL(36)
  423. .align 4
  424. LL(38):
  425. #if defined(LN) || defined(RT)
  426. #ifdef LN
  427. subi r0, KK, 1
  428. #else
  429. subi r0, KK, 4
  430. #endif
  431. slwi TEMP, r0, 0 + BASE_SHIFT
  432. slwi r0, r0, 2 + BASE_SHIFT
  433. add AO, AORIG, TEMP
  434. add BO, B, r0
  435. #endif
  436. #if defined(LN) || defined(LT)
  437. LFD f16, 0 * SIZE(BO)
  438. LFD f17, 1 * SIZE(BO)
  439. LFD f18, 2 * SIZE(BO)
  440. LFD f19, 3 * SIZE(BO)
  441. FSUB f0, f16, f0
  442. FSUB f4, f17, f4
  443. FSUB f8, f18, f8
  444. FSUB f12, f19, f12
  445. #else
  446. LFD f16, 0 * SIZE(AO)
  447. LFD f20, 1 * SIZE(AO)
  448. LFD f24, 2 * SIZE(AO)
  449. LFD f28, 3 * SIZE(AO)
  450. FSUB f0, f16, f0
  451. FSUB f4, f20, f4
  452. FSUB f8, f24, f8
  453. FSUB f12, f28, f12
  454. #endif
  455. #ifdef LN
  456. LFD f21, 0 * SIZE(AO)
  457. FMUL f0, f21, f0
  458. FMUL f4, f21, f4
  459. FMUL f8, f21, f8
  460. FMUL f12, f21, f12
  461. #endif
  462. #ifdef LT
  463. LFD f16, 0 * SIZE(AO)
  464. FMUL f0, f16, f0
  465. FMUL f4, f16, f4
  466. FMUL f8, f16, f8
  467. FMUL f12, f16, f12
  468. #endif
  469. #ifdef RN
  470. LFD f16, 0 * SIZE(BO)
  471. LFD f17, 1 * SIZE(BO)
  472. LFD f18, 2 * SIZE(BO)
  473. LFD f19, 3 * SIZE(BO)
  474. FMUL f0, f16, f0
  475. FNMSUB f4, f17, f0, f4
  476. FNMSUB f8, f18, f0, f8
  477. FNMSUB f12, f19, f0, f12
  478. LFD f16, 5 * SIZE(BO)
  479. LFD f17, 6 * SIZE(BO)
  480. LFD f18, 7 * SIZE(BO)
  481. LFD f19, 10 * SIZE(BO)
  482. LFD f20, 11 * SIZE(BO)
  483. LFD f21, 15 * SIZE(BO)
  484. FMUL f4, f16, f4
  485. FNMSUB f8, f17, f4, f8
  486. FNMSUB f12, f18, f4, f12
  487. FMUL f8, f19, f8
  488. FNMSUB f12, f20, f8, f12
  489. FMUL f12, f21, f12
  490. #endif
  491. #ifdef RT
  492. LFD f16, 15 * SIZE(BO)
  493. LFD f17, 14 * SIZE(BO)
  494. LFD f18, 13 * SIZE(BO)
  495. LFD f19, 12 * SIZE(BO)
  496. FMUL f12, f16, f12
  497. FNMSUB f8, f17, f12, f8
  498. FNMSUB f4, f18, f12, f4
  499. FNMSUB f0, f19, f12, f0
  500. LFD f16, 10 * SIZE(BO)
  501. LFD f17, 9 * SIZE(BO)
  502. LFD f18, 8 * SIZE(BO)
  503. LFD f19, 5 * SIZE(BO)
  504. FMUL f8, f16, f8
  505. LFD f20, 4 * SIZE(BO)
  506. LFD f21, 0 * SIZE(BO)
  507. FNMSUB f4, f17, f8, f4
  508. FNMSUB f0, f18, f8, f0
  509. FMUL f4, f19, f4
  510. FNMSUB f0, f20, f4, f0
  511. FMUL f0, f21, f0
  512. #endif
  513. #ifdef LN
  514. subi CO1, CO1, 1 * SIZE
  515. subi CO2, CO2, 1 * SIZE
  516. subi CO3, CO3, 1 * SIZE
  517. subi CO4, CO4, 1 * SIZE
  518. #endif
  519. #if defined(LN) || defined(LT)
  520. STFD f0, 0 * SIZE(BO)
  521. STFD f4, 1 * SIZE(BO)
  522. STFD f8, 2 * SIZE(BO)
  523. STFD f12, 3 * SIZE(BO)
  524. #else
  525. STFD f0, 0 * SIZE(AO)
  526. STFD f4, 1 * SIZE(AO)
  527. STFD f8, 2 * SIZE(AO)
  528. STFD f12, 3 * SIZE(AO)
  529. #endif
  530. STFD f0, 0 * SIZE(CO1)
  531. STFD f4, 0 * SIZE(CO2)
  532. STFD f8, 0 * SIZE(CO3)
  533. STFD f12, 0 * SIZE(CO4)
  534. lfs f0, FZERO
  535. fmr f1, f0
  536. fmr f4, f0
  537. fmr f5, f0
  538. fmr f8, f0
  539. fmr f9, f0
  540. fmr f12, f0
  541. fmr f13, f0
  542. #ifndef LN
  543. addi CO1, CO1, 1 * SIZE
  544. addi CO2, CO2, 1 * SIZE
  545. addi CO3, CO3, 1 * SIZE
  546. addi CO4, CO4, 1 * SIZE
  547. #endif
  548. #ifdef RT
  549. slwi r0, K, 0 + BASE_SHIFT
  550. add AORIG, AORIG, r0
  551. #endif
  552. #if defined(LT) || defined(RN)
  553. sub TEMP, K, KK
  554. slwi r0, TEMP, 0 + BASE_SHIFT
  555. slwi TEMP, TEMP, 2 + BASE_SHIFT
  556. add AO, AO, r0
  557. add BO, BO, TEMP
  558. #endif
  559. #ifdef LN
  560. subi KK, KK, 1
  561. #endif
  562. #ifdef LT
  563. addi KK, KK, 1
  564. #endif
  565. .align 4
  566. LL(20):
  567. andi. I, M, 2
  568. ble LL(09)
  569. #if defined(LT) || defined(RN)
  570. LFD f16, 0 * SIZE(AO)
  571. LFD f17, 1 * SIZE(AO)
  572. LFD f18, 2 * SIZE(AO)
  573. LFD f19, 3 * SIZE(AO)
  574. LFD f20, 0 * SIZE(B)
  575. LFD f21, 1 * SIZE(B)
  576. LFD f22, 2 * SIZE(B)
  577. LFD f23, 3 * SIZE(B)
  578. LFD f24, 4 * SIZE(B)
  579. LFD f25, 5 * SIZE(B)
  580. LFD f26, 6 * SIZE(B)
  581. LFD f27, 7 * SIZE(B)
  582. srawi. r0, KK, 2
  583. mtspr CTR, r0
  584. mr BO, B
  585. #else
  586. #ifdef LN
  587. slwi r0, K, 1 + BASE_SHIFT
  588. sub AORIG, AORIG, r0
  589. #endif
  590. slwi r0, KK, 1 + BASE_SHIFT
  591. slwi TEMP, KK, 2 + BASE_SHIFT
  592. add AO, AORIG, r0
  593. add BO, B, TEMP
  594. sub TEMP, K, KK
  595. LFD f16, 0 * SIZE(AO)
  596. LFD f17, 1 * SIZE(AO)
  597. LFD f18, 2 * SIZE(AO)
  598. LFD f19, 3 * SIZE(AO)
  599. LFD f20, 0 * SIZE(BO)
  600. LFD f21, 1 * SIZE(BO)
  601. LFD f22, 2 * SIZE(BO)
  602. LFD f23, 3 * SIZE(BO)
  603. LFD f24, 4 * SIZE(BO)
  604. LFD f25, 5 * SIZE(BO)
  605. LFD f26, 6 * SIZE(BO)
  606. LFD f27, 7 * SIZE(BO)
  607. srawi. r0, TEMP, 2
  608. mtspr CTR, r0
  609. #endif
  610. ble LL(25)
  611. .align 5
  612. LL(22):
  613. FMADD f0, f16, f20, f0
  614. FMADD f1, f17, f20, f1
  615. FMADD f4, f16, f21, f4
  616. FMADD f5, f17, f21, f5
  617. FMADD f8, f16, f22, f8
  618. FMADD f9, f17, f22, f9
  619. FMADD f12, f16, f23, f12
  620. FMADD f13, f17, f23, f13
  621. LFD f20, 8 * SIZE(BO)
  622. LFD f21, 9 * SIZE(BO)
  623. LFD f22, 10 * SIZE(BO)
  624. LFD f23, 11 * SIZE(BO)
  625. FMADD f2, f18, f24, f2
  626. FMADD f3, f19, f24, f3
  627. FMADD f6, f18, f25, f6
  628. FMADD f7, f19, f25, f7
  629. FMADD f10, f18, f26, f10
  630. FMADD f11, f19, f26, f11
  631. FMADD f14, f18, f27, f14
  632. FMADD f15, f19, f27, f15
  633. LFD f16, 4 * SIZE(AO)
  634. LFD f17, 5 * SIZE(AO)
  635. LFD f18, 6 * SIZE(AO)
  636. LFD f19, 7 * SIZE(AO)
  637. FMADD f0, f16, f20, f0
  638. FMADD f1, f17, f20, f1
  639. FMADD f4, f16, f21, f4
  640. FMADD f5, f17, f21, f5
  641. LFD f24, 12 * SIZE(BO)
  642. LFD f25, 13 * SIZE(BO)
  643. LFD f26, 14 * SIZE(BO)
  644. LFD f27, 15 * SIZE(BO)
  645. FMADD f8, f16, f22, f8
  646. FMADD f9, f17, f22, f9
  647. FMADD f12, f16, f23, f12
  648. FMADD f13, f17, f23, f13
  649. LFD f20, 16 * SIZE(BO)
  650. LFD f21, 17 * SIZE(BO)
  651. LFD f22, 18 * SIZE(BO)
  652. LFD f23, 19 * SIZE(BO)
  653. FMADD f2, f18, f24, f2
  654. FMADD f3, f19, f24, f3
  655. FMADD f6, f18, f25, f6
  656. FMADD f7, f19, f25, f7
  657. FMADD f10, f18, f26, f10
  658. FMADD f11, f19, f26, f11
  659. FMADD f14, f18, f27, f14
  660. FMADD f15, f19, f27, f15
  661. LFD f16, 8 * SIZE(AO)
  662. LFD f17, 9 * SIZE(AO)
  663. LFD f18, 10 * SIZE(AO)
  664. LFD f19, 11 * SIZE(AO)
  665. LFD f24, 20 * SIZE(BO)
  666. LFD f25, 21 * SIZE(BO)
  667. LFD f26, 22 * SIZE(BO)
  668. LFD f27, 23 * SIZE(BO)
  669. addi AO, AO, 8 * SIZE
  670. addi BO, BO, 16 * SIZE
  671. DCBT(BO, PREB)
  672. bdnz LL(22)
  673. fadd f0, f2, f0
  674. fadd f1, f3, f1
  675. fadd f4, f6, f4
  676. fadd f5, f7, f5
  677. fadd f8, f10, f8
  678. fadd f9, f11, f9
  679. fadd f12, f14, f12
  680. fadd f13, f15, f13
  681. .align 4
  682. LL(25):
  683. #if defined(LT) || defined(RN)
  684. andi. r0, KK, 3
  685. #else
  686. andi. r0, TEMP, 3
  687. #endif
  688. mtspr CTR, r0
  689. ble+ LL(28)
  690. .align 4
  691. LL(26):
  692. FMADD f0, f16, f20, f0
  693. FMADD f1, f17, f20, f1
  694. FMADD f4, f16, f21, f4
  695. FMADD f5, f17, f21, f5
  696. FMADD f8, f16, f22, f8
  697. FMADD f9, f17, f22, f9
  698. FMADD f12, f16, f23, f12
  699. FMADD f13, f17, f23, f13
  700. LFD f16, 2 * SIZE(AO)
  701. LFD f17, 3 * SIZE(AO)
  702. LFD f20, 4 * SIZE(BO)
  703. LFD f21, 5 * SIZE(BO)
  704. LFD f22, 6 * SIZE(BO)
  705. LFD f23, 7 * SIZE(BO)
  706. addi BO, BO, 4 * SIZE
  707. addi AO, AO, 2 * SIZE
  708. bdnz LL(26)
  709. .align 4
  710. LL(28):
  711. #if defined(LN) || defined(RT)
  712. #ifdef LN
  713. subi r0, KK, 2
  714. #else
  715. subi r0, KK, 4
  716. #endif
  717. slwi TEMP, r0, 1 + BASE_SHIFT
  718. slwi r0, r0, 2 + BASE_SHIFT
  719. add AO, AORIG, TEMP
  720. add BO, B, r0
  721. #endif
  722. #if defined(LN) || defined(LT)
  723. LFD f16, 0 * SIZE(BO)
  724. LFD f17, 1 * SIZE(BO)
  725. LFD f18, 2 * SIZE(BO)
  726. LFD f19, 3 * SIZE(BO)
  727. LFD f20, 4 * SIZE(BO)
  728. LFD f21, 5 * SIZE(BO)
  729. LFD f22, 6 * SIZE(BO)
  730. LFD f23, 7 * SIZE(BO)
  731. FSUB f0, f16, f0
  732. FSUB f4, f17, f4
  733. FSUB f8, f18, f8
  734. FSUB f12, f19, f12
  735. FSUB f1, f20, f1
  736. FSUB f5, f21, f5
  737. FSUB f9, f22, f9
  738. FSUB f13, f23, f13
  739. #else
  740. LFD f16, 0 * SIZE(AO)
  741. LFD f17, 1 * SIZE(AO)
  742. LFD f20, 2 * SIZE(AO)
  743. LFD f21, 3 * SIZE(AO)
  744. LFD f24, 4 * SIZE(AO)
  745. LFD f25, 5 * SIZE(AO)
  746. LFD f28, 6 * SIZE(AO)
  747. LFD f29, 7 * SIZE(AO)
  748. FSUB f0, f16, f0
  749. FSUB f1, f17, f1
  750. FSUB f4, f20, f4
  751. FSUB f5, f21, f5
  752. FSUB f8, f24, f8
  753. FSUB f9, f25, f9
  754. FSUB f12, f28, f12
  755. FSUB f13, f29, f13
  756. #endif
  757. #ifdef LN
  758. LFD f19, 3 * SIZE(AO)
  759. LFD f20, 2 * SIZE(AO)
  760. LFD f21, 0 * SIZE(AO)
  761. FMUL f1, f19, f1
  762. FMUL f5, f19, f5
  763. FMUL f9, f19, f9
  764. FMUL f13, f19, f13
  765. FNMSUB f0, f20, f1, f0
  766. FNMSUB f4, f20, f5, f4
  767. FNMSUB f8, f20, f9, f8
  768. FNMSUB f12, f20, f13, f12
  769. FMUL f0, f21, f0
  770. FMUL f4, f21, f4
  771. FMUL f8, f21, f8
  772. FMUL f12, f21, f12
  773. #endif
  774. #ifdef LT
  775. LFD f16, 0 * SIZE(AO)
  776. LFD f17, 1 * SIZE(AO)
  777. FMUL f0, f16, f0
  778. FMUL f4, f16, f4
  779. FMUL f8, f16, f8
  780. FMUL f12, f16, f12
  781. FNMSUB f1, f17, f0, f1
  782. FNMSUB f5, f17, f4, f5
  783. FNMSUB f9, f17, f8, f9
  784. FNMSUB f13, f17, f12, f13
  785. LFD f17, 3 * SIZE(AO)
  786. FMUL f1, f17, f1
  787. FMUL f5, f17, f5
  788. FMUL f9, f17, f9
  789. FMUL f13, f17, f13
  790. #endif
  791. #ifdef RN
  792. LFD f16, 0 * SIZE(BO)
  793. LFD f17, 1 * SIZE(BO)
  794. LFD f18, 2 * SIZE(BO)
  795. LFD f19, 3 * SIZE(BO)
  796. FMUL f0, f16, f0
  797. FMUL f1, f16, f1
  798. FNMSUB f4, f17, f0, f4
  799. FNMSUB f5, f17, f1, f5
  800. FNMSUB f8, f18, f0, f8
  801. FNMSUB f9, f18, f1, f9
  802. FNMSUB f12, f19, f0, f12
  803. FNMSUB f13, f19, f1, f13
  804. LFD f16, 5 * SIZE(BO)
  805. LFD f17, 6 * SIZE(BO)
  806. LFD f18, 7 * SIZE(BO)
  807. LFD f19, 10 * SIZE(BO)
  808. LFD f20, 11 * SIZE(BO)
  809. LFD f21, 15 * SIZE(BO)
  810. FMUL f4, f16, f4
  811. FMUL f5, f16, f5
  812. FNMSUB f8, f17, f4, f8
  813. FNMSUB f9, f17, f5, f9
  814. FNMSUB f12, f18, f4, f12
  815. FNMSUB f13, f18, f5, f13
  816. FMUL f8, f19, f8
  817. FMUL f9, f19, f9
  818. FNMSUB f12, f20, f8, f12
  819. FNMSUB f13, f20, f9, f13
  820. FMUL f12, f21, f12
  821. FMUL f13, f21, f13
  822. #endif
  823. #ifdef RT
  824. LFD f16, 15 * SIZE(BO)
  825. LFD f17, 14 * SIZE(BO)
  826. LFD f18, 13 * SIZE(BO)
  827. LFD f19, 12 * SIZE(BO)
  828. FMUL f12, f16, f12
  829. FMUL f13, f16, f13
  830. FNMSUB f8, f17, f12, f8
  831. FNMSUB f9, f17, f13, f9
  832. FNMSUB f4, f18, f12, f4
  833. FNMSUB f5, f18, f13, f5
  834. FNMSUB f0, f19, f12, f0
  835. FNMSUB f1, f19, f13, f1
  836. LFD f16, 10 * SIZE(BO)
  837. LFD f17, 9 * SIZE(BO)
  838. LFD f18, 8 * SIZE(BO)
  839. LFD f19, 5 * SIZE(BO)
  840. LFD f20, 4 * SIZE(BO)
  841. LFD f21, 0 * SIZE(BO)
  842. FMUL f8, f16, f8
  843. FMUL f9, f16, f9
  844. FNMSUB f4, f17, f8, f4
  845. FNMSUB f5, f17, f9, f5
  846. FNMSUB f0, f18, f8, f0
  847. FNMSUB f1, f18, f9, f1
  848. FMUL f4, f19, f4
  849. FMUL f5, f19, f5
  850. FNMSUB f0, f20, f4, f0
  851. FNMSUB f1, f20, f5, f1
  852. FMUL f0, f21, f0
  853. FMUL f1, f21, f1
  854. #endif
  855. #ifdef LN
  856. subi CO1, CO1, 2 * SIZE
  857. subi CO2, CO2, 2 * SIZE
  858. subi CO3, CO3, 2 * SIZE
  859. subi CO4, CO4, 2 * SIZE
  860. #endif
  861. #if defined(LN) || defined(LT)
  862. STFD f0, 0 * SIZE(BO)
  863. STFD f4, 1 * SIZE(BO)
  864. STFD f8, 2 * SIZE(BO)
  865. STFD f12, 3 * SIZE(BO)
  866. STFD f1, 4 * SIZE(BO)
  867. STFD f5, 5 * SIZE(BO)
  868. STFD f9, 6 * SIZE(BO)
  869. STFD f13, 7 * SIZE(BO)
  870. #else
  871. STFD f0, 0 * SIZE(AO)
  872. STFD f1, 1 * SIZE(AO)
  873. STFD f4, 2 * SIZE(AO)
  874. STFD f5, 3 * SIZE(AO)
  875. STFD f8, 4 * SIZE(AO)
  876. STFD f9, 5 * SIZE(AO)
  877. STFD f12, 6 * SIZE(AO)
  878. STFD f13, 7 * SIZE(AO)
  879. #endif
  880. STFD f0, 0 * SIZE(CO1)
  881. STFD f1, 1 * SIZE(CO1)
  882. STFD f4, 0 * SIZE(CO2)
  883. STFD f5, 1 * SIZE(CO2)
  884. STFD f8, 0 * SIZE(CO3)
  885. STFD f9, 1 * SIZE(CO3)
  886. STFD f12, 0 * SIZE(CO4)
  887. STFD f13, 1 * SIZE(CO4)
  888. lfs f0, FZERO
  889. fmr f1, f0
  890. fmr f2, f0
  891. fmr f3, f0
  892. fmr f4, f0
  893. fmr f5, f0
  894. fmr f6, f0
  895. fmr f7, f0
  896. fmr f8, f0
  897. fmr f9, f0
  898. fmr f10, f0
  899. fmr f11, f0
  900. fmr f12, f0
  901. fmr f13, f0
  902. fmr f14, f0
  903. fmr f15, f0
  904. #ifndef LN
  905. addi CO1, CO1, 2 * SIZE
  906. addi CO2, CO2, 2 * SIZE
  907. addi CO3, CO3, 2 * SIZE
  908. addi CO4, CO4, 2 * SIZE
  909. #endif
  910. #ifdef RT
  911. slwi r0, K, 1 + BASE_SHIFT
  912. add AORIG, AORIG, r0
  913. #endif
  914. #if defined(LT) || defined(RN)
  915. sub TEMP, K, KK
  916. slwi r0, TEMP, 1 + BASE_SHIFT
  917. slwi TEMP, TEMP, 2 + BASE_SHIFT
  918. add AO, AO, r0
  919. add BO, BO, TEMP
  920. #endif
  921. #ifdef LN
  922. subi KK, KK, 2
  923. #endif
  924. #ifdef LT
  925. addi KK, KK, 2
  926. #endif
  927. .align 4
  928. LL(09):
  929. srawi. I, M, 2
  930. ble LL(39)
  931. .align 4
  932. LL(11):
  933. #if defined(LT) || defined(RN)
  934. LFD f16, 0 * SIZE(AO)
  935. LFD f17, 1 * SIZE(AO)
  936. LFD f18, 2 * SIZE(AO)
  937. LFD f19, 3 * SIZE(AO)
  938. LFD f20, 0 * SIZE(B)
  939. LFD f21, 1 * SIZE(B)
  940. LFD f22, 2 * SIZE(B)
  941. LFD f23, 3 * SIZE(B)
  942. dcbt CO1, PREC
  943. dcbt CO2, PREC
  944. dcbt CO3, PREC
  945. dcbt CO4, PREC
  946. srawi. r0, KK, 2
  947. mtspr CTR, r0
  948. mr BO, B
  949. #else
  950. #ifdef LN
  951. slwi r0, K, 2 + BASE_SHIFT
  952. sub AORIG, AORIG, r0
  953. #endif
  954. slwi TEMP, KK, 2 + BASE_SHIFT
  955. add AO, AORIG, TEMP
  956. add BO, B, TEMP
  957. sub TEMP, K, KK
  958. LFD f16, 0 * SIZE(AO)
  959. LFD f17, 1 * SIZE(AO)
  960. LFD f18, 2 * SIZE(AO)
  961. LFD f19, 3 * SIZE(AO)
  962. LFD f20, 0 * SIZE(BO)
  963. LFD f21, 1 * SIZE(BO)
  964. LFD f22, 2 * SIZE(BO)
  965. LFD f23, 3 * SIZE(BO)
  966. LFD f24, 4 * SIZE(AO)
  967. LFD f25, 5 * SIZE(AO)
  968. LFD f26, 6 * SIZE(AO)
  969. LFD f28, 4 * SIZE(BO)
  970. LFD f29, 5 * SIZE(BO)
  971. LFD f30, 6 * SIZE(BO)
  972. dcbtst CO1, PREC
  973. dcbtst CO2, PREC
  974. dcbtst CO3, PREC
  975. dcbtst CO4, PREC
  976. srawi. r0, TEMP, 2
  977. mtspr CTR, r0
  978. #endif
  979. ble LL(15)
  980. .align 4
  981. #define NOP1 mr r18, r18
  982. #define NOP2 mr r19, r19
  983. LL(12):
  984. FMADD f0, f16, f20, f0
  985. dcbt AO, PREA
  986. FMADD f4, f16, f21, f4
  987. dcbt BO, PREB
  988. FMADD f8, f16, f22, f8
  989. LFD f31, 7 * SIZE(BO)
  990. FMADD f12, f16, f23, f12
  991. LFD f27, 7 * SIZE(AO)
  992. FMADD f1, f17, f20, f1
  993. LFD f16, 8 * SIZE(AO)
  994. FMADD f5, f17, f21, f5
  995. NOP2
  996. FMADD f9, f17, f22, f9
  997. NOP1
  998. FMADD f13, f17, f23, f13
  999. LFD f17, 9 * SIZE(AO)
  1000. FMADD f2, f18, f20, f2
  1001. NOP1
  1002. FMADD f6, f18, f21, f6
  1003. NOP2
  1004. FMADD f10, f18, f22, f10
  1005. NOP1
  1006. FMADD f14, f18, f23, f14
  1007. LFD f18, 10 * SIZE(AO)
  1008. FMADD f3, f19, f20, f3
  1009. LFD f20, 8 * SIZE(BO)
  1010. FMADD f7, f19, f21, f7
  1011. LFD f21, 9 * SIZE(BO)
  1012. FMADD f11, f19, f22, f11
  1013. LFD f22, 10 * SIZE(BO)
  1014. FMADD f15, f19, f23, f15
  1015. LFD f19, 11 * SIZE(AO)
  1016. FMADD f0, f24, f28, f0
  1017. LFD f23, 11 * SIZE(BO)
  1018. FMADD f4, f24, f29, f4
  1019. NOP2
  1020. FMADD f8, f24, f30, f8
  1021. NOP1
  1022. FMADD f12, f24, f31, f12
  1023. LFD f24, 12 * SIZE(AO)
  1024. FMADD f1, f25, f28, f1
  1025. NOP1
  1026. FMADD f5, f25, f29, f5
  1027. NOP2
  1028. FMADD f9, f25, f30, f9
  1029. NOP1
  1030. FMADD f13, f25, f31, f13
  1031. LFD f25, 13 * SIZE(AO)
  1032. FMADD f2, f26, f28, f2
  1033. NOP1
  1034. FMADD f6, f26, f29, f6
  1035. NOP2
  1036. FMADD f10, f26, f30, f10
  1037. NOP1
  1038. FMADD f14, f26, f31, f14
  1039. LFD f26, 14 * SIZE(AO)
  1040. FMADD f3, f27, f28, f3
  1041. LFD f28, 12 * SIZE(BO)
  1042. FMADD f7, f27, f29, f7
  1043. LFD f29, 13 * SIZE(BO)
  1044. FMADD f11, f27, f30, f11
  1045. LFD f30, 14 * SIZE(BO)
  1046. FMADD f15, f27, f31, f15
  1047. LFD f27, 15 * SIZE(AO)
  1048. FMADD f0, f16, f20, f0
  1049. LFD f31, 15 * SIZE(BO)
  1050. FMADD f4, f16, f21, f4
  1051. NOP2
  1052. FMADD f8, f16, f22, f8
  1053. NOP1
  1054. FMADD f12, f16, f23, f12
  1055. LFD f16, 16 * SIZE(AO)
  1056. FMADD f1, f17, f20, f1
  1057. NOP1
  1058. FMADD f5, f17, f21, f5
  1059. NOP2
  1060. FMADD f9, f17, f22, f9
  1061. NOP1
  1062. FMADD f13, f17, f23, f13
  1063. LFD f17, 17 * SIZE(AO)
  1064. FMADD f2, f18, f20, f2
  1065. NOP1
  1066. FMADD f6, f18, f21, f6
  1067. NOP2
  1068. FMADD f10, f18, f22, f10
  1069. NOP1
  1070. FMADD f14, f18, f23, f14
  1071. LFD f18, 18 * SIZE(AO)
  1072. FMADD f3, f19, f20, f3
  1073. LFD f20, 16 * SIZE(BO)
  1074. FMADD f7, f19, f21, f7
  1075. LFD f21, 17 * SIZE(BO)
  1076. FMADD f11, f19, f22, f11
  1077. LFD f22, 18 * SIZE(BO)
  1078. FMADD f15, f19, f23, f15
  1079. LFD f19, 19 * SIZE(AO)
  1080. FMADD f0, f24, f28, f0
  1081. LFD f23, 19 * SIZE(BO)
  1082. FMADD f4, f24, f29, f4
  1083. NOP2
  1084. FMADD f8, f24, f30, f8
  1085. NOP1
  1086. FMADD f12, f24, f31, f12
  1087. LFD f24, 20 * SIZE(AO)
  1088. FMADD f1, f25, f28, f1
  1089. NOP1
  1090. FMADD f5, f25, f29, f5
  1091. NOP2
  1092. FMADD f9, f25, f30, f9
  1093. NOP1
  1094. FMADD f13, f25, f31, f13
  1095. LFD f25, 21 * SIZE(AO)
  1096. FMADD f2, f26, f28, f2
  1097. NOP1
  1098. FMADD f6, f26, f29, f6
  1099. NOP2
  1100. FMADD f10, f26, f30, f10
  1101. NOP1
  1102. FMADD f14, f26, f31, f14
  1103. LFD f26, 22 * SIZE(AO)
  1104. FMADD f3, f27, f28, f3
  1105. LFD f28, 20 * SIZE(BO)
  1106. FMADD f7, f27, f29, f7
  1107. LFD f29, 21 * SIZE(BO)
  1108. FMADD f11, f27, f30, f11
  1109. LFD f30, 22 * SIZE(BO)
  1110. FMADD f15, f27, f31, f15
  1111. addi AO, AO, 16 * SIZE
  1112. addi BO, BO, 16 * SIZE
  1113. bdnz LL(12)
  1114. .align 4
  1115. LL(15):
  1116. #if defined(LT) || defined(RN)
  1117. andi. r0, KK, 3
  1118. #else
  1119. andi. r0, TEMP, 3
  1120. #endif
  1121. mtspr CTR, r0
  1122. ble+ LL(18)
  1123. .align 4
  1124. LL(16):
  1125. FMADD f0, f16, f20, f0
  1126. FMADD f5, f17, f21, f5
  1127. FMADD f10, f18, f22, f10
  1128. FMADD f15, f19, f23, f15
  1129. FMADD f1, f17, f20, f1
  1130. FMADD f2, f18, f20, f2
  1131. FMADD f3, f19, f20, f3
  1132. FMADD f4, f16, f21, f4
  1133. FMADD f6, f18, f21, f6
  1134. FMADD f7, f19, f21, f7
  1135. FMADD f8, f16, f22, f8
  1136. FMADD f9, f17, f22, f9
  1137. FMADD f11, f19, f22, f11
  1138. FMADD f12, f16, f23, f12
  1139. FMADD f13, f17, f23, f13
  1140. FMADD f14, f18, f23, f14
  1141. LFD f16, 4 * SIZE(AO)
  1142. LFD f17, 5 * SIZE(AO)
  1143. LFD f18, 6 * SIZE(AO)
  1144. LFD f19, 7 * SIZE(AO)
  1145. LFD f20, 4 * SIZE(BO)
  1146. LFD f21, 5 * SIZE(BO)
  1147. LFD f22, 6 * SIZE(BO)
  1148. LFD f23, 7 * SIZE(BO)
  1149. addi BO, BO, 4 * SIZE
  1150. addi AO, AO, 4 * SIZE
  1151. bdnz LL(16)
  1152. .align 4
  1153. LL(18):
  1154. #if defined(LN) || defined(RT)
  1155. subi r0, KK, 4
  1156. slwi r0, r0, 2 + BASE_SHIFT
  1157. add AO, AORIG, r0
  1158. add BO, B, r0
  1159. #endif
  1160. #if defined(LN) || defined(LT)
  1161. LFD f16, 0 * SIZE(BO)
  1162. LFD f17, 1 * SIZE(BO)
  1163. LFD f18, 2 * SIZE(BO)
  1164. LFD f19, 3 * SIZE(BO)
  1165. LFD f20, 4 * SIZE(BO)
  1166. LFD f21, 5 * SIZE(BO)
  1167. LFD f22, 6 * SIZE(BO)
  1168. LFD f23, 7 * SIZE(BO)
  1169. LFD f24, 8 * SIZE(BO)
  1170. LFD f25, 9 * SIZE(BO)
  1171. LFD f26, 10 * SIZE(BO)
  1172. LFD f27, 11 * SIZE(BO)
  1173. LFD f28, 12 * SIZE(BO)
  1174. LFD f29, 13 * SIZE(BO)
  1175. LFD f30, 14 * SIZE(BO)
  1176. LFD f31, 15 * SIZE(BO)
  1177. FSUB f0, f16, f0
  1178. FSUB f4, f17, f4
  1179. FSUB f8, f18, f8
  1180. FSUB f12, f19, f12
  1181. FSUB f1, f20, f1
  1182. FSUB f5, f21, f5
  1183. FSUB f9, f22, f9
  1184. FSUB f13, f23, f13
  1185. FSUB f2, f24, f2
  1186. FSUB f6, f25, f6
  1187. FSUB f10, f26, f10
  1188. FSUB f14, f27, f14
  1189. FSUB f3, f28, f3
  1190. FSUB f7, f29, f7
  1191. FSUB f11, f30, f11
  1192. FSUB f15, f31, f15
  1193. #else
  1194. LFD f16, 0 * SIZE(AO)
  1195. LFD f17, 1 * SIZE(AO)
  1196. LFD f18, 2 * SIZE(AO)
  1197. LFD f19, 3 * SIZE(AO)
  1198. LFD f20, 4 * SIZE(AO)
  1199. LFD f21, 5 * SIZE(AO)
  1200. LFD f22, 6 * SIZE(AO)
  1201. LFD f23, 7 * SIZE(AO)
  1202. LFD f24, 8 * SIZE(AO)
  1203. LFD f25, 9 * SIZE(AO)
  1204. LFD f26, 10 * SIZE(AO)
  1205. LFD f27, 11 * SIZE(AO)
  1206. LFD f28, 12 * SIZE(AO)
  1207. LFD f29, 13 * SIZE(AO)
  1208. LFD f30, 14 * SIZE(AO)
  1209. LFD f31, 15 * SIZE(AO)
  1210. FSUB f0, f16, f0
  1211. FSUB f1, f17, f1
  1212. FSUB f2, f18, f2
  1213. FSUB f3, f19, f3
  1214. FSUB f4, f20, f4
  1215. FSUB f5, f21, f5
  1216. FSUB f6, f22, f6
  1217. FSUB f7, f23, f7
  1218. FSUB f8, f24, f8
  1219. FSUB f9, f25, f9
  1220. FSUB f10, f26, f10
  1221. FSUB f11, f27, f11
  1222. FSUB f12, f28, f12
  1223. FSUB f13, f29, f13
  1224. FSUB f14, f30, f14
  1225. FSUB f15, f31, f15
  1226. #endif
  1227. #ifdef LN
  1228. LFD f16, 15 * SIZE(AO)
  1229. LFD f17, 14 * SIZE(AO)
  1230. LFD f18, 13 * SIZE(AO)
  1231. LFD f19, 12 * SIZE(AO)
  1232. FMUL f3, f16, f3
  1233. FMUL f7, f16, f7
  1234. FMUL f11, f16, f11
  1235. FMUL f15, f16, f15
  1236. FNMSUB f2, f17, f3, f2
  1237. FNMSUB f6, f17, f7, f6
  1238. FNMSUB f10, f17, f11, f10
  1239. FNMSUB f14, f17, f15, f14
  1240. FNMSUB f1, f18, f3, f1
  1241. FNMSUB f5, f18, f7, f5
  1242. FNMSUB f9, f18, f11, f9
  1243. FNMSUB f13, f18, f15, f13
  1244. FNMSUB f0, f19, f3, f0
  1245. FNMSUB f4, f19, f7, f4
  1246. FNMSUB f8, f19, f11, f8
  1247. FNMSUB f12, f19, f15, f12
  1248. LFD f16, 10 * SIZE(AO)
  1249. LFD f17, 9 * SIZE(AO)
  1250. LFD f18, 8 * SIZE(AO)
  1251. LFD f19, 5 * SIZE(AO)
  1252. FMUL f2, f16, f2
  1253. FMUL f6, f16, f6
  1254. FMUL f10, f16, f10
  1255. FMUL f14, f16, f14
  1256. LFD f20, 4 * SIZE(AO)
  1257. LFD f21, 0 * SIZE(AO)
  1258. FNMSUB f1, f17, f2, f1
  1259. FNMSUB f5, f17, f6, f5
  1260. FNMSUB f9, f17, f10, f9
  1261. FNMSUB f13, f17, f14, f13
  1262. FNMSUB f0, f18, f2, f0
  1263. FNMSUB f4, f18, f6, f4
  1264. FNMSUB f8, f18, f10, f8
  1265. FNMSUB f12, f18, f14, f12
  1266. FMUL f1, f19, f1
  1267. FMUL f5, f19, f5
  1268. FMUL f9, f19, f9
  1269. FMUL f13, f19, f13
  1270. FNMSUB f0, f20, f1, f0
  1271. FNMSUB f4, f20, f5, f4
  1272. FNMSUB f8, f20, f9, f8
  1273. FNMSUB f12, f20, f13, f12
  1274. FMUL f0, f21, f0
  1275. FMUL f4, f21, f4
  1276. FMUL f8, f21, f8
  1277. FMUL f12, f21, f12
  1278. #endif
  1279. #ifdef LT
  1280. LFD f16, 0 * SIZE(AO)
  1281. LFD f17, 1 * SIZE(AO)
  1282. LFD f18, 2 * SIZE(AO)
  1283. LFD f19, 3 * SIZE(AO)
  1284. FMUL f0, f16, f0
  1285. FMUL f4, f16, f4
  1286. FMUL f8, f16, f8
  1287. FMUL f12, f16, f12
  1288. FNMSUB f1, f17, f0, f1
  1289. FNMSUB f5, f17, f4, f5
  1290. FNMSUB f9, f17, f8, f9
  1291. FNMSUB f13, f17, f12, f13
  1292. FNMSUB f2, f18, f0, f2
  1293. FNMSUB f6, f18, f4, f6
  1294. FNMSUB f10, f18, f8, f10
  1295. FNMSUB f14, f18, f12, f14
  1296. FNMSUB f3, f19, f0, f3
  1297. FNMSUB f7, f19, f4, f7
  1298. FNMSUB f11, f19, f8, f11
  1299. FNMSUB f15, f19, f12, f15
  1300. LFD f16, 5 * SIZE(AO)
  1301. LFD f17, 6 * SIZE(AO)
  1302. LFD f18, 7 * SIZE(AO)
  1303. LFD f19, 10 * SIZE(AO)
  1304. FMUL f1, f16, f1
  1305. FMUL f5, f16, f5
  1306. FMUL f9, f16, f9
  1307. FMUL f13, f16, f13
  1308. LFD f20, 11 * SIZE(AO)
  1309. LFD f21, 15 * SIZE(AO)
  1310. FNMSUB f2, f17, f1, f2
  1311. FNMSUB f6, f17, f5, f6
  1312. FNMSUB f10, f17, f9, f10
  1313. FNMSUB f14, f17, f13, f14
  1314. FNMSUB f3, f18, f1, f3
  1315. FNMSUB f7, f18, f5, f7
  1316. FNMSUB f11, f18, f9, f11
  1317. FNMSUB f15, f18, f13, f15
  1318. FMUL f2, f19, f2
  1319. FMUL f6, f19, f6
  1320. FMUL f10, f19, f10
  1321. FMUL f14, f19, f14
  1322. FNMSUB f3, f20, f2, f3
  1323. FNMSUB f7, f20, f6, f7
  1324. FNMSUB f11, f20, f10, f11
  1325. FNMSUB f15, f20, f14, f15
  1326. FMUL f3, f21, f3
  1327. FMUL f7, f21, f7
  1328. FMUL f11, f21, f11
  1329. FMUL f15, f21, f15
  1330. #endif
  1331. #ifdef RN
  1332. LFD f16, 0 * SIZE(BO)
  1333. LFD f17, 1 * SIZE(BO)
  1334. LFD f18, 2 * SIZE(BO)
  1335. LFD f19, 3 * SIZE(BO)
  1336. FMUL f0, f16, f0
  1337. FMUL f1, f16, f1
  1338. FMUL f2, f16, f2
  1339. FMUL f3, f16, f3
  1340. FNMSUB f4, f17, f0, f4
  1341. FNMSUB f5, f17, f1, f5
  1342. FNMSUB f6, f17, f2, f6
  1343. FNMSUB f7, f17, f3, f7
  1344. FNMSUB f8, f18, f0, f8
  1345. FNMSUB f9, f18, f1, f9
  1346. FNMSUB f10, f18, f2, f10
  1347. FNMSUB f11, f18, f3, f11
  1348. FNMSUB f12, f19, f0, f12
  1349. FNMSUB f13, f19, f1, f13
  1350. FNMSUB f14, f19, f2, f14
  1351. FNMSUB f15, f19, f3, f15
  1352. LFD f16, 5 * SIZE(BO)
  1353. LFD f17, 6 * SIZE(BO)
  1354. LFD f18, 7 * SIZE(BO)
  1355. LFD f19, 10 * SIZE(BO)
  1356. FMUL f4, f16, f4
  1357. FMUL f5, f16, f5
  1358. FMUL f6, f16, f6
  1359. FMUL f7, f16, f7
  1360. LFD f20, 11 * SIZE(BO)
  1361. LFD f21, 15 * SIZE(BO)
  1362. FNMSUB f8, f17, f4, f8
  1363. FNMSUB f9, f17, f5, f9
  1364. FNMSUB f10, f17, f6, f10
  1365. FNMSUB f11, f17, f7, f11
  1366. FNMSUB f12, f18, f4, f12
  1367. FNMSUB f13, f18, f5, f13
  1368. FNMSUB f14, f18, f6, f14
  1369. FNMSUB f15, f18, f7, f15
  1370. FMUL f8, f19, f8
  1371. FMUL f9, f19, f9
  1372. FMUL f10, f19, f10
  1373. FMUL f11, f19, f11
  1374. FNMSUB f12, f20, f8, f12
  1375. FNMSUB f13, f20, f9, f13
  1376. FNMSUB f14, f20, f10, f14
  1377. FNMSUB f15, f20, f11, f15
  1378. FMUL f12, f21, f12
  1379. FMUL f13, f21, f13
  1380. FMUL f14, f21, f14
  1381. FMUL f15, f21, f15
  1382. #endif
  1383. #ifdef RT
  1384. LFD f16, 15 * SIZE(BO)
  1385. LFD f17, 14 * SIZE(BO)
  1386. LFD f18, 13 * SIZE(BO)
  1387. LFD f19, 12 * SIZE(BO)
  1388. FMUL f12, f16, f12
  1389. FMUL f13, f16, f13
  1390. FMUL f14, f16, f14
  1391. FMUL f15, f16, f15
  1392. FNMSUB f8, f17, f12, f8
  1393. FNMSUB f9, f17, f13, f9
  1394. FNMSUB f10, f17, f14, f10
  1395. FNMSUB f11, f17, f15, f11
  1396. FNMSUB f4, f18, f12, f4
  1397. FNMSUB f5, f18, f13, f5
  1398. FNMSUB f6, f18, f14, f6
  1399. FNMSUB f7, f18, f15, f7
  1400. FNMSUB f0, f19, f12, f0
  1401. FNMSUB f1, f19, f13, f1
  1402. FNMSUB f2, f19, f14, f2
  1403. FNMSUB f3, f19, f15, f3
  1404. LFD f16, 10 * SIZE(BO)
  1405. LFD f17, 9 * SIZE(BO)
  1406. LFD f18, 8 * SIZE(BO)
  1407. LFD f19, 5 * SIZE(BO)
  1408. FMUL f8, f16, f8
  1409. FMUL f9, f16, f9
  1410. FMUL f10, f16, f10
  1411. FMUL f11, f16, f11
  1412. LFD f20, 4 * SIZE(BO)
  1413. LFD f21, 0 * SIZE(BO)
  1414. FNMSUB f4, f17, f8, f4
  1415. FNMSUB f5, f17, f9, f5
  1416. FNMSUB f6, f17, f10, f6
  1417. FNMSUB f7, f17, f11, f7
  1418. FNMSUB f0, f18, f8, f0
  1419. FNMSUB f1, f18, f9, f1
  1420. FNMSUB f2, f18, f10, f2
  1421. FNMSUB f3, f18, f11, f3
  1422. FMUL f4, f19, f4
  1423. FMUL f5, f19, f5
  1424. FMUL f6, f19, f6
  1425. FMUL f7, f19, f7
  1426. FNMSUB f0, f20, f4, f0
  1427. FNMSUB f1, f20, f5, f1
  1428. FNMSUB f2, f20, f6, f2
  1429. FNMSUB f3, f20, f7, f3
  1430. FMUL f0, f21, f0
  1431. FMUL f1, f21, f1
  1432. FMUL f2, f21, f2
  1433. FMUL f3, f21, f3
  1434. #endif
  1435. #ifdef LN
  1436. subi CO1, CO1, 4 * SIZE
  1437. subi CO2, CO2, 4 * SIZE
  1438. subi CO3, CO3, 4 * SIZE
  1439. subi CO4, CO4, 4 * SIZE
  1440. #endif
  1441. #if defined(LN) || defined(LT)
  1442. STFD f0, 0 * SIZE(BO)
  1443. STFD f4, 1 * SIZE(BO)
  1444. STFD f8, 2 * SIZE(BO)
  1445. STFD f12, 3 * SIZE(BO)
  1446. STFD f1, 4 * SIZE(BO)
  1447. STFD f5, 5 * SIZE(BO)
  1448. STFD f9, 6 * SIZE(BO)
  1449. STFD f13, 7 * SIZE(BO)
  1450. STFD f2, 8 * SIZE(BO)
  1451. STFD f6, 9 * SIZE(BO)
  1452. STFD f10, 10 * SIZE(BO)
  1453. STFD f14, 11 * SIZE(BO)
  1454. STFD f3, 12 * SIZE(BO)
  1455. STFD f7, 13 * SIZE(BO)
  1456. STFD f11, 14 * SIZE(BO)
  1457. STFD f15, 15 * SIZE(BO)
  1458. #else
  1459. STFD f0, 0 * SIZE(AO)
  1460. STFD f1, 1 * SIZE(AO)
  1461. STFD f2, 2 * SIZE(AO)
  1462. STFD f3, 3 * SIZE(AO)
  1463. STFD f4, 4 * SIZE(AO)
  1464. STFD f5, 5 * SIZE(AO)
  1465. STFD f6, 6 * SIZE(AO)
  1466. STFD f7, 7 * SIZE(AO)
  1467. STFD f8, 8 * SIZE(AO)
  1468. STFD f9, 9 * SIZE(AO)
  1469. STFD f10, 10 * SIZE(AO)
  1470. STFD f11, 11 * SIZE(AO)
  1471. STFD f12, 12 * SIZE(AO)
  1472. STFD f13, 13 * SIZE(AO)
  1473. STFD f14, 14 * SIZE(AO)
  1474. STFD f15, 15 * SIZE(AO)
  1475. #endif
  1476. STFD f0, 0 * SIZE(CO1)
  1477. STFD f1, 1 * SIZE(CO1)
  1478. STFD f2, 2 * SIZE(CO1)
  1479. STFD f3, 3 * SIZE(CO1)
  1480. STFD f4, 0 * SIZE(CO2)
  1481. STFD f5, 1 * SIZE(CO2)
  1482. STFD f6, 2 * SIZE(CO2)
  1483. STFD f7, 3 * SIZE(CO2)
  1484. STFD f8, 0 * SIZE(CO3)
  1485. STFD f9, 1 * SIZE(CO3)
  1486. STFD f10, 2 * SIZE(CO3)
  1487. STFD f11, 3 * SIZE(CO3)
  1488. STFD f12, 0 * SIZE(CO4)
  1489. STFD f13, 1 * SIZE(CO4)
  1490. STFD f14, 2 * SIZE(CO4)
  1491. STFD f15, 3 * SIZE(CO4)
  1492. lfs f0, FZERO
  1493. fmr f1, f0
  1494. fmr f2, f0
  1495. fmr f3, f0
  1496. fmr f4, f0
  1497. fmr f5, f0
  1498. fmr f6, f0
  1499. fmr f7, f0
  1500. fmr f8, f0
  1501. fmr f9, f0
  1502. fmr f10, f0
  1503. fmr f11, f0
  1504. fmr f12, f0
  1505. fmr f13, f0
  1506. fmr f14, f0
  1507. fmr f15, f0
  1508. #ifndef LN
  1509. addi CO1, CO1, 4 * SIZE
  1510. addi CO2, CO2, 4 * SIZE
  1511. addi CO3, CO3, 4 * SIZE
  1512. addi CO4, CO4, 4 * SIZE
  1513. #endif
  1514. #ifdef RT
  1515. slwi r0, K, 2 + BASE_SHIFT
  1516. add AORIG, AORIG, r0
  1517. #endif
  1518. #if defined(LT) || defined(RN)
  1519. sub TEMP, K, KK
  1520. slwi TEMP, TEMP, 2 + BASE_SHIFT
  1521. add AO, AO, TEMP
  1522. add BO, BO, TEMP
  1523. #endif
  1524. #ifdef LT
  1525. addi KK, KK, 4
  1526. #endif
  1527. #ifdef LN
  1528. subi KK, KK, 4
  1529. #endif
  1530. addic. I, I, -1
  1531. bgt+ LL(11)
  1532. .align 4
  1533. LL(39):
  1534. #ifdef LN
  1535. slwi r0, K, 2 + BASE_SHIFT
  1536. add B, B, r0
  1537. #endif
  1538. #if defined(LT) || defined(RN)
  1539. mr B, BO
  1540. #endif
  1541. #ifdef RN
  1542. addi KK, KK, 4
  1543. #endif
  1544. #ifdef RT
  1545. subi KK, KK, 4
  1546. #endif
  1547. addic. J, J, -1
  1548. lfs f0, FZERO
  1549. bgt LL(10)
  1550. .align 4
  1551. LL(40):
  1552. andi. J, N, 2
  1553. ble LL(70)
  1554. #ifdef RT
  1555. slwi r0, K, 1 + BASE_SHIFT
  1556. sub B, B, r0
  1557. slwi r0, LDC, 1
  1558. sub C, C, r0
  1559. #endif
  1560. mr CO1, C
  1561. add CO2, C, LDC
  1562. #ifdef LN
  1563. add KK, M, OFFSET
  1564. #endif
  1565. #ifdef LT
  1566. mr KK, OFFSET
  1567. #endif
  1568. fmr f1, f0
  1569. fmr f2, f0
  1570. fmr f3, f0
  1571. fmr f4, f0
  1572. fmr f5, f0
  1573. fmr f6, f0
  1574. fmr f7, f0
  1575. #if defined(LN) || defined(RT)
  1576. mr AORIG, A
  1577. #else
  1578. mr AO, A
  1579. #endif
  1580. #ifndef RT
  1581. add C, CO2, LDC
  1582. #endif
  1583. LL(60):
  1584. andi. I, M, 1
  1585. ble LL(50)
  1586. #if defined(LT) || defined(RN)
  1587. LFD f16, 0 * SIZE(AO)
  1588. LFD f17, 1 * SIZE(AO)
  1589. LFD f18, 2 * SIZE(AO)
  1590. LFD f19, 3 * SIZE(AO)
  1591. LFD f20, 0 * SIZE(B)
  1592. LFD f21, 1 * SIZE(B)
  1593. LFD f22, 2 * SIZE(B)
  1594. LFD f23, 3 * SIZE(B)
  1595. LFD f24, 4 * SIZE(B)
  1596. LFD f25, 5 * SIZE(B)
  1597. LFD f26, 6 * SIZE(B)
  1598. LFD f27, 7 * SIZE(B)
  1599. srawi. r0, KK, 2
  1600. mtspr CTR, r0
  1601. mr BO, B
  1602. #else
  1603. #ifdef LN
  1604. slwi r0, K, BASE_SHIFT
  1605. sub AORIG, AORIG, r0
  1606. #endif
  1607. slwi r0, KK, 0 + BASE_SHIFT
  1608. slwi TEMP, KK, 1 + BASE_SHIFT
  1609. add AO, AORIG, r0
  1610. add BO, B, TEMP
  1611. sub TEMP, K, KK
  1612. LFD f16, 0 * SIZE(AO)
  1613. LFD f17, 1 * SIZE(AO)
  1614. LFD f18, 2 * SIZE(AO)
  1615. LFD f19, 3 * SIZE(AO)
  1616. LFD f20, 0 * SIZE(BO)
  1617. LFD f21, 1 * SIZE(BO)
  1618. LFD f22, 2 * SIZE(BO)
  1619. LFD f23, 3 * SIZE(BO)
  1620. LFD f24, 4 * SIZE(BO)
  1621. LFD f25, 5 * SIZE(BO)
  1622. LFD f26, 6 * SIZE(BO)
  1623. LFD f27, 7 * SIZE(BO)
  1624. srawi. r0, TEMP, 2
  1625. mtspr CTR, r0
  1626. #endif
  1627. ble LL(65)
  1628. .align 5
  1629. LL(62):
  1630. FMADD f0, f16, f20, f0
  1631. FMADD f1, f16, f21, f1
  1632. FMADD f2, f17, f22, f2
  1633. FMADD f3, f17, f23, f3
  1634. LFD f20, 8 * SIZE(BO)
  1635. LFD f21, 9 * SIZE(BO)
  1636. LFD f22, 10 * SIZE(BO)
  1637. LFD f23, 11 * SIZE(BO)
  1638. FMADD f0, f18, f24, f0
  1639. FMADD f1, f18, f25, f1
  1640. FMADD f2, f19, f26, f2
  1641. FMADD f3, f19, f27, f3
  1642. LFD f16, 4 * SIZE(AO)
  1643. LFD f17, 5 * SIZE(AO)
  1644. LFD f18, 6 * SIZE(AO)
  1645. LFD f19, 7 * SIZE(AO)
  1646. LFD f24, 12 * SIZE(BO)
  1647. LFD f25, 13 * SIZE(BO)
  1648. LFD f26, 14 * SIZE(BO)
  1649. LFD f27, 15 * SIZE(BO)
  1650. addi AO, AO, 4 * SIZE
  1651. addi BO, BO, 8 * SIZE
  1652. bdnz LL(62)
  1653. .align 4
  1654. LL(65):
  1655. #if defined(LT) || defined(RN)
  1656. andi. r0, KK, 3
  1657. #else
  1658. andi. r0, TEMP, 3
  1659. #endif
  1660. mtspr CTR, r0
  1661. ble+ LL(68)
  1662. .align 4
  1663. LL(66):
  1664. FMADD f0, f16, f20, f0
  1665. FMADD f1, f16, f21, f1
  1666. LFD f16, 1 * SIZE(AO)
  1667. LFD f20, 2 * SIZE(BO)
  1668. LFD f21, 3 * SIZE(BO)
  1669. addi BO, BO, 2 * SIZE
  1670. addi AO, AO, 1 * SIZE
  1671. bdnz LL(66)
  1672. .align 4
  1673. LL(68):
  1674. FADD f0, f2, f0
  1675. FADD f1, f3, f1
  1676. #if defined(LN) || defined(RT)
  1677. #ifdef LN
  1678. subi r0, KK, 1
  1679. #else
  1680. subi r0, KK, 2
  1681. #endif
  1682. slwi TEMP, r0, 0 + BASE_SHIFT
  1683. slwi r0, r0, 1 + BASE_SHIFT
  1684. add AO, AORIG, TEMP
  1685. add BO, B, r0
  1686. #endif
  1687. #if defined(LN) || defined(LT)
  1688. LFD f16, 0 * SIZE(BO)
  1689. LFD f17, 1 * SIZE(BO)
  1690. FSUB f0, f16, f0
  1691. FSUB f1, f17, f1
  1692. #else
  1693. LFD f16, 0 * SIZE(AO)
  1694. LFD f20, 1 * SIZE(AO)
  1695. FSUB f0, f16, f0
  1696. FSUB f1, f20, f1
  1697. #endif
  1698. #ifdef LN
  1699. LFD f21, 0 * SIZE(AO)
  1700. FMUL f0, f21, f0
  1701. FMUL f1, f21, f1
  1702. #endif
  1703. #ifdef LT
  1704. LFD f16, 0 * SIZE(AO)
  1705. FMUL f0, f16, f0
  1706. FMUL f1, f16, f1
  1707. #endif
  1708. #ifdef RN
  1709. LFD f16, 0 * SIZE(BO)
  1710. LFD f17, 1 * SIZE(BO)
  1711. LFD f18, 3 * SIZE(BO)
  1712. FMUL f0, f16, f0
  1713. FNMSUB f1, f17, f0, f1
  1714. FMUL f1, f18, f1
  1715. #endif
  1716. #ifdef RT
  1717. LFD f19, 3 * SIZE(BO)
  1718. LFD f20, 2 * SIZE(BO)
  1719. LFD f21, 0 * SIZE(BO)
  1720. FMUL f1, f19, f1
  1721. FNMSUB f0, f20, f1, f0
  1722. FMUL f0, f21, f0
  1723. #endif
  1724. #ifdef LN
  1725. subi CO1, CO1, 1 * SIZE
  1726. subi CO2, CO2, 1 * SIZE
  1727. #endif
  1728. #if defined(LN) || defined(LT)
  1729. STFD f0, 0 * SIZE(BO)
  1730. STFD f1, 1 * SIZE(BO)
  1731. #else
  1732. STFD f0, 0 * SIZE(AO)
  1733. STFD f1, 1 * SIZE(AO)
  1734. #endif
  1735. STFD f0, 0 * SIZE(CO1)
  1736. STFD f1, 0 * SIZE(CO2)
  1737. lfs f0, FZERO
  1738. fmr f1, f0
  1739. fmr f4, f0
  1740. fmr f5, f0
  1741. #ifndef LN
  1742. addi CO1, CO1, 1 * SIZE
  1743. addi CO2, CO2, 1 * SIZE
  1744. #endif
  1745. #ifdef RT
  1746. slwi r0, K, 0 + BASE_SHIFT
  1747. add AORIG, AORIG, r0
  1748. #endif
  1749. #if defined(LT) || defined(RN)
  1750. sub TEMP, K, KK
  1751. slwi r0, TEMP, 0 + BASE_SHIFT
  1752. slwi TEMP, TEMP, 1 + BASE_SHIFT
  1753. add AO, AO, r0
  1754. add BO, BO, TEMP
  1755. #endif
  1756. #ifdef LN
  1757. subi KK, KK, 1
  1758. #endif
  1759. #ifdef LT
  1760. addi KK, KK, 1
  1761. #endif
  1762. .align 4
  1763. LL(50):
  1764. andi. I, M, 2
  1765. ble LL(41)
  1766. #if defined(LT) || defined(RN)
  1767. LFD f16, 0 * SIZE(AO)
  1768. LFD f17, 1 * SIZE(AO)
  1769. LFD f18, 2 * SIZE(AO)
  1770. LFD f19, 3 * SIZE(AO)
  1771. LFD f20, 0 * SIZE(B)
  1772. LFD f21, 1 * SIZE(B)
  1773. LFD f22, 2 * SIZE(B)
  1774. LFD f23, 3 * SIZE(B)
  1775. LFD f24, 4 * SIZE(B)
  1776. LFD f25, 5 * SIZE(B)
  1777. LFD f26, 6 * SIZE(B)
  1778. LFD f27, 7 * SIZE(B)
  1779. srawi. r0, KK, 2
  1780. mtspr CTR, r0
  1781. mr BO, B
  1782. #else
  1783. #ifdef LN
  1784. slwi r0, K, 1 + BASE_SHIFT
  1785. sub AORIG, AORIG, r0
  1786. #endif
  1787. slwi r0, KK, 1 + BASE_SHIFT
  1788. slwi TEMP, KK, 1 + BASE_SHIFT
  1789. add AO, AORIG, r0
  1790. add BO, B, TEMP
  1791. sub TEMP, K, KK
  1792. LFD f16, 0 * SIZE(AO)
  1793. LFD f17, 1 * SIZE(AO)
  1794. LFD f18, 2 * SIZE(AO)
  1795. LFD f19, 3 * SIZE(AO)
  1796. LFD f20, 0 * SIZE(BO)
  1797. LFD f21, 1 * SIZE(BO)
  1798. LFD f22, 2 * SIZE(BO)
  1799. LFD f23, 3 * SIZE(BO)
  1800. LFD f24, 4 * SIZE(BO)
  1801. LFD f25, 5 * SIZE(BO)
  1802. LFD f26, 6 * SIZE(BO)
  1803. LFD f27, 7 * SIZE(BO)
  1804. srawi. r0, TEMP, 2
  1805. mtspr CTR, r0
  1806. #endif
  1807. ble LL(55)
  1808. .align 5
  1809. LL(52):
  1810. FMADD f0, f16, f20, f0
  1811. FMADD f1, f17, f20, f1
  1812. FMADD f2, f16, f21, f2
  1813. FMADD f3, f17, f21, f3
  1814. FMADD f4, f18, f22, f4
  1815. FMADD f5, f19, f22, f5
  1816. FMADD f6, f18, f23, f6
  1817. FMADD f7, f19, f23, f7
  1818. LFD f16, 4 * SIZE(AO)
  1819. LFD f17, 5 * SIZE(AO)
  1820. LFD f18, 6 * SIZE(AO)
  1821. LFD f19, 7 * SIZE(AO)
  1822. LFD f20, 8 * SIZE(BO)
  1823. LFD f21, 9 * SIZE(BO)
  1824. LFD f22, 10 * SIZE(BO)
  1825. LFD f23, 11 * SIZE(BO)
  1826. FMADD f0, f16, f24, f0
  1827. FMADD f1, f17, f24, f1
  1828. FMADD f2, f16, f25, f2
  1829. FMADD f3, f17, f25, f3
  1830. FMADD f4, f18, f26, f4
  1831. FMADD f5, f19, f26, f5
  1832. FMADD f6, f18, f27, f6
  1833. FMADD f7, f19, f27, f7
  1834. LFD f16, 8 * SIZE(AO)
  1835. LFD f17, 9 * SIZE(AO)
  1836. LFD f18, 10 * SIZE(AO)
  1837. LFD f19, 11 * SIZE(AO)
  1838. LFD f24, 12 * SIZE(BO)
  1839. LFD f25, 13 * SIZE(BO)
  1840. LFD f26, 14 * SIZE(BO)
  1841. LFD f27, 15 * SIZE(BO)
  1842. addi AO, AO, 8 * SIZE
  1843. addi BO, BO, 8 * SIZE
  1844. DCBT(BO, PREB)
  1845. bdnz LL(52)
  1846. .align 4
  1847. LL(55):
  1848. #if defined(LT) || defined(RN)
  1849. andi. r0, KK, 3
  1850. #else
  1851. andi. r0, TEMP, 3
  1852. #endif
  1853. mtspr CTR, r0
  1854. ble+ LL(58)
  1855. .align 4
  1856. LL(56):
  1857. FMADD f0, f16, f20, f0
  1858. FMADD f1, f17, f20, f1
  1859. FMADD f2, f16, f21, f2
  1860. FMADD f3, f17, f21, f3
  1861. LFD f16, 2 * SIZE(AO)
  1862. LFD f17, 3 * SIZE(AO)
  1863. LFD f20, 2 * SIZE(BO)
  1864. LFD f21, 3 * SIZE(BO)
  1865. addi BO, BO, 2 * SIZE
  1866. addi AO, AO, 2 * SIZE
  1867. bdnz LL(56)
  1868. .align 4
  1869. LL(58):
  1870. FADD f0, f4, f0
  1871. FADD f1, f5, f1
  1872. FADD f2, f6, f2
  1873. FADD f3, f7, f3
  1874. #if defined(LN) || defined(RT)
  1875. #ifdef LN
  1876. subi r0, KK, 2
  1877. #else
  1878. subi r0, KK, 2
  1879. #endif
  1880. slwi TEMP, r0, 1 + BASE_SHIFT
  1881. slwi r0, r0, 1 + BASE_SHIFT
  1882. add AO, AORIG, TEMP
  1883. add BO, B, r0
  1884. #endif
  1885. #if defined(LN) || defined(LT)
  1886. LFD f16, 0 * SIZE(BO)
  1887. LFD f17, 1 * SIZE(BO)
  1888. LFD f20, 2 * SIZE(BO)
  1889. LFD f21, 3 * SIZE(BO)
  1890. FSUB f0, f16, f0
  1891. FSUB f2, f17, f2
  1892. FSUB f1, f20, f1
  1893. FSUB f3, f21, f3
  1894. #else
  1895. LFD f16, 0 * SIZE(AO)
  1896. LFD f17, 1 * SIZE(AO)
  1897. LFD f20, 2 * SIZE(AO)
  1898. LFD f21, 3 * SIZE(AO)
  1899. FSUB f0, f16, f0
  1900. FSUB f1, f17, f1
  1901. FSUB f2, f20, f2
  1902. FSUB f3, f21, f3
  1903. #endif
  1904. #ifdef LN
  1905. LFD f19, 3 * SIZE(AO)
  1906. LFD f20, 2 * SIZE(AO)
  1907. LFD f21, 0 * SIZE(AO)
  1908. FMUL f1, f19, f1
  1909. FMUL f3, f19, f3
  1910. FNMSUB f0, f20, f1, f0
  1911. FNMSUB f2, f20, f3, f2
  1912. FMUL f0, f21, f0
  1913. FMUL f2, f21, f2
  1914. #endif
  1915. #ifdef LT
  1916. LFD f16, 0 * SIZE(AO)
  1917. LFD f17, 1 * SIZE(AO)
  1918. FMUL f0, f16, f0
  1919. FMUL f2, f16, f2
  1920. FNMSUB f1, f17, f0, f1
  1921. FNMSUB f3, f17, f2, f3
  1922. LFD f17, 3 * SIZE(AO)
  1923. FMUL f1, f17, f1
  1924. FMUL f3, f17, f3
  1925. #endif
  1926. #ifdef RN
  1927. LFD f16, 0 * SIZE(BO)
  1928. LFD f17, 1 * SIZE(BO)
  1929. LFD f18, 3 * SIZE(BO)
  1930. FMUL f0, f16, f0
  1931. FMUL f1, f16, f1
  1932. FNMSUB f2, f17, f0, f2
  1933. FNMSUB f3, f17, f1, f3
  1934. FMUL f2, f18, f2
  1935. FMUL f3, f18, f3
  1936. #endif
  1937. #ifdef RT
  1938. LFD f19, 3 * SIZE(BO)
  1939. LFD f20, 2 * SIZE(BO)
  1940. LFD f21, 0 * SIZE(BO)
  1941. FMUL f2, f19, f2
  1942. FMUL f3, f19, f3
  1943. FNMSUB f0, f20, f2, f0
  1944. FNMSUB f1, f20, f3, f1
  1945. FMUL f0, f21, f0
  1946. FMUL f1, f21, f1
  1947. #endif
  1948. #ifdef LN
  1949. subi CO1, CO1, 2 * SIZE
  1950. subi CO2, CO2, 2 * SIZE
  1951. #endif
  1952. #if defined(LN) || defined(LT)
  1953. STFD f0, 0 * SIZE(BO)
  1954. STFD f2, 1 * SIZE(BO)
  1955. STFD f1, 2 * SIZE(BO)
  1956. STFD f3, 3 * SIZE(BO)
  1957. #else
  1958. STFD f0, 0 * SIZE(AO)
  1959. STFD f1, 1 * SIZE(AO)
  1960. STFD f2, 2 * SIZE(AO)
  1961. STFD f3, 3 * SIZE(AO)
  1962. #endif
  1963. STFD f0, 0 * SIZE(CO1)
  1964. STFD f1, 1 * SIZE(CO1)
  1965. STFD f2, 0 * SIZE(CO2)
  1966. STFD f3, 1 * SIZE(CO2)
  1967. lfs f0, FZERO
  1968. fmr f1, f0
  1969. fmr f2, f0
  1970. fmr f3, f0
  1971. fmr f4, f0
  1972. fmr f5, f0
  1973. fmr f6, f0
  1974. fmr f7, f0
  1975. #ifndef LN
  1976. addi CO1, CO1, 2 * SIZE
  1977. addi CO2, CO2, 2 * SIZE
  1978. #endif
  1979. #ifdef RT
  1980. slwi r0, K, 1 + BASE_SHIFT
  1981. add AORIG, AORIG, r0
  1982. #endif
  1983. #if defined(LT) || defined(RN)
  1984. sub TEMP, K, KK
  1985. slwi r0, TEMP, 1 + BASE_SHIFT
  1986. slwi TEMP, TEMP, 1 + BASE_SHIFT
  1987. add AO, AO, r0
  1988. add BO, BO, TEMP
  1989. #endif
  1990. #ifdef LN
  1991. subi KK, KK, 2
  1992. #endif
  1993. #ifdef LT
  1994. addi KK, KK, 2
  1995. #endif
  1996. .align 4
  1997. LL(41):
  1998. srawi. I, M, 2
  1999. ble LL(69)
  2000. .align 4
  2001. LL(42):
  2002. #if defined(LT) || defined(RN)
  2003. LFD f16, 0 * SIZE(AO)
  2004. LFD f17, 1 * SIZE(AO)
  2005. LFD f18, 2 * SIZE(AO)
  2006. LFD f19, 3 * SIZE(AO)
  2007. LFD f20, 0 * SIZE(B)
  2008. LFD f21, 1 * SIZE(B)
  2009. LFD f22, 2 * SIZE(B)
  2010. LFD f23, 3 * SIZE(B)
  2011. dcbt CO1, PREC
  2012. dcbt CO2, PREC
  2013. srawi. r0, KK, 2
  2014. mtspr CTR, r0
  2015. mr BO, B
  2016. #else
  2017. #ifdef LN
  2018. slwi r0, K, 2 + BASE_SHIFT
  2019. sub AORIG, AORIG, r0
  2020. #endif
  2021. slwi r0, KK, 2 + BASE_SHIFT
  2022. slwi TEMP, KK, 1 + BASE_SHIFT
  2023. add AO, AORIG, r0
  2024. add BO, B, TEMP
  2025. sub TEMP, K, KK
  2026. LFD f16, 0 * SIZE(AO)
  2027. LFD f17, 1 * SIZE(AO)
  2028. LFD f18, 2 * SIZE(AO)
  2029. LFD f19, 3 * SIZE(AO)
  2030. LFD f20, 0 * SIZE(BO)
  2031. LFD f21, 1 * SIZE(BO)
  2032. LFD f22, 2 * SIZE(BO)
  2033. LFD f23, 3 * SIZE(BO)
  2034. dcbt CO1, PREC
  2035. dcbt CO2, PREC
  2036. srawi. r0, TEMP, 2
  2037. mtspr CTR, r0
  2038. #endif
  2039. ble LL(45)
  2040. .align 5
  2041. LL(43):
  2042. FMADD f0, f16, f20, f0
  2043. FMADD f1, f17, f20, f1
  2044. FMADD f2, f18, f20, f2
  2045. FMADD f3, f19, f20, f3
  2046. FMADD f4, f16, f21, f4
  2047. FMADD f5, f17, f21, f5
  2048. FMADD f6, f18, f21, f6
  2049. FMADD f7, f19, f21, f7
  2050. LFD f16, 4 * SIZE(AO)
  2051. LFD f17, 5 * SIZE(AO)
  2052. LFD f18, 6 * SIZE(AO)
  2053. LFD f19, 7 * SIZE(AO)
  2054. FMADD f0, f16, f22, f0
  2055. FMADD f1, f17, f22, f1
  2056. FMADD f2, f18, f22, f2
  2057. FMADD f3, f19, f22, f3
  2058. FMADD f4, f16, f23, f4
  2059. FMADD f5, f17, f23, f5
  2060. FMADD f6, f18, f23, f6
  2061. FMADD f7, f19, f23, f7
  2062. LFD f16, 8 * SIZE(AO)
  2063. LFD f17, 9 * SIZE(AO)
  2064. LFD f18, 10 * SIZE(AO)
  2065. LFD f19, 11 * SIZE(AO)
  2066. LFD f20, 4 * SIZE(BO)
  2067. LFD f21, 5 * SIZE(BO)
  2068. LFD f22, 6 * SIZE(BO)
  2069. LFD f23, 7 * SIZE(BO)
  2070. FMADD f0, f16, f20, f0
  2071. FMADD f1, f17, f20, f1
  2072. FMADD f2, f18, f20, f2
  2073. FMADD f3, f19, f20, f3
  2074. FMADD f4, f16, f21, f4
  2075. FMADD f5, f17, f21, f5
  2076. FMADD f6, f18, f21, f6
  2077. FMADD f7, f19, f21, f7
  2078. LFD f16, 12 * SIZE(AO)
  2079. LFD f17, 13 * SIZE(AO)
  2080. LFD f18, 14 * SIZE(AO)
  2081. LFD f19, 15 * SIZE(AO)
  2082. FMADD f0, f16, f22, f0
  2083. FMADD f1, f17, f22, f1
  2084. FMADD f2, f18, f22, f2
  2085. FMADD f3, f19, f22, f3
  2086. FMADD f4, f16, f23, f4
  2087. FMADD f5, f17, f23, f5
  2088. FMADD f6, f18, f23, f6
  2089. FMADD f7, f19, f23, f7
  2090. LFD f16, 16 * SIZE(AO)
  2091. LFD f17, 17 * SIZE(AO)
  2092. LFD f18, 18 * SIZE(AO)
  2093. LFD f19, 19 * SIZE(AO)
  2094. LFD f20, 8 * SIZE(BO)
  2095. LFD f21, 9 * SIZE(BO)
  2096. LFD f22, 10 * SIZE(BO)
  2097. LFD f23, 11 * SIZE(BO)
  2098. addi AO, AO, 16 * SIZE
  2099. addi BO, BO, 8 * SIZE
  2100. DCBT(BO, PREB)
  2101. bdnz LL(43)
  2102. .align 4
  2103. LL(45):
  2104. #if defined(LT) || defined(RN)
  2105. andi. r0, KK, 3
  2106. #else
  2107. andi. r0, TEMP, 3
  2108. #endif
  2109. mtspr CTR, r0
  2110. ble+ LL(48)
  2111. .align 4
  2112. LL(46):
  2113. FMADD f0, f16, f20, f0
  2114. FMADD f1, f17, f20, f1
  2115. FMADD f2, f18, f20, f2
  2116. FMADD f3, f19, f20, f3
  2117. FMADD f4, f16, f21, f4
  2118. FMADD f5, f17, f21, f5
  2119. FMADD f6, f18, f21, f6
  2120. FMADD f7, f19, f21, f7
  2121. LFD f16, 4 * SIZE(AO)
  2122. LFD f17, 5 * SIZE(AO)
  2123. LFD f18, 6 * SIZE(AO)
  2124. LFD f19, 7 * SIZE(AO)
  2125. LFD f20, 2 * SIZE(BO)
  2126. LFD f21, 3 * SIZE(BO)
  2127. addi BO, BO, 2 * SIZE
  2128. addi AO, AO, 4 * SIZE
  2129. bdnz LL(46)
  2130. .align 4
  2131. LL(48):
  2132. #if defined(LN) || defined(RT)
  2133. #ifdef LN
  2134. subi r0, KK, 4
  2135. #else
  2136. subi r0, KK, 2
  2137. #endif
  2138. slwi TEMP, r0, 2 + BASE_SHIFT
  2139. slwi r0, r0, 1 + BASE_SHIFT
  2140. add AO, AORIG, TEMP
  2141. add BO, B, r0
  2142. #endif
  2143. #if defined(LN) || defined(LT)
  2144. LFD f16, 0 * SIZE(BO)
  2145. LFD f17, 1 * SIZE(BO)
  2146. LFD f20, 2 * SIZE(BO)
  2147. LFD f21, 3 * SIZE(BO)
  2148. LFD f24, 4 * SIZE(BO)
  2149. LFD f25, 5 * SIZE(BO)
  2150. LFD f28, 6 * SIZE(BO)
  2151. LFD f29, 7 * SIZE(BO)
  2152. FSUB f0, f16, f0
  2153. FSUB f4, f17, f4
  2154. FSUB f1, f20, f1
  2155. FSUB f5, f21, f5
  2156. FSUB f2, f24, f2
  2157. FSUB f6, f25, f6
  2158. FSUB f3, f28, f3
  2159. FSUB f7, f29, f7
  2160. #else
  2161. LFD f16, 0 * SIZE(AO)
  2162. LFD f17, 1 * SIZE(AO)
  2163. LFD f18, 2 * SIZE(AO)
  2164. LFD f19, 3 * SIZE(AO)
  2165. LFD f20, 4 * SIZE(AO)
  2166. LFD f21, 5 * SIZE(AO)
  2167. LFD f22, 6 * SIZE(AO)
  2168. LFD f23, 7 * SIZE(AO)
  2169. FSUB f0, f16, f0
  2170. FSUB f1, f17, f1
  2171. FSUB f2, f18, f2
  2172. FSUB f3, f19, f3
  2173. FSUB f4, f20, f4
  2174. FSUB f5, f21, f5
  2175. FSUB f6, f22, f6
  2176. FSUB f7, f23, f7
  2177. #endif
  2178. #ifdef LN
  2179. LFD f16, 15 * SIZE(AO)
  2180. LFD f17, 14 * SIZE(AO)
  2181. LFD f18, 13 * SIZE(AO)
  2182. LFD f19, 12 * SIZE(AO)
  2183. FMUL f3, f16, f3
  2184. FMUL f7, f16, f7
  2185. FNMSUB f2, f17, f3, f2
  2186. FNMSUB f6, f17, f7, f6
  2187. FNMSUB f1, f18, f3, f1
  2188. FNMSUB f5, f18, f7, f5
  2189. FNMSUB f0, f19, f3, f0
  2190. FNMSUB f4, f19, f7, f4
  2191. LFD f16, 10 * SIZE(AO)
  2192. LFD f17, 9 * SIZE(AO)
  2193. LFD f18, 8 * SIZE(AO)
  2194. LFD f19, 5 * SIZE(AO)
  2195. LFD f20, 4 * SIZE(AO)
  2196. LFD f21, 0 * SIZE(AO)
  2197. FMUL f2, f16, f2
  2198. FMUL f6, f16, f6
  2199. FNMSUB f1, f17, f2, f1
  2200. FNMSUB f5, f17, f6, f5
  2201. FNMSUB f0, f18, f2, f0
  2202. FNMSUB f4, f18, f6, f4
  2203. FMUL f1, f19, f1
  2204. FMUL f5, f19, f5
  2205. FNMSUB f0, f20, f1, f0
  2206. FNMSUB f4, f20, f5, f4
  2207. FMUL f0, f21, f0
  2208. FMUL f4, f21, f4
  2209. #endif
  2210. #ifdef LT
  2211. LFD f16, 0 * SIZE(AO)
  2212. LFD f17, 1 * SIZE(AO)
  2213. LFD f18, 2 * SIZE(AO)
  2214. LFD f19, 3 * SIZE(AO)
  2215. FMUL f0, f16, f0
  2216. FMUL f4, f16, f4
  2217. FNMSUB f1, f17, f0, f1
  2218. FNMSUB f5, f17, f4, f5
  2219. FNMSUB f2, f18, f0, f2
  2220. FNMSUB f6, f18, f4, f6
  2221. FNMSUB f3, f19, f0, f3
  2222. FNMSUB f7, f19, f4, f7
  2223. LFD f17, 5 * SIZE(AO)
  2224. LFD f18, 6 * SIZE(AO)
  2225. LFD f19, 7 * SIZE(AO)
  2226. FMUL f1, f17, f1
  2227. FMUL f5, f17, f5
  2228. FNMSUB f2, f18, f1, f2
  2229. FNMSUB f6, f18, f5, f6
  2230. FNMSUB f3, f19, f1, f3
  2231. FNMSUB f7, f19, f5, f7
  2232. LFD f18, 10 * SIZE(AO)
  2233. LFD f19, 11 * SIZE(AO)
  2234. FMUL f2, f18, f2
  2235. FMUL f6, f18, f6
  2236. FNMSUB f3, f19, f2, f3
  2237. FNMSUB f7, f19, f6, f7
  2238. LFD f19, 15 * SIZE(AO)
  2239. FMUL f3, f19, f3
  2240. FMUL f7, f19, f7
  2241. #endif
  2242. #ifdef RN
  2243. LFD f16, 0 * SIZE(BO)
  2244. LFD f17, 1 * SIZE(BO)
  2245. LFD f18, 3 * SIZE(BO)
  2246. FMUL f0, f16, f0
  2247. FMUL f1, f16, f1
  2248. FMUL f2, f16, f2
  2249. FMUL f3, f16, f3
  2250. FNMSUB f4, f17, f0, f4
  2251. FNMSUB f5, f17, f1, f5
  2252. FNMSUB f6, f17, f2, f6
  2253. FNMSUB f7, f17, f3, f7
  2254. FMUL f4, f18, f4
  2255. FMUL f5, f18, f5
  2256. FMUL f6, f18, f6
  2257. FMUL f7, f18, f7
  2258. #endif
  2259. #ifdef RT
  2260. LFD f19, 3 * SIZE(BO)
  2261. LFD f20, 2 * SIZE(BO)
  2262. LFD f21, 0 * SIZE(BO)
  2263. FMUL f4, f19, f4
  2264. FMUL f5, f19, f5
  2265. FMUL f6, f19, f6
  2266. FMUL f7, f19, f7
  2267. FNMSUB f0, f20, f4, f0
  2268. FNMSUB f1, f20, f5, f1
  2269. FNMSUB f2, f20, f6, f2
  2270. FNMSUB f3, f20, f7, f3
  2271. FMUL f0, f21, f0
  2272. FMUL f1, f21, f1
  2273. FMUL f2, f21, f2
  2274. FMUL f3, f21, f3
  2275. #endif
  2276. #ifdef LN
  2277. subi CO1, CO1, 4 * SIZE
  2278. subi CO2, CO2, 4 * SIZE
  2279. #endif
  2280. #if defined(LN) || defined(LT)
  2281. STFD f0, 0 * SIZE(BO)
  2282. STFD f4, 1 * SIZE(BO)
  2283. STFD f1, 2 * SIZE(BO)
  2284. STFD f5, 3 * SIZE(BO)
  2285. STFD f2, 4 * SIZE(BO)
  2286. STFD f6, 5 * SIZE(BO)
  2287. STFD f3, 6 * SIZE(BO)
  2288. STFD f7, 7 * SIZE(BO)
  2289. #else
  2290. STFD f0, 0 * SIZE(AO)
  2291. STFD f1, 1 * SIZE(AO)
  2292. STFD f2, 2 * SIZE(AO)
  2293. STFD f3, 3 * SIZE(AO)
  2294. STFD f4, 4 * SIZE(AO)
  2295. STFD f5, 5 * SIZE(AO)
  2296. STFD f6, 6 * SIZE(AO)
  2297. STFD f7, 7 * SIZE(AO)
  2298. #endif
  2299. STFD f0, 0 * SIZE(CO1)
  2300. STFD f1, 1 * SIZE(CO1)
  2301. STFD f2, 2 * SIZE(CO1)
  2302. STFD f3, 3 * SIZE(CO1)
  2303. STFD f4, 0 * SIZE(CO2)
  2304. STFD f5, 1 * SIZE(CO2)
  2305. STFD f6, 2 * SIZE(CO2)
  2306. STFD f7, 3 * SIZE(CO2)
  2307. lfs f0, FZERO
  2308. fmr f1, f0
  2309. fmr f2, f0
  2310. fmr f3, f0
  2311. fmr f4, f0
  2312. fmr f5, f0
  2313. fmr f6, f0
  2314. fmr f7, f0
  2315. #ifndef LN
  2316. addi CO1, CO1, 4 * SIZE
  2317. addi CO2, CO2, 4 * SIZE
  2318. #endif
  2319. #ifdef RT
  2320. slwi r0, K, 2 + BASE_SHIFT
  2321. add AORIG, AORIG, r0
  2322. #endif
  2323. #if defined(LT) || defined(RN)
  2324. sub TEMP, K, KK
  2325. slwi r0, TEMP, 2 + BASE_SHIFT
  2326. slwi TEMP, TEMP, 1 + BASE_SHIFT
  2327. add AO, AO, r0
  2328. add BO, BO, TEMP
  2329. #endif
  2330. #ifdef LN
  2331. subi KK, KK, 4
  2332. #endif
  2333. #ifdef LT
  2334. addi KK, KK, 4
  2335. #endif
  2336. addic. I, I, -1
  2337. bgt+ LL(42)
  2338. .align 4
  2339. LL(69):
  2340. #ifdef LN
  2341. slwi r0, K, 1 + BASE_SHIFT
  2342. add B, B, r0
  2343. #endif
  2344. #if defined(LT) || defined(RN)
  2345. mr B, BO
  2346. #endif
  2347. #ifdef RN
  2348. addi KK, KK, 2
  2349. #endif
  2350. #ifdef RT
  2351. subi KK, KK, 2
  2352. #endif
  2353. lfs f0, FZERO
  2354. .align 4
  2355. LL(70):
  2356. andi. J, N, 1
  2357. ble LL(999)
  2358. #ifdef RT
  2359. slwi r0, K, 0 + BASE_SHIFT
  2360. sub B, B, r0
  2361. sub C, C, LDC
  2362. #endif
  2363. mr CO1, C
  2364. #ifdef LN
  2365. add KK, M, OFFSET
  2366. #endif
  2367. #ifdef LT
  2368. mr KK, OFFSET
  2369. #endif
  2370. fmr f1, f0
  2371. fmr f2, f0
  2372. fmr f3, f0
  2373. #if defined(LN) || defined(RT)
  2374. mr AORIG, A
  2375. #else
  2376. mr AO, A
  2377. #endif
  2378. #ifndef RT
  2379. add C, CO1, LDC
  2380. #endif
  2381. .align 4
  2382. LL(90):
  2383. andi. I, M, 1
  2384. ble LL(80)
  2385. #if defined(LT) || defined(RN)
  2386. LFD f16, 0 * SIZE(AO)
  2387. LFD f17, 1 * SIZE(AO)
  2388. LFD f18, 2 * SIZE(AO)
  2389. LFD f19, 3 * SIZE(AO)
  2390. LFD f20, 0 * SIZE(B)
  2391. LFD f21, 1 * SIZE(B)
  2392. LFD f22, 2 * SIZE(B)
  2393. LFD f23, 3 * SIZE(B)
  2394. srawi. r0, KK, 3
  2395. mtspr CTR, r0
  2396. mr BO, B
  2397. #else
  2398. #ifdef LN
  2399. slwi r0, K, BASE_SHIFT
  2400. sub AORIG, AORIG, r0
  2401. #endif
  2402. slwi r0, KK, 0 + BASE_SHIFT
  2403. slwi TEMP, KK, 0 + BASE_SHIFT
  2404. add AO, AORIG, r0
  2405. add BO, B, TEMP
  2406. sub TEMP, K, KK
  2407. LFD f16, 0 * SIZE(AO)
  2408. LFD f17, 1 * SIZE(AO)
  2409. LFD f18, 2 * SIZE(AO)
  2410. LFD f19, 3 * SIZE(AO)
  2411. LFD f20, 0 * SIZE(BO)
  2412. LFD f21, 1 * SIZE(BO)
  2413. LFD f22, 2 * SIZE(BO)
  2414. LFD f23, 3 * SIZE(BO)
  2415. srawi. r0, TEMP, 3
  2416. mtspr CTR, r0
  2417. #endif
  2418. ble LL(95)
  2419. .align 5
  2420. LL(92):
  2421. FMADD f0, f16, f20, f0
  2422. FMADD f1, f17, f21, f1
  2423. FMADD f2, f18, f22, f2
  2424. FMADD f3, f19, f23, f3
  2425. LFD f16, 4 * SIZE(AO)
  2426. LFD f17, 5 * SIZE(AO)
  2427. LFD f18, 6 * SIZE(AO)
  2428. LFD f19, 7 * SIZE(AO)
  2429. LFD f20, 4 * SIZE(BO)
  2430. LFD f21, 5 * SIZE(BO)
  2431. LFD f22, 6 * SIZE(BO)
  2432. LFD f23, 7 * SIZE(BO)
  2433. FMADD f0, f16, f20, f0
  2434. FMADD f1, f17, f21, f1
  2435. FMADD f2, f18, f22, f2
  2436. FMADD f3, f19, f23, f3
  2437. LFD f16, 8 * SIZE(AO)
  2438. LFD f17, 9 * SIZE(AO)
  2439. LFD f18, 10 * SIZE(AO)
  2440. LFD f19, 11 * SIZE(AO)
  2441. LFD f20, 8 * SIZE(BO)
  2442. LFD f21, 9 * SIZE(BO)
  2443. LFD f22, 10 * SIZE(BO)
  2444. LFD f23, 11 * SIZE(BO)
  2445. addi AO, AO, 8 * SIZE
  2446. addi BO, BO, 8 * SIZE
  2447. bdnz LL(92)
  2448. .align 4
  2449. LL(95):
  2450. #if defined(LT) || defined(RN)
  2451. andi. r0, KK, 7
  2452. #else
  2453. andi. r0, TEMP, 7
  2454. #endif
  2455. mtspr CTR, r0
  2456. ble+ LL(98)
  2457. .align 4
  2458. LL(96):
  2459. FMADD f0, f16, f20, f0
  2460. LFD f16, 1 * SIZE(AO)
  2461. LFD f20, 1 * SIZE(BO)
  2462. addi BO, BO, 1 * SIZE
  2463. addi AO, AO, 1 * SIZE
  2464. bdnz LL(96)
  2465. .align 4
  2466. LL(98):
  2467. FADD f0, f1, f0
  2468. FADD f2, f3, f2
  2469. FADD f0, f2, f0
  2470. #if defined(LN) || defined(RT)
  2471. #ifdef LN
  2472. subi r0, KK, 1
  2473. #else
  2474. subi r0, KK, 1
  2475. #endif
  2476. slwi TEMP, r0, 0 + BASE_SHIFT
  2477. slwi r0, r0, 0 + BASE_SHIFT
  2478. add AO, AORIG, TEMP
  2479. add BO, B, r0
  2480. #endif
  2481. #if defined(LN) || defined(LT)
  2482. LFD f16, 0 * SIZE(BO)
  2483. FSUB f0, f16, f0
  2484. #else
  2485. LFD f16, 0 * SIZE(AO)
  2486. FSUB f0, f16, f0
  2487. #endif
  2488. #ifdef LN
  2489. LFD f21, 0 * SIZE(AO)
  2490. FMUL f0, f21, f0
  2491. #endif
  2492. #ifdef LT
  2493. LFD f16, 0 * SIZE(AO)
  2494. FMUL f0, f16, f0
  2495. #endif
  2496. #ifdef RN
  2497. LFD f16, 0 * SIZE(BO)
  2498. FMUL f0, f16, f0
  2499. #endif
  2500. #ifdef RT
  2501. LFD f21, 0 * SIZE(BO)
  2502. FMUL f0, f21, f0
  2503. #endif
  2504. #ifdef LN
  2505. subi CO1, CO1, 1 * SIZE
  2506. #endif
  2507. #if defined(LN) || defined(LT)
  2508. STFD f0, 0 * SIZE(BO)
  2509. #else
  2510. STFD f0, 0 * SIZE(AO)
  2511. #endif
  2512. STFD f0, 0 * SIZE(CO1)
  2513. lfs f0, FZERO
  2514. fmr f1, f0
  2515. fmr f2, f0
  2516. fmr f3, f0
  2517. #ifndef LN
  2518. addi CO1, CO1, 1 * SIZE
  2519. #endif
  2520. #ifdef RT
  2521. slwi r0, K, 0 + BASE_SHIFT
  2522. add AORIG, AORIG, r0
  2523. #endif
  2524. #if defined(LT) || defined(RN)
  2525. sub TEMP, K, KK
  2526. slwi r0, TEMP, 0 + BASE_SHIFT
  2527. slwi TEMP, TEMP, 0 + BASE_SHIFT
  2528. add AO, AO, r0
  2529. add BO, BO, TEMP
  2530. #endif
  2531. #ifdef LN
  2532. subi KK, KK, 1
  2533. #endif
  2534. #ifdef LT
  2535. addi KK, KK, 1
  2536. #endif
  2537. .align 4
  2538. LL(80):
  2539. andi. I, M, 2
  2540. ble LL(71)
  2541. #if defined(LT) || defined(RN)
  2542. LFD f16, 0 * SIZE(AO)
  2543. LFD f17, 1 * SIZE(AO)
  2544. LFD f18, 2 * SIZE(AO)
  2545. LFD f19, 3 * SIZE(AO)
  2546. LFD f20, 0 * SIZE(B)
  2547. LFD f21, 1 * SIZE(B)
  2548. LFD f22, 2 * SIZE(B)
  2549. LFD f23, 3 * SIZE(B)
  2550. srawi. r0, KK, 2
  2551. mtspr CTR, r0
  2552. mr BO, B
  2553. #else
  2554. #ifdef LN
  2555. slwi r0, K, 1 + BASE_SHIFT
  2556. sub AORIG, AORIG, r0
  2557. #endif
  2558. slwi r0, KK, 1 + BASE_SHIFT
  2559. slwi TEMP, KK, 0 + BASE_SHIFT
  2560. add AO, AORIG, r0
  2561. add BO, B, TEMP
  2562. sub TEMP, K, KK
  2563. LFD f16, 0 * SIZE(AO)
  2564. LFD f17, 1 * SIZE(AO)
  2565. LFD f18, 2 * SIZE(AO)
  2566. LFD f19, 3 * SIZE(AO)
  2567. LFD f20, 0 * SIZE(BO)
  2568. LFD f21, 1 * SIZE(BO)
  2569. LFD f22, 2 * SIZE(BO)
  2570. LFD f23, 3 * SIZE(BO)
  2571. srawi. r0, TEMP, 2
  2572. mtspr CTR, r0
  2573. #endif
  2574. ble LL(85)
  2575. .align 5
  2576. LL(82):
  2577. FMADD f0, f16, f20, f0
  2578. FMADD f1, f17, f20, f1
  2579. FMADD f2, f18, f21, f2
  2580. FMADD f3, f19, f21, f3
  2581. LFD f16, 4 * SIZE(AO)
  2582. LFD f17, 5 * SIZE(AO)
  2583. LFD f18, 6 * SIZE(AO)
  2584. LFD f19, 7 * SIZE(AO)
  2585. FMADD f0, f16, f22, f0
  2586. FMADD f1, f17, f22, f1
  2587. FMADD f2, f18, f23, f2
  2588. FMADD f3, f19, f23, f3
  2589. LFD f16, 8 * SIZE(AO)
  2590. LFD f17, 9 * SIZE(AO)
  2591. LFD f18, 10 * SIZE(AO)
  2592. LFD f19, 11 * SIZE(AO)
  2593. LFD f20, 4 * SIZE(BO)
  2594. LFD f21, 5 * SIZE(BO)
  2595. LFD f22, 6 * SIZE(BO)
  2596. LFD f23, 7 * SIZE(BO)
  2597. addi AO, AO, 8 * SIZE
  2598. addi BO, BO, 4 * SIZE
  2599. DCBT(BO, PREB)
  2600. bdnz LL(82)
  2601. .align 4
  2602. LL(85):
  2603. #if defined(LT) || defined(RN)
  2604. andi. r0, KK, 3
  2605. #else
  2606. andi. r0, TEMP, 3
  2607. #endif
  2608. mtspr CTR, r0
  2609. ble+ LL(88)
  2610. .align 4
  2611. LL(86):
  2612. FMADD f0, f16, f20, f0
  2613. FMADD f1, f17, f20, f1
  2614. LFD f16, 2 * SIZE(AO)
  2615. LFD f17, 3 * SIZE(AO)
  2616. LFD f20, 1 * SIZE(BO)
  2617. addi BO, BO, 1 * SIZE
  2618. addi AO, AO, 2 * SIZE
  2619. bdnz LL(86)
  2620. .align 4
  2621. LL(88):
  2622. FADD f0, f2, f0
  2623. FADD f1, f3, f1
  2624. #if defined(LN) || defined(RT)
  2625. #ifdef LN
  2626. subi r0, KK, 2
  2627. #else
  2628. subi r0, KK, 1
  2629. #endif
  2630. slwi TEMP, r0, 1 + BASE_SHIFT
  2631. slwi r0, r0, 0 + BASE_SHIFT
  2632. add AO, AORIG, TEMP
  2633. add BO, B, r0
  2634. #endif
  2635. #if defined(LN) || defined(LT)
  2636. LFD f16, 0 * SIZE(BO)
  2637. LFD f20, 1 * SIZE(BO)
  2638. FSUB f0, f16, f0
  2639. FSUB f1, f20, f1
  2640. #else
  2641. LFD f16, 0 * SIZE(AO)
  2642. LFD f17, 1 * SIZE(AO)
  2643. FSUB f0, f16, f0
  2644. FSUB f1, f17, f1
  2645. #endif
  2646. #ifdef LN
  2647. LFD f19, 3 * SIZE(AO)
  2648. LFD f20, 2 * SIZE(AO)
  2649. LFD f21, 0 * SIZE(AO)
  2650. FMUL f1, f19, f1
  2651. FNMSUB f0, f20, f1, f0
  2652. FMUL f0, f21, f0
  2653. #endif
  2654. #ifdef LT
  2655. LFD f16, 0 * SIZE(AO)
  2656. LFD f17, 1 * SIZE(AO)
  2657. FMUL f0, f16, f0
  2658. FNMSUB f1, f17, f0, f1
  2659. LFD f17, 3 * SIZE(AO)
  2660. FMUL f1, f17, f1
  2661. #endif
  2662. #ifdef RN
  2663. LFD f16, 0 * SIZE(BO)
  2664. FMUL f0, f16, f0
  2665. FMUL f1, f16, f1
  2666. #endif
  2667. #ifdef RT
  2668. LFD f21, 0 * SIZE(BO)
  2669. FMUL f0, f21, f0
  2670. FMUL f1, f21, f1
  2671. #endif
  2672. #ifdef LN
  2673. subi CO1, CO1, 2 * SIZE
  2674. #endif
  2675. #if defined(LN) || defined(LT)
  2676. STFD f0, 0 * SIZE(BO)
  2677. STFD f1, 1 * SIZE(BO)
  2678. #else
  2679. STFD f0, 0 * SIZE(AO)
  2680. STFD f1, 1 * SIZE(AO)
  2681. #endif
  2682. STFD f0, 0 * SIZE(CO1)
  2683. STFD f1, 1 * SIZE(CO1)
  2684. lfs f0, FZERO
  2685. fmr f1, f0
  2686. fmr f2, f0
  2687. fmr f3, f0
  2688. #ifndef LN
  2689. addi CO1, CO1, 2 * SIZE
  2690. #endif
  2691. #ifdef RT
  2692. slwi r0, K, 1 + BASE_SHIFT
  2693. add AORIG, AORIG, r0
  2694. #endif
  2695. #if defined(LT) || defined(RN)
  2696. sub TEMP, K, KK
  2697. slwi r0, TEMP, 1 + BASE_SHIFT
  2698. slwi TEMP, TEMP, 0 + BASE_SHIFT
  2699. add AO, AO, r0
  2700. add BO, BO, TEMP
  2701. #endif
  2702. #ifdef LN
  2703. subi KK, KK, 2
  2704. #endif
  2705. #ifdef LT
  2706. addi KK, KK, 2
  2707. #endif
  2708. .align 4
  2709. LL(71):
  2710. srawi. I, M, 2
  2711. ble LL(999)
  2712. .align 4
  2713. LL(72):
  2714. #if defined(LT) || defined(RN)
  2715. LFD f16, 0 * SIZE(AO)
  2716. LFD f17, 1 * SIZE(AO)
  2717. LFD f18, 2 * SIZE(AO)
  2718. LFD f19, 3 * SIZE(AO)
  2719. LFD f20, 0 * SIZE(B)
  2720. LFD f21, 1 * SIZE(B)
  2721. LFD f22, 2 * SIZE(B)
  2722. LFD f23, 3 * SIZE(B)
  2723. dcbt CO1, PREC
  2724. srawi. r0, KK, 2
  2725. mtspr CTR, r0
  2726. mr BO, B
  2727. #else
  2728. #ifdef LN
  2729. slwi r0, K, 2 + BASE_SHIFT
  2730. sub AORIG, AORIG, r0
  2731. #endif
  2732. slwi r0, KK, 2 + BASE_SHIFT
  2733. slwi TEMP, KK, 0 + BASE_SHIFT
  2734. add AO, AORIG, r0
  2735. add BO, B, TEMP
  2736. sub TEMP, K, KK
  2737. LFD f16, 0 * SIZE(AO)
  2738. LFD f17, 1 * SIZE(AO)
  2739. LFD f18, 2 * SIZE(AO)
  2740. LFD f19, 3 * SIZE(AO)
  2741. LFD f20, 0 * SIZE(BO)
  2742. LFD f21, 1 * SIZE(BO)
  2743. LFD f22, 2 * SIZE(BO)
  2744. LFD f23, 3 * SIZE(BO)
  2745. dcbt CO1, PREC
  2746. srawi. r0, TEMP, 2
  2747. mtspr CTR, r0
  2748. #endif
  2749. ble LL(75)
  2750. .align 5
  2751. LL(73):
  2752. FMADD f0, f16, f20, f0
  2753. FMADD f1, f17, f20, f1
  2754. FMADD f2, f18, f20, f2
  2755. FMADD f3, f19, f20, f3
  2756. LFD f16, 4 * SIZE(AO)
  2757. LFD f17, 5 * SIZE(AO)
  2758. LFD f18, 6 * SIZE(AO)
  2759. LFD f19, 7 * SIZE(AO)
  2760. FMADD f0, f16, f21, f0
  2761. FMADD f1, f17, f21, f1
  2762. FMADD f2, f18, f21, f2
  2763. FMADD f3, f19, f21, f3
  2764. LFD f16, 8 * SIZE(AO)
  2765. LFD f17, 9 * SIZE(AO)
  2766. LFD f18, 10 * SIZE(AO)
  2767. LFD f19, 11 * SIZE(AO)
  2768. FMADD f0, f16, f22, f0
  2769. FMADD f1, f17, f22, f1
  2770. FMADD f2, f18, f22, f2
  2771. FMADD f3, f19, f22, f3
  2772. LFD f16, 12 * SIZE(AO)
  2773. LFD f17, 13 * SIZE(AO)
  2774. LFD f18, 14 * SIZE(AO)
  2775. LFD f19, 15 * SIZE(AO)
  2776. FMADD f0, f16, f23, f0
  2777. FMADD f1, f17, f23, f1
  2778. FMADD f2, f18, f23, f2
  2779. FMADD f3, f19, f23, f3
  2780. LFD f16, 16 * SIZE(AO)
  2781. LFD f17, 17 * SIZE(AO)
  2782. LFD f18, 18 * SIZE(AO)
  2783. LFD f19, 19 * SIZE(AO)
  2784. LFD f20, 4 * SIZE(BO)
  2785. LFD f21, 5 * SIZE(BO)
  2786. LFD f22, 6 * SIZE(BO)
  2787. LFD f23, 7 * SIZE(BO)
  2788. addi AO, AO, 16 * SIZE
  2789. addi BO, BO, 4 * SIZE
  2790. DCBT(BO, PREB)
  2791. bdnz LL(73)
  2792. .align 4
  2793. LL(75):
  2794. #if defined(LT) || defined(RN)
  2795. andi. r0, KK, 3
  2796. #else
  2797. andi. r0, TEMP, 3
  2798. #endif
  2799. mtspr CTR, r0
  2800. ble+ LL(78)
  2801. .align 4
  2802. LL(76):
  2803. FMADD f0, f16, f20, f0
  2804. FMADD f1, f17, f20, f1
  2805. FMADD f2, f18, f20, f2
  2806. FMADD f3, f19, f20, f3
  2807. LFD f16, 4 * SIZE(AO)
  2808. LFD f17, 5 * SIZE(AO)
  2809. LFD f18, 6 * SIZE(AO)
  2810. LFD f19, 7 * SIZE(AO)
  2811. LFD f20, 1 * SIZE(BO)
  2812. addi BO, BO, 1 * SIZE
  2813. addi AO, AO, 4 * SIZE
  2814. bdnz LL(76)
  2815. .align 4
  2816. LL(78):
  2817. #if defined(LN) || defined(RT)
  2818. #ifdef LN
  2819. subi r0, KK, 4
  2820. #else
  2821. subi r0, KK, 1
  2822. #endif
  2823. slwi TEMP, r0, 2 + BASE_SHIFT
  2824. slwi r0, r0, 0 + BASE_SHIFT
  2825. add AO, AORIG, TEMP
  2826. add BO, B, r0
  2827. #endif
  2828. #if defined(LN) || defined(LT)
  2829. LFD f16, 0 * SIZE(BO)
  2830. LFD f20, 1 * SIZE(BO)
  2831. LFD f24, 2 * SIZE(BO)
  2832. LFD f28, 3 * SIZE(BO)
  2833. FSUB f0, f16, f0
  2834. FSUB f1, f20, f1
  2835. FSUB f2, f24, f2
  2836. FSUB f3, f28, f3
  2837. #else
  2838. LFD f16, 0 * SIZE(AO)
  2839. LFD f17, 1 * SIZE(AO)
  2840. LFD f18, 2 * SIZE(AO)
  2841. LFD f19, 3 * SIZE(AO)
  2842. FSUB f0, f16, f0
  2843. FSUB f1, f17, f1
  2844. FSUB f2, f18, f2
  2845. FSUB f3, f19, f3
  2846. #endif
  2847. #ifdef LN
  2848. LFD f16, 15 * SIZE(AO)
  2849. LFD f17, 14 * SIZE(AO)
  2850. LFD f18, 13 * SIZE(AO)
  2851. LFD f19, 12 * SIZE(AO)
  2852. FMUL f3, f16, f3
  2853. FNMSUB f2, f17, f3, f2
  2854. FNMSUB f1, f18, f3, f1
  2855. FNMSUB f0, f19, f3, f0
  2856. LFD f16, 10 * SIZE(AO)
  2857. LFD f17, 9 * SIZE(AO)
  2858. LFD f18, 8 * SIZE(AO)
  2859. LFD f19, 5 * SIZE(AO)
  2860. LFD f20, 4 * SIZE(AO)
  2861. LFD f21, 0 * SIZE(AO)
  2862. FMUL f2, f16, f2
  2863. FNMSUB f1, f17, f2, f1
  2864. FNMSUB f0, f18, f2, f0
  2865. FMUL f1, f19, f1
  2866. FNMSUB f0, f20, f1, f0
  2867. FMUL f0, f21, f0
  2868. #endif
  2869. #ifdef LT
  2870. LFD f16, 0 * SIZE(AO)
  2871. LFD f17, 1 * SIZE(AO)
  2872. LFD f18, 2 * SIZE(AO)
  2873. LFD f19, 3 * SIZE(AO)
  2874. FMUL f0, f16, f0
  2875. FNMSUB f1, f17, f0, f1
  2876. FNMSUB f2, f18, f0, f2
  2877. FNMSUB f3, f19, f0, f3
  2878. LFD f17, 5 * SIZE(AO)
  2879. LFD f18, 6 * SIZE(AO)
  2880. LFD f19, 7 * SIZE(AO)
  2881. FMUL f1, f17, f1
  2882. FNMSUB f2, f18, f1, f2
  2883. FNMSUB f3, f19, f1, f3
  2884. LFD f18, 10 * SIZE(AO)
  2885. LFD f19, 11 * SIZE(AO)
  2886. FMUL f2, f18, f2
  2887. FNMSUB f3, f19, f2, f3
  2888. LFD f19, 15 * SIZE(AO)
  2889. FMUL f3, f19, f3
  2890. #endif
  2891. #ifdef RN
  2892. LFD f16, 0 * SIZE(BO)
  2893. FMUL f0, f16, f0
  2894. FMUL f1, f16, f1
  2895. FMUL f2, f16, f2
  2896. FMUL f3, f16, f3
  2897. #endif
  2898. #ifdef RT
  2899. LFD f21, 0 * SIZE(BO)
  2900. FMUL f0, f21, f0
  2901. FMUL f1, f21, f1
  2902. FMUL f2, f21, f2
  2903. FMUL f3, f21, f3
  2904. #endif
  2905. #ifdef LN
  2906. subi CO1, CO1, 4 * SIZE
  2907. #endif
  2908. #if defined(LN) || defined(LT)
  2909. STFD f0, 0 * SIZE(BO)
  2910. STFD f1, 1 * SIZE(BO)
  2911. STFD f2, 2 * SIZE(BO)
  2912. STFD f3, 3 * SIZE(BO)
  2913. #else
  2914. STFD f0, 0 * SIZE(AO)
  2915. STFD f1, 1 * SIZE(AO)
  2916. STFD f2, 2 * SIZE(AO)
  2917. STFD f3, 3 * SIZE(AO)
  2918. #endif
  2919. STFD f0, 0 * SIZE(CO1)
  2920. STFD f1, 1 * SIZE(CO1)
  2921. STFD f2, 2 * SIZE(CO1)
  2922. STFD f3, 3 * SIZE(CO1)
  2923. lfs f0, FZERO
  2924. fmr f1, f0
  2925. fmr f2, f0
  2926. fmr f3, f0
  2927. #ifndef LN
  2928. addi CO1, CO1, 4 * SIZE
  2929. #endif
  2930. #ifdef RT
  2931. slwi r0, K, 2 + BASE_SHIFT
  2932. add AORIG, AORIG, r0
  2933. #endif
  2934. #if defined(LT) || defined(RN)
  2935. sub TEMP, K, KK
  2936. slwi r0, TEMP, 2 + BASE_SHIFT
  2937. slwi TEMP, TEMP, 0 + BASE_SHIFT
  2938. add AO, AO, r0
  2939. add BO, BO, TEMP
  2940. #endif
  2941. #ifdef LN
  2942. subi KK, KK, 4
  2943. #endif
  2944. #ifdef LT
  2945. addi KK, KK, 4
  2946. #endif
  2947. addic. I, I, -1
  2948. bgt+ LL(72)
  2949. .align 4
  2950. LL(999):
  2951. addi r3, 0, 0
  2952. lfd f14, 0(SP)
  2953. lfd f15, 8(SP)
  2954. lfd f16, 16(SP)
  2955. lfd f17, 24(SP)
  2956. lfd f18, 32(SP)
  2957. lfd f19, 40(SP)
  2958. lfd f20, 48(SP)
  2959. lfd f21, 56(SP)
  2960. lfd f22, 64(SP)
  2961. lfd f23, 72(SP)
  2962. lfd f24, 80(SP)
  2963. lfd f25, 88(SP)
  2964. lfd f26, 96(SP)
  2965. lfd f27, 104(SP)
  2966. lfd f28, 112(SP)
  2967. lfd f29, 120(SP)
  2968. lfd f30, 128(SP)
  2969. lfd f31, 136(SP)
  2970. #ifdef __64BIT__
  2971. ld r31, 144(SP)
  2972. ld r30, 152(SP)
  2973. ld r29, 160(SP)
  2974. ld r28, 168(SP)
  2975. ld r27, 176(SP)
  2976. ld r26, 184(SP)
  2977. ld r25, 192(SP)
  2978. ld r24, 200(SP)
  2979. ld r23, 208(SP)
  2980. ld r22, 216(SP)
  2981. ld r21, 224(SP)
  2982. ld r20, 232(SP)
  2983. ld r19, 240(SP)
  2984. ld r18, 248(SP)
  2985. #else
  2986. lwz r31, 144(SP)
  2987. lwz r30, 148(SP)
  2988. lwz r29, 152(SP)
  2989. lwz r28, 156(SP)
  2990. lwz r27, 160(SP)
  2991. lwz r26, 164(SP)
  2992. lwz r25, 168(SP)
  2993. lwz r24, 172(SP)
  2994. lwz r23, 176(SP)
  2995. lwz r22, 180(SP)
  2996. lwz r21, 184(SP)
  2997. lwz r20, 188(SP)
  2998. lwz r19, 192(SP)
  2999. lwz r18, 196(SP)
  3000. #endif
  3001. addi SP, SP, STACKSIZE
  3002. blr
  3003. EPILOGUE
  3004. #endif