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gemm_kernel_g4.S 43 kB

rebase? (#1) * With the Intel compiler on Linux, prefer ifort for the final link step icc has known problems with mixed-language builds that ifort can handle just fine. Fixes #1956 * Rename operands to put lda on the input/output constraint list * Fix wrong constraints in inline assembly for #2009 * Fix inline assembly constraints rework indices to allow marking argument lda4 as input and output. For #2009 * Fix inline assembly constraints rework indices to allow marking argument lda as input and output. * Fix inline assembly constraints * Fix inline assembly constraints * Fix inline assembly constraints in Bulldozer TRSM kernels rework indices to allow marking i,as and bs as both input and output (marked operand n1 as well for simplicity). For #2009 * Correct range_n limiting same bug as seen in #1388, somehow missed in corresponding PR #1389 * Allow multithreading TRMV again revert workaround introduced for issue #1332 as the actual cause appears to be my incorrect fix from #1262 (see #1388) * Fix error introduced during cleanup * Reduce list of kernels in the dynamic arch build to make compilation complete reliably within the 1h limit again * init * move fix to right place * Fix missing -c option in AVX512 test * Fix AVX512 test always returning false due to missing compiler option * Make x86_32 imply NO_AVX2, NO_AVX512 in addition to NO_AVX fixes #2033 * Keep xcode8.3 for osx BINARY=32 build as xcode10 deprecated i386 * Make sure that AVX512 is disabled in 32bit builds for #2033 * Improve handling of NO_STATIC and NO_SHARED to avoid surprises from defining either as zero. Fixes #2035 by addressing some concerns from #1422 * init * address warning introed with #1814 et al * Restore locking optimizations for OpenMP case restore another accidentally dropped part of #1468 that was missed in #2004 to address performance regression reported in #1461 * HiSilicon tsv110 CPUs optimization branch add HiSilicon tsv110 CPUs optimization branch * add TARGET support for HiSilicon tsv110 CPUs * add TARGET support for HiSilicon tsv110 CPUs * add TARGET support for HiSilicon tsv110 CPUs * Fix module definition conflicts between LAPACK and ReLAPACK for #2043 * Do not compile in AVX512 check if AVX support is disabled xgetbv is function depends on NO_AVX being undefined - we could change that too, but that combo is unlikely to work anyway * ctest.c : add __POWERPC__ for PowerMac * Fix crash in sgemm SSE/nano kernel on x86_64 Fix bug #2047. Signed-off-by: Celelibi <celelibi@gmail.com> * param.h : enable defines for PPC970 on DarwinOS fixes: gemm.c: In function 'sgemm_': ../common_param.h:981:18: error: 'SGEMM_DEFAULT_P' undeclared (first use in this function) #define SGEMM_P SGEMM_DEFAULT_P ^ * common_power.h: force DCBT_ARG 0 on PPC970 Darwin without this, we see ../kernel/power/gemv_n.S:427:Parameter syntax error and many more similar entries that relates to this assembly command dcbt 8, r24, r18 this change makes the DCBT_ARG = 0 and openblas builds through to completion on PowerMac 970 Tests pass * Make TARGET=GENERIC compatible with DYNAMIC_ARCH=1 for issue #2048 * make DYNAMIC_ARCH=1 package work on TSV110. * make DYNAMIC_ARCH=1 package work on TSV110 * Add Intel Denverton for #2048 * Add Intel Denverton * Change 64-bit detection as explained in #2056 * Trivial typo fix as suggested in #2022 * Disable the AVX512 DGEMM kernel (again) Due to as yet unresolved errors seen in #1955 and #2029 * Use POSIX getenv on Cygwin The Windows-native GetEnvironmentVariable cannot be relied on, as Cygwin does not always copy environment variables set through Cygwin to the Windows environment block, particularly after fork(). * Fix for #2063: The DllMain used in Cygwin did not run the thread memory pool cleanup upon THREAD_DETACH which is needed when compiled with USE_TLS=1. * Also call CloseHandle on each thread, as well as on the event so as to not leak thread handles. * AIX asm syntax changes needed for shared object creation * power9 makefile. dgemm based on power8 kernel with following changes : 32x unrolled 16x4 kernel and 8x4 kernel using (lxv stxv butterfly rank1 update). improvement from 17 to 22-23gflops. dtrmm cases were added into dgemm itself * Expose CBLAS interfaces for I?MIN and I?MAX * Build CBLAS interfaces for I?MIN and I?MAX * Add declarations for ?sum and cblas_?sum * Add interface for ?sum (derived from ?asum) * Add ?sum * Add implementations of ssum/dsum and csum/zsum as trivial copies of asum/zsasum with the fabs calls replaced by fmov to preserve code structure * Add ARM implementations of ?sum (trivial copies of the respective ?asum with the fabs calls removed) * Add ARM64 implementations of ?sum as trivial copies of the respective ?asum kernels with the fabs calls removed * Add ia64 implementation of ?sum as trivial copy of asum with the fabs calls removed * Add MIPS implementation of ?sum as trivial copy of ?asum with the fabs calls removed * Add MIPS64 implementation of ?sum as trivial copy of ?asum with the fabs replaced by mov to preserve code structure * Add POWER implementation of ?sum as trivial copy of ?asum with the fabs replaced by fmr to preserve code structure * Add SPARC implementation of ?sum as trivial copy of ?asum with the fabs replaced by fmov to preserve code structure * Add x86 implementation of ?sum as trivial copy of ?asum with the fabs calls removed * Add x86_64 implementation of ?sum as trivial copy of ?asum with the fabs calls removed * Add ZARCH implementation of ?sum as trivial copies of the respective ?asum kernels with the ABS and vflpsb calls removed * Detect 32bit environment on 64bit ARM hardware for #2056, using same approach as #2058 * Add cmake defaults for ?sum kernels * Add ?sum * Add ?sum definitions for generic kernel * Add declarations for ?sum * Add -lm and disable EXPRECISION support on *BSD fixes #2075 * Add in runtime CPU detection for POWER. * snprintf define consolidated to common.h * Support INTERFACE64=1 * Add support for INTERFACE64 and fix XERBLA calls 1. Replaced all instances of "int" with "blasint" 2. Added string length as "hidden" third parameter in calls to fortran XERBLA * Correct length of name string in xerbla call * Avoid out-of-bounds accesses in LAPACK EIG tests see https://github.com/Reference-LAPACK/lapack/issues/333 * Correct INFO=4 condition * Disable reallocation of work array in xSYTRF as it appears to cause memory management problems (seen in the LAPACK tests) * Disable repeated recursion on Ab_BR in ReLAPACK xGBTRF due to crashes in LAPACK tests * sgemm/strmm * Update Changelog with changes from 0.3.6 * Increment version to 0.3.7.dev * Increment version to 0.3.7.dev * Misc. typo fixes Found via `codespell -q 3 -w -L ith,als,dum,nd,amin,nto,wis,ba -S ./relapack,./kernel,./lapack-netlib` * Correct argument of CPU_ISSET for glibc <2.5 fixes #2104 * conflict resolve * Revert reference/ fixes * Revert Changelog.txt typos * Disable the SkyLakeX DGEMMITCOPY kernel as well as a stopgap measure for https://github.com/numpy/numpy/issues/13401 as mentioned in #1955 * Disable DGEMMINCOPY as well for now #1955 * init * Fix errors in cpu enumeration with glibc 2.6 for #2114 * Change two http links to https Closes #2109 * remove redundant code #2113 * Set up CI with Azure Pipelines [skip ci] * TST: add native POWER8 to CI * add native POWER8 testing to Travis CI matrix with ppc64le os entry * Update link to IBM MASS library, update cpu support status * first try migrating one of the arm builds from travis * fix tabbing in azure commands * Update azure-pipelines.yml take out offending lines (although stolen from https://github.com/conda-forge/opencv-feedstock azure-pipelines fiie) * Update azure-pipelines.yml * Update azure-pipelines.yml * Update azure-pipelines.yml * Update azure-pipelines.yml * DOC: Add Azure CI status badge * Add ARMV6 build to azure CI setup (#2122) using aytekinar's Alpine image and docker script from the Travis setup [skip ci] * TST: Azure manylinux1 & clean-up * remove some of the steps & comments from the original Azure yml template * modify the trigger section to use develop since OpenBLAS primarily uses this branch; use the same batching behavior as downstream projects NumPy/ SciPy * remove Travis emulated ARMv6 gcc build because this now happens in Azure * use documented Ubuntu vmImage name for Azure and add in a manylinux1 test run to the matrix [skip appveyor] * Add NO_AFFINITY to available options on Linux, and set it to ON to match the gmake default. Fixes second part of #2114 * Replace ISMIN and ISAMIN kernels on all x86_64 platforms (#2125) * Mark iamax_sse.S as unsuitable for MIN due to issue #2116 * Use iamax.S rather than iamax_sse.S for ISMIN/ISAMIN on all x86_64 as workaround for #2116 * Move ARMv8 gcc build from Travis to Azure * Move ARMv8 gcc build from Travis to Azure * Update .travis.yml * Test drone CI * install make * remove sudo * Install gcc * Install perl * Install gfortran and add a clang job * gfortran->gcc-gfortran * Switch to ubuntu and parallel jobs * apt update * Fix typo * update yes * no need of gcc in clang build * Add a cmake build as well * Add cmake builds and print options * build without lapack on cmake * parallel build * See if ubuntu 19.04 fixes the ICE * Remove qemu armv8 builds * arm32 build * Fix typo * TST: add SkylakeX AVX512 CI test * adapt the C-level reproducer code for some recent SkylakeX AVX512 kernel issues, provided by Isuru Fernando and modified by Martin Kroeker, for usage in the utest suite * add an Intel SDE SkylakeX emulation utest run to the Azure CI matrix; a custom Docker build was required because Ubuntu image provided by Azure does not support AVX512VL instructions * Add option USE_LOCKING for single-threaded build with locking support for calling from concurrent threads * Add option USE_LOCKING for single-threaded build with locking support * Add option USE_LOCKING for SMP-like locking in USE_THREAD=0 builds * Add option USE_LOCKING but keep default settings intact * Remove unrelated change * Do not try ancient PGI hacks with recent versions of that compiler should fix #2139 * Build and run utests in any case, they do their own checks for fortran availability * Add softfp support in min/max kernels fix for #1912 * Revert "Add softfp support in min/max kernels" * Separate implementations of AMAX and IAMAX on arm As noted in #1912 and comment on #1942, the combined implementation happens to "do the right thing" on hardfp, but cannot return both value and index on softfp where they would have to share the return register * Ensure correct output for DAMAX with softfp * Use generic kernels for complex (I)AMAX to support softfp * improved zgemm power9 based on power8 * upload thread safety test folder * hook up c++ thread safety test (main Makefile) * add c++ thread test option to Makefile.rule * Document NO_AVX512 for #2151 * sgemm pipeline improved, zgemm rewritten without inner packs, ABI lxvx v20 fixed with vs52 * Fix detection of AVX512 capable compilers in getarch 21eda8b5 introduced a check in getarch.c to test if the compiler is capable of AVX512. This check currently fails, since the used __AVX2__ macro is only defined if getarch itself was compiled with AVX2/AVX512 support. Make sure this is the case by building getarch with -march=native on x86_64. It is only supposed to run on the build host anyway. * c_check: Unlink correct file * power9 zgemm ztrmm optimized * conflict resolve * Add gfortran workaround for ABI violations in LAPACKE for #2154 (see gcc bug 90329) * Add gfortran workaround for ABI violations for #2154 (see gcc bug 90329) * Add gfortran workaround for potential ABI violation for #2154 * Update fc.cmake * Remove any inadvertent use of -march=native from DYNAMIC_ARCH builds from #2143, -march=native precludes use of more specific options like -march=skylake-avx512 in individual kernels, and defeats the purpose of dynamic arch anyway. * Avoid unintentional activation of TLS code via USE_TLS=0 fixes #2149 * Do not force gcc options on non-gcc compilers fixes compile failure with pgi 18.10 as reported on OpenBLAS-users * Update Makefile.x86_64 * Zero ecx with a mov instruction PGI assembler does not like the initialization in the constraints. * Fix mov syntax * new sgemm 8x16 * Update dtrmm_kernel_16x4_power8.S * PGI compiler does not like -march=native * Fix build on FreeBSD/powerpc64. Signed-off-by: Piotr Kubaj <pkubaj@anongoth.pl> * Fix build for PPC970 on FreeBSD pt. 1 FreeBSD needs DCBT_ARG=0 as well. * Fix build for PPC970 on FreeBSD pt.2 FreeBSD needs those macros too. * cgemm/ctrmm power9 * Utest needs CBLAS but not necessarily FORTRAN * Add mingw builds to Appveyor config * Add getarch flags to disable AVX on x86 (and other small fixes to match Makefile behaviour) * Make disabling DYNAMIC_ARCH on unsupported systems work needs to be unset in the cache for the change to have any effect * Mingw32 needs leading underscore on object names (also copy BUNDERSCORE settings for FORTRAN from the corresponding Makefile)
7 years ago
rebase? (#1) * With the Intel compiler on Linux, prefer ifort for the final link step icc has known problems with mixed-language builds that ifort can handle just fine. Fixes #1956 * Rename operands to put lda on the input/output constraint list * Fix wrong constraints in inline assembly for #2009 * Fix inline assembly constraints rework indices to allow marking argument lda4 as input and output. For #2009 * Fix inline assembly constraints rework indices to allow marking argument lda as input and output. * Fix inline assembly constraints * Fix inline assembly constraints * Fix inline assembly constraints in Bulldozer TRSM kernels rework indices to allow marking i,as and bs as both input and output (marked operand n1 as well for simplicity). For #2009 * Correct range_n limiting same bug as seen in #1388, somehow missed in corresponding PR #1389 * Allow multithreading TRMV again revert workaround introduced for issue #1332 as the actual cause appears to be my incorrect fix from #1262 (see #1388) * Fix error introduced during cleanup * Reduce list of kernels in the dynamic arch build to make compilation complete reliably within the 1h limit again * init * move fix to right place * Fix missing -c option in AVX512 test * Fix AVX512 test always returning false due to missing compiler option * Make x86_32 imply NO_AVX2, NO_AVX512 in addition to NO_AVX fixes #2033 * Keep xcode8.3 for osx BINARY=32 build as xcode10 deprecated i386 * Make sure that AVX512 is disabled in 32bit builds for #2033 * Improve handling of NO_STATIC and NO_SHARED to avoid surprises from defining either as zero. Fixes #2035 by addressing some concerns from #1422 * init * address warning introed with #1814 et al * Restore locking optimizations for OpenMP case restore another accidentally dropped part of #1468 that was missed in #2004 to address performance regression reported in #1461 * HiSilicon tsv110 CPUs optimization branch add HiSilicon tsv110 CPUs optimization branch * add TARGET support for HiSilicon tsv110 CPUs * add TARGET support for HiSilicon tsv110 CPUs * add TARGET support for HiSilicon tsv110 CPUs * Fix module definition conflicts between LAPACK and ReLAPACK for #2043 * Do not compile in AVX512 check if AVX support is disabled xgetbv is function depends on NO_AVX being undefined - we could change that too, but that combo is unlikely to work anyway * ctest.c : add __POWERPC__ for PowerMac * Fix crash in sgemm SSE/nano kernel on x86_64 Fix bug #2047. Signed-off-by: Celelibi <celelibi@gmail.com> * param.h : enable defines for PPC970 on DarwinOS fixes: gemm.c: In function 'sgemm_': ../common_param.h:981:18: error: 'SGEMM_DEFAULT_P' undeclared (first use in this function) #define SGEMM_P SGEMM_DEFAULT_P ^ * common_power.h: force DCBT_ARG 0 on PPC970 Darwin without this, we see ../kernel/power/gemv_n.S:427:Parameter syntax error and many more similar entries that relates to this assembly command dcbt 8, r24, r18 this change makes the DCBT_ARG = 0 and openblas builds through to completion on PowerMac 970 Tests pass * Make TARGET=GENERIC compatible with DYNAMIC_ARCH=1 for issue #2048 * make DYNAMIC_ARCH=1 package work on TSV110. * make DYNAMIC_ARCH=1 package work on TSV110 * Add Intel Denverton for #2048 * Add Intel Denverton * Change 64-bit detection as explained in #2056 * Trivial typo fix as suggested in #2022 * Disable the AVX512 DGEMM kernel (again) Due to as yet unresolved errors seen in #1955 and #2029 * Use POSIX getenv on Cygwin The Windows-native GetEnvironmentVariable cannot be relied on, as Cygwin does not always copy environment variables set through Cygwin to the Windows environment block, particularly after fork(). * Fix for #2063: The DllMain used in Cygwin did not run the thread memory pool cleanup upon THREAD_DETACH which is needed when compiled with USE_TLS=1. * Also call CloseHandle on each thread, as well as on the event so as to not leak thread handles. * AIX asm syntax changes needed for shared object creation * power9 makefile. dgemm based on power8 kernel with following changes : 32x unrolled 16x4 kernel and 8x4 kernel using (lxv stxv butterfly rank1 update). improvement from 17 to 22-23gflops. dtrmm cases were added into dgemm itself * Expose CBLAS interfaces for I?MIN and I?MAX * Build CBLAS interfaces for I?MIN and I?MAX * Add declarations for ?sum and cblas_?sum * Add interface for ?sum (derived from ?asum) * Add ?sum * Add implementations of ssum/dsum and csum/zsum as trivial copies of asum/zsasum with the fabs calls replaced by fmov to preserve code structure * Add ARM implementations of ?sum (trivial copies of the respective ?asum with the fabs calls removed) * Add ARM64 implementations of ?sum as trivial copies of the respective ?asum kernels with the fabs calls removed * Add ia64 implementation of ?sum as trivial copy of asum with the fabs calls removed * Add MIPS implementation of ?sum as trivial copy of ?asum with the fabs calls removed * Add MIPS64 implementation of ?sum as trivial copy of ?asum with the fabs replaced by mov to preserve code structure * Add POWER implementation of ?sum as trivial copy of ?asum with the fabs replaced by fmr to preserve code structure * Add SPARC implementation of ?sum as trivial copy of ?asum with the fabs replaced by fmov to preserve code structure * Add x86 implementation of ?sum as trivial copy of ?asum with the fabs calls removed * Add x86_64 implementation of ?sum as trivial copy of ?asum with the fabs calls removed * Add ZARCH implementation of ?sum as trivial copies of the respective ?asum kernels with the ABS and vflpsb calls removed * Detect 32bit environment on 64bit ARM hardware for #2056, using same approach as #2058 * Add cmake defaults for ?sum kernels * Add ?sum * Add ?sum definitions for generic kernel * Add declarations for ?sum * Add -lm and disable EXPRECISION support on *BSD fixes #2075 * Add in runtime CPU detection for POWER. * snprintf define consolidated to common.h * Support INTERFACE64=1 * Add support for INTERFACE64 and fix XERBLA calls 1. Replaced all instances of "int" with "blasint" 2. Added string length as "hidden" third parameter in calls to fortran XERBLA * Correct length of name string in xerbla call * Avoid out-of-bounds accesses in LAPACK EIG tests see https://github.com/Reference-LAPACK/lapack/issues/333 * Correct INFO=4 condition * Disable reallocation of work array in xSYTRF as it appears to cause memory management problems (seen in the LAPACK tests) * Disable repeated recursion on Ab_BR in ReLAPACK xGBTRF due to crashes in LAPACK tests * sgemm/strmm * Update Changelog with changes from 0.3.6 * Increment version to 0.3.7.dev * Increment version to 0.3.7.dev * Misc. typo fixes Found via `codespell -q 3 -w -L ith,als,dum,nd,amin,nto,wis,ba -S ./relapack,./kernel,./lapack-netlib` * Correct argument of CPU_ISSET for glibc <2.5 fixes #2104 * conflict resolve * Revert reference/ fixes * Revert Changelog.txt typos * Disable the SkyLakeX DGEMMITCOPY kernel as well as a stopgap measure for https://github.com/numpy/numpy/issues/13401 as mentioned in #1955 * Disable DGEMMINCOPY as well for now #1955 * init * Fix errors in cpu enumeration with glibc 2.6 for #2114 * Change two http links to https Closes #2109 * remove redundant code #2113 * Set up CI with Azure Pipelines [skip ci] * TST: add native POWER8 to CI * add native POWER8 testing to Travis CI matrix with ppc64le os entry * Update link to IBM MASS library, update cpu support status * first try migrating one of the arm builds from travis * fix tabbing in azure commands * Update azure-pipelines.yml take out offending lines (although stolen from https://github.com/conda-forge/opencv-feedstock azure-pipelines fiie) * Update azure-pipelines.yml * Update azure-pipelines.yml * Update azure-pipelines.yml * Update azure-pipelines.yml * DOC: Add Azure CI status badge * Add ARMV6 build to azure CI setup (#2122) using aytekinar's Alpine image and docker script from the Travis setup [skip ci] * TST: Azure manylinux1 & clean-up * remove some of the steps & comments from the original Azure yml template * modify the trigger section to use develop since OpenBLAS primarily uses this branch; use the same batching behavior as downstream projects NumPy/ SciPy * remove Travis emulated ARMv6 gcc build because this now happens in Azure * use documented Ubuntu vmImage name for Azure and add in a manylinux1 test run to the matrix [skip appveyor] * Add NO_AFFINITY to available options on Linux, and set it to ON to match the gmake default. Fixes second part of #2114 * Replace ISMIN and ISAMIN kernels on all x86_64 platforms (#2125) * Mark iamax_sse.S as unsuitable for MIN due to issue #2116 * Use iamax.S rather than iamax_sse.S for ISMIN/ISAMIN on all x86_64 as workaround for #2116 * Move ARMv8 gcc build from Travis to Azure * Move ARMv8 gcc build from Travis to Azure * Update .travis.yml * Test drone CI * install make * remove sudo * Install gcc * Install perl * Install gfortran and add a clang job * gfortran->gcc-gfortran * Switch to ubuntu and parallel jobs * apt update * Fix typo * update yes * no need of gcc in clang build * Add a cmake build as well * Add cmake builds and print options * build without lapack on cmake * parallel build * See if ubuntu 19.04 fixes the ICE * Remove qemu armv8 builds * arm32 build * Fix typo * TST: add SkylakeX AVX512 CI test * adapt the C-level reproducer code for some recent SkylakeX AVX512 kernel issues, provided by Isuru Fernando and modified by Martin Kroeker, for usage in the utest suite * add an Intel SDE SkylakeX emulation utest run to the Azure CI matrix; a custom Docker build was required because Ubuntu image provided by Azure does not support AVX512VL instructions * Add option USE_LOCKING for single-threaded build with locking support for calling from concurrent threads * Add option USE_LOCKING for single-threaded build with locking support * Add option USE_LOCKING for SMP-like locking in USE_THREAD=0 builds * Add option USE_LOCKING but keep default settings intact * Remove unrelated change * Do not try ancient PGI hacks with recent versions of that compiler should fix #2139 * Build and run utests in any case, they do their own checks for fortran availability * Add softfp support in min/max kernels fix for #1912 * Revert "Add softfp support in min/max kernels" * Separate implementations of AMAX and IAMAX on arm As noted in #1912 and comment on #1942, the combined implementation happens to "do the right thing" on hardfp, but cannot return both value and index on softfp where they would have to share the return register * Ensure correct output for DAMAX with softfp * Use generic kernels for complex (I)AMAX to support softfp * improved zgemm power9 based on power8 * upload thread safety test folder * hook up c++ thread safety test (main Makefile) * add c++ thread test option to Makefile.rule * Document NO_AVX512 for #2151 * sgemm pipeline improved, zgemm rewritten without inner packs, ABI lxvx v20 fixed with vs52 * Fix detection of AVX512 capable compilers in getarch 21eda8b5 introduced a check in getarch.c to test if the compiler is capable of AVX512. This check currently fails, since the used __AVX2__ macro is only defined if getarch itself was compiled with AVX2/AVX512 support. Make sure this is the case by building getarch with -march=native on x86_64. It is only supposed to run on the build host anyway. * c_check: Unlink correct file * power9 zgemm ztrmm optimized * conflict resolve * Add gfortran workaround for ABI violations in LAPACKE for #2154 (see gcc bug 90329) * Add gfortran workaround for ABI violations for #2154 (see gcc bug 90329) * Add gfortran workaround for potential ABI violation for #2154 * Update fc.cmake * Remove any inadvertent use of -march=native from DYNAMIC_ARCH builds from #2143, -march=native precludes use of more specific options like -march=skylake-avx512 in individual kernels, and defeats the purpose of dynamic arch anyway. * Avoid unintentional activation of TLS code via USE_TLS=0 fixes #2149 * Do not force gcc options on non-gcc compilers fixes compile failure with pgi 18.10 as reported on OpenBLAS-users * Update Makefile.x86_64 * Zero ecx with a mov instruction PGI assembler does not like the initialization in the constraints. * Fix mov syntax * new sgemm 8x16 * Update dtrmm_kernel_16x4_power8.S * PGI compiler does not like -march=native * Fix build on FreeBSD/powerpc64. Signed-off-by: Piotr Kubaj <pkubaj@anongoth.pl> * Fix build for PPC970 on FreeBSD pt. 1 FreeBSD needs DCBT_ARG=0 as well. * Fix build for PPC970 on FreeBSD pt.2 FreeBSD needs those macros too. * cgemm/ctrmm power9 * Utest needs CBLAS but not necessarily FORTRAN * Add mingw builds to Appveyor config * Add getarch flags to disable AVX on x86 (and other small fixes to match Makefile behaviour) * Make disabling DYNAMIC_ARCH on unsupported systems work needs to be unset in the cache for the change to have any effect * Mingw32 needs leading underscore on object names (also copy BUNDERSCORE settings for FORTRAN from the corresponding Makefile)
7 years ago
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  1. /*********************************************************************/
  2. /* Copyright 2009, 2010 The University of Texas at Austin. */
  3. /* All rights reserved. */
  4. /* */
  5. /* Redistribution and use in source and binary forms, with or */
  6. /* without modification, are permitted provided that the following */
  7. /* conditions are met: */
  8. /* */
  9. /* 1. Redistributions of source code must retain the above */
  10. /* copyright notice, this list of conditions and the following */
  11. /* disclaimer. */
  12. /* */
  13. /* 2. Redistributions in binary form must reproduce the above */
  14. /* copyright notice, this list of conditions and the following */
  15. /* disclaimer in the documentation and/or other materials */
  16. /* provided with the distribution. */
  17. /* */
  18. /* THIS SOFTWARE IS PROVIDED BY THE UNIVERSITY OF TEXAS AT */
  19. /* AUSTIN ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, */
  20. /* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF */
  21. /* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE */
  22. /* DISCLAIMED. IN NO EVENT SHALL THE UNIVERSITY OF TEXAS AT */
  23. /* AUSTIN OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, */
  24. /* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES */
  25. /* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE */
  26. /* GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR */
  27. /* BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF */
  28. /* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT */
  29. /* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT */
  30. /* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE */
  31. /* POSSIBILITY OF SUCH DAMAGE. */
  32. /* */
  33. /* The views and conclusions contained in the software and */
  34. /* documentation are those of the authors and should not be */
  35. /* interpreted as representing official policies, either expressed */
  36. /* or implied, of The University of Texas at Austin. */
  37. /*********************************************************************/
  38. #define ASSEMBLER
  39. #include "common.h"
  40. #ifndef __64BIT__
  41. #define LOAD lwz
  42. #else
  43. #define LOAD ld
  44. #endif
  45. #ifdef __64BIT__
  46. #define STACKSIZE 320
  47. #define ALPHA 296(SP)
  48. #define FZERO 304(SP)
  49. #else
  50. #define STACKSIZE 240
  51. #define ALPHA 224(SP)
  52. #define FZERO 232(SP)
  53. #endif
  54. #define M r3
  55. #define N r4
  56. #define K r5
  57. #if defined(linux) || defined(__FreeBSD__)
  58. #ifndef __64BIT__
  59. #define A r6
  60. #define B r7
  61. #define C r8
  62. #define LDC r9
  63. #define OFFSET r10
  64. #else
  65. #define A r7
  66. #define B r8
  67. #define C r9
  68. #define LDC r10
  69. #define OFFSET r6
  70. #endif
  71. #endif
  72. #if defined(_AIX) || defined(__APPLE__)
  73. #if !defined(__64BIT__) && defined(DOUBLE)
  74. #define A r8
  75. #define B r9
  76. #define C r10
  77. #define LDC r7
  78. #define OFFSET r6
  79. #else
  80. #define A r7
  81. #define B r8
  82. #define C r9
  83. #define LDC r10
  84. #define OFFSET r6
  85. #endif
  86. #endif
  87. #define AORIG r18
  88. #define TEMP r19
  89. #define KK r20
  90. #define I r21
  91. #define J r22
  92. #define AO r23
  93. #define BO r24
  94. #define CO1 r25
  95. #define CO2 r26
  96. #define CO3 r27
  97. #define CO4 r28
  98. #define PREA r29
  99. #define PREC r30
  100. PROLOGUE
  101. PROFCODE
  102. addi SP, SP, -STACKSIZE
  103. li r0, 0
  104. stfd f14, 0(SP)
  105. stfd f15, 8(SP)
  106. stfd f16, 16(SP)
  107. stfd f17, 24(SP)
  108. stfd f18, 32(SP)
  109. stfd f19, 40(SP)
  110. stfd f20, 48(SP)
  111. stfd f21, 56(SP)
  112. stfd f22, 64(SP)
  113. stfd f23, 72(SP)
  114. stfd f24, 80(SP)
  115. stfd f25, 88(SP)
  116. stfd f26, 96(SP)
  117. stfd f27, 104(SP)
  118. stfd f28, 112(SP)
  119. stfd f29, 120(SP)
  120. stfd f30, 128(SP)
  121. stfd f31, 136(SP)
  122. #ifdef __64BIT__
  123. std r31, 144(SP)
  124. std r30, 152(SP)
  125. std r29, 160(SP)
  126. std r28, 168(SP)
  127. std r27, 176(SP)
  128. std r26, 184(SP)
  129. std r25, 192(SP)
  130. std r24, 200(SP)
  131. std r23, 208(SP)
  132. std r22, 216(SP)
  133. std r21, 224(SP)
  134. std r20, 232(SP)
  135. #if defined(TRMMKERNEL)
  136. std r19, 240(SP)
  137. std r18, 248(SP)
  138. #endif
  139. #else
  140. stw r31, 144(SP)
  141. stw r30, 148(SP)
  142. stw r29, 152(SP)
  143. stw r28, 156(SP)
  144. stw r27, 160(SP)
  145. stw r26, 164(SP)
  146. stw r25, 168(SP)
  147. stw r24, 172(SP)
  148. stw r23, 176(SP)
  149. stw r22, 180(SP)
  150. stw r21, 184(SP)
  151. stw r20, 188(SP)
  152. #if defined(TRMMKERNEL)
  153. stw r19, 192(SP)
  154. stw r18, 196(SP)
  155. #endif
  156. #endif
  157. stfd f1, ALPHA
  158. stw r0, FZERO
  159. #if defined(_AIX) || defined(__APPLE__)
  160. #if !defined(__64BIT__) && defined(DOUBLE)
  161. lwz LDC, FRAMESLOT(0) + STACKSIZE(SP)
  162. #endif
  163. #endif
  164. slwi LDC, LDC, BASE_SHIFT
  165. #if defined(TRMMKERNEL)
  166. #if (defined(linux) || defined(__FreeBSD__)) && defined(__64BIT__)
  167. ld OFFSET, FRAMESLOT(0) + STACKSIZE(SP)
  168. #endif
  169. #if defined(_AIX) || defined(__APPLE__)
  170. #ifdef __64BIT__
  171. ld OFFSET, FRAMESLOT(0) + STACKSIZE(SP)
  172. #else
  173. #ifdef DOUBLE
  174. lwz OFFSET, FRAMESLOT(1) + STACKSIZE(SP)
  175. #else
  176. lwz OFFSET, FRAMESLOT(0) + STACKSIZE(SP)
  177. #endif
  178. #endif
  179. #endif
  180. #endif
  181. #if defined(TRMMKERNEL) && !defined(LEFT)
  182. neg KK, OFFSET
  183. #endif
  184. li PREA, 8 * 8 * SIZE
  185. li PREC, 3 * SIZE
  186. cmpwi cr0, M, 0
  187. ble .L999
  188. cmpwi cr0, N, 0
  189. ble .L999
  190. cmpwi cr0, K, 0
  191. ble .L999
  192. srawi. J, N, 2
  193. ble .L40
  194. .align 4
  195. #define A1 f16
  196. #define A2 f17
  197. #define A3 f18
  198. #define A4 f19
  199. #define A5 f20
  200. #define A6 f21
  201. #define B1 f22
  202. #define B2 f23
  203. #define B3 f24
  204. #define B4 f25
  205. #define B5 f26
  206. #define B6 f27
  207. #define B7 f28
  208. #define B8 f29
  209. #define B9 f30
  210. #define B10 f31
  211. .L10:
  212. mr CO1, C
  213. add CO2, C, LDC
  214. add CO3, CO2, LDC
  215. add CO4, CO3, LDC
  216. #if defined(TRMMKERNEL) && defined(LEFT)
  217. mr KK, OFFSET
  218. #endif
  219. lfs f0, FZERO
  220. fmr f1, f0
  221. fmr f2, f0
  222. fmr f3, f0
  223. fmr f4, f0
  224. fmr f5, f0
  225. fmr f6, f0
  226. fmr f7, f0
  227. fmr f8, f0
  228. fmr f9, f0
  229. fmr f10, f0
  230. fmr f11, f0
  231. fmr f12, f0
  232. fmr f13, f0
  233. fmr f14, f0
  234. fmr f15, f0
  235. srawi. I, M, 2
  236. mr AO, A
  237. add C, CO4, LDC
  238. ble .L20
  239. .align 4
  240. .L11:
  241. #if defined(TRMMKERNEL)
  242. #if (defined(LEFT) && defined(TRANSA)) || (!defined(LEFT) && !defined(TRANSA))
  243. LFD A1, 0 * SIZE(AO)
  244. LFD A2, 1 * SIZE(AO)
  245. LFD A3, 2 * SIZE(AO)
  246. LFDU A5, 4 * SIZE(AO)
  247. LFD B1, 0 * SIZE(B)
  248. LFD B2, 1 * SIZE(B)
  249. LFD B3, 2 * SIZE(B)
  250. LFD B4, 3 * SIZE(B)
  251. mr BO, B
  252. #else
  253. slwi r0, KK, 2 + BASE_SHIFT
  254. add AO, AO, r0
  255. add BO, B, r0
  256. LFD A1, 0 * SIZE(AO)
  257. LFD A2, 1 * SIZE(AO)
  258. LFD A3, 2 * SIZE(AO)
  259. LFDU A5, 4 * SIZE(AO)
  260. LFD B1, 0 * SIZE(BO)
  261. LFD B2, 1 * SIZE(BO)
  262. LFD B3, 2 * SIZE(BO)
  263. LFD B4, 3 * SIZE(BO)
  264. #endif
  265. dcbtst CO1, PREC
  266. dcbtst CO2, PREC
  267. dcbtst CO3, PREC
  268. dcbtst CO4, PREC
  269. #if (defined(LEFT) && !defined(TRANSA)) || (!defined(LEFT) && defined(TRANSA))
  270. sub TEMP, K, KK
  271. #elif defined(LEFT)
  272. addi TEMP, KK, 4
  273. #else
  274. addi TEMP, KK, 4
  275. #endif
  276. srawi. TEMP, TEMP, 1
  277. mtspr CTR, TEMP
  278. ble .L15
  279. #else
  280. LFD A1, 0 * SIZE(AO)
  281. LFD A2, 1 * SIZE(AO)
  282. LFD A3, 2 * SIZE(AO)
  283. LFDU A5, 4 * SIZE(AO)
  284. LFD B1, 0 * SIZE(B)
  285. LFD B2, 1 * SIZE(B)
  286. LFD B3, 2 * SIZE(B)
  287. LFD B4, 3 * SIZE(B)
  288. dcbtst CO1, PREC
  289. dcbtst CO2, PREC
  290. dcbtst CO3, PREC
  291. dcbtst CO4, PREC
  292. srawi. r0, K, 1
  293. mtspr CTR, r0
  294. mr BO, B
  295. ble .L15
  296. #endif
  297. .align 4
  298. .L12:
  299. FMADD f0, A1, B1, f0
  300. LFDU B5, 4 * SIZE(BO)
  301. FMADD f4, A1, B2, f4
  302. dcbt AO, PREA
  303. FMADD f8, A1, B3, f8
  304. LFD A4, -1 * SIZE(AO)
  305. FMADD f12, A1, B4, f12
  306. dcbt BO, PREA
  307. FMADD f1, A2, B1, f1
  308. LFD B6, 1 * SIZE(BO)
  309. FMADD f5, A2, B2, f5
  310. nop
  311. FMADD f9, A2, B3, f9
  312. LFDU A1, 4 * SIZE(AO)
  313. FMADD f13, A2, B4, f13
  314. nop
  315. FMADD f2, A3, B1, f2
  316. LFD B7, 2 * SIZE(BO)
  317. FMADD f6, A3, B2, f6
  318. nop
  319. FMADD f10, A3, B3, f10
  320. LFD A2, -3 * SIZE(AO)
  321. FMADD f14, A3, B4, f14
  322. nop
  323. FMADD f3, A4, B1, f3
  324. LFD B8, 3 * SIZE(BO)
  325. FMADD f7, A4, B2, f7
  326. nop
  327. FMADD f11, A4, B3, f11
  328. LFD A3, -2 * SIZE(AO)
  329. FMADD f15, A4, B4, f15
  330. nop
  331. FMADD f0, A5, B5, f0
  332. LFDU B1, 4 * SIZE(BO)
  333. FMADD f4, A5, B6, f4
  334. nop
  335. FMADD f8, A5, B7, f8
  336. LFD A4, -1 * SIZE(AO)
  337. FMADD f12, A5, B8, f12
  338. #ifdef DOUBLE
  339. dcbt BO, PREA
  340. #else
  341. nop
  342. #endif
  343. FMADD f1, A2, B5, f1
  344. LFD B2, 1 * SIZE(BO)
  345. FMADD f5, A2, B6, f5
  346. nop
  347. FMADD f9, A2, B7, f9
  348. LFDU A5, 4 * SIZE(AO)
  349. FMADD f13, A2, B8, f13
  350. #ifdef DOUBLE
  351. dcbt AO, PREA
  352. #else
  353. nop
  354. #endif
  355. FMADD f2, A3, B5, f2
  356. LFD B3, 2 * SIZE(BO)
  357. FMADD f6, A3, B6, f6
  358. nop
  359. FMADD f10, A3, B7, f10
  360. LFD A2, -3 * SIZE(AO)
  361. FMADD f14, A3, B8, f14
  362. nop
  363. FMADD f3, A4, B5, f3
  364. LFD B4, 3 * SIZE(BO)
  365. FMADD f7, A4, B6, f7
  366. nop
  367. FMADD f11, A4, B7, f11
  368. LFD A3, -2 * SIZE(AO)
  369. FMADD f15, A4, B8, f15
  370. bdnz .L12
  371. .align 4
  372. .L15:
  373. addi AO, AO, -4 * SIZE
  374. lfd f30, ALPHA
  375. #if defined(TRMMKERNEL)
  376. #if (defined(LEFT) && !defined(TRANSA)) || (!defined(LEFT) && defined(TRANSA))
  377. sub TEMP, K, KK
  378. #elif defined(LEFT)
  379. addi TEMP, KK, 4
  380. #else
  381. addi TEMP, KK, 4
  382. #endif
  383. andi. TEMP, TEMP, 1
  384. #else
  385. andi. r0, K, 1
  386. #endif
  387. ble+ .L18
  388. .L16:
  389. LFD A4, 3 * SIZE(AO)
  390. FMADD f0, A1, B1, f0
  391. FMADD f4, A1, B2, f4
  392. FMADD f8, A1, B3, f8
  393. FMADD f12, A1, B4, f12
  394. FMADD f1, A2, B1, f1
  395. FMADD f5, A2, B2, f5
  396. FMADD f9, A2, B3, f9
  397. FMADD f13, A2, B4, f13
  398. FMADD f2, A3, B1, f2
  399. FMADD f6, A3, B2, f6
  400. FMADD f10, A3, B3, f10
  401. FMADD f14, A3, B4, f14
  402. FMADD f3, A4, B1, f3
  403. FMADD f7, A4, B2, f7
  404. FMADD f11, A4, B3, f11
  405. FMADD f15, A4, B4, f15
  406. addi AO, AO, 4 * SIZE
  407. addi BO, BO, 4 * SIZE
  408. .align 4
  409. .L18:
  410. #ifndef TRMMKERNEL
  411. LFD f16, 0 * SIZE(CO1)
  412. LFD f17, 1 * SIZE(CO1)
  413. LFD f18, 2 * SIZE(CO1)
  414. LFD f19, 3 * SIZE(CO1)
  415. LFD f20, 0 * SIZE(CO2)
  416. LFD f21, 1 * SIZE(CO2)
  417. LFD f22, 2 * SIZE(CO2)
  418. LFD f23, 3 * SIZE(CO2)
  419. FMADD f0, f0, f30, f16
  420. LFD f16, 0 * SIZE(CO3)
  421. FMADD f1, f1, f30, f17
  422. LFD f17, 1 * SIZE(CO3)
  423. FMADD f2, f2, f30, f18
  424. LFD f18, 2 * SIZE(CO3)
  425. FMADD f3, f3, f30, f19
  426. LFD f19, 3 * SIZE(CO3)
  427. FMADD f4, f4, f30, f20
  428. LFD f20, 0 * SIZE(CO4)
  429. FMADD f5, f5, f30, f21
  430. LFD f21, 1 * SIZE(CO4)
  431. FMADD f6, f6, f30, f22
  432. LFD f22, 2 * SIZE(CO4)
  433. FMADD f7, f7, f30, f23
  434. LFD f23, 3 * SIZE(CO4)
  435. FMADD f8, f8, f30, f16
  436. FMADD f9, f9, f30, f17
  437. FMADD f10, f10, f30, f18
  438. FMADD f11, f11, f30, f19
  439. FMADD f12, f12, f30, f20
  440. FMADD f13, f13, f30, f21
  441. FMADD f14, f14, f30, f22
  442. FMADD f15, f15, f30, f23
  443. #else
  444. FMUL f0, f0, f30
  445. FMUL f1, f1, f30
  446. FMUL f2, f2, f30
  447. FMUL f3, f3, f30
  448. FMUL f4, f4, f30
  449. FMUL f5, f5, f30
  450. FMUL f6, f6, f30
  451. FMUL f7, f7, f30
  452. FMUL f8, f8, f30
  453. FMUL f9, f9, f30
  454. FMUL f10, f10, f30
  455. FMUL f11, f11, f30
  456. FMUL f12, f12, f30
  457. FMUL f13, f13, f30
  458. FMUL f14, f14, f30
  459. FMUL f15, f15, f30
  460. #endif
  461. STFD f0, 0 * SIZE(CO1)
  462. STFD f1, 1 * SIZE(CO1)
  463. STFD f2, 2 * SIZE(CO1)
  464. STFD f3, 3 * SIZE(CO1)
  465. lfs f0, FZERO
  466. fmr f1, f0
  467. fmr f2, f0
  468. fmr f3, f0
  469. STFD f4, 0 * SIZE(CO2)
  470. fmr f4, f0
  471. STFD f5, 1 * SIZE(CO2)
  472. fmr f5, f0
  473. STFD f6, 2 * SIZE(CO2)
  474. fmr f6, f0
  475. STFD f7, 3 * SIZE(CO2)
  476. fmr f7, f0
  477. STFD f8, 0 * SIZE(CO3)
  478. fmr f8, f0
  479. STFD f9, 1 * SIZE(CO3)
  480. fmr f9, f0
  481. STFD f10, 2 * SIZE(CO3)
  482. fmr f10, f0
  483. STFD f11, 3 * SIZE(CO3)
  484. fmr f11, f0
  485. STFD f12, 0 * SIZE(CO4)
  486. fmr f12, f0
  487. STFD f13, 1 * SIZE(CO4)
  488. fmr f13, f0
  489. STFD f14, 2 * SIZE(CO4)
  490. fmr f14, f0
  491. STFD f15, 3 * SIZE(CO4)
  492. fmr f15, f0
  493. addi CO1, CO1, 4 * SIZE
  494. addi CO2, CO2, 4 * SIZE
  495. addi CO3, CO3, 4 * SIZE
  496. addi CO4, CO4, 4 * SIZE
  497. #ifdef TRMMKERNEL
  498. #if ( defined(LEFT) && defined(TRANSA)) || \
  499. (!defined(LEFT) && !defined(TRANSA))
  500. sub TEMP, K, KK
  501. #ifdef LEFT
  502. addi TEMP, TEMP, -4
  503. #else
  504. addi TEMP, TEMP, -4
  505. #endif
  506. slwi TEMP, TEMP, 2 + BASE_SHIFT
  507. add AO, AO, TEMP
  508. add BO, BO, TEMP
  509. #endif
  510. #ifdef LEFT
  511. addi KK, KK, 4
  512. #endif
  513. #endif
  514. addic. I, I, -1
  515. bgt+ .L11
  516. .align 4
  517. .L20:
  518. andi. I, M, 2
  519. ble .L30
  520. #if defined(TRMMKERNEL)
  521. #if ( defined(LEFT) && defined(TRANSA)) || (!defined(LEFT) && !defined(TRANSA))
  522. LFD f16, 0 * SIZE(AO)
  523. LFD f17, 1 * SIZE(AO)
  524. LFD f18, 2 * SIZE(AO)
  525. LFD f19, 3 * SIZE(AO)
  526. LFD f20, 0 * SIZE(B)
  527. LFD f21, 1 * SIZE(B)
  528. LFD f22, 2 * SIZE(B)
  529. LFD f23, 3 * SIZE(B)
  530. LFD f24, 4 * SIZE(B)
  531. LFD f25, 5 * SIZE(B)
  532. LFD f26, 6 * SIZE(B)
  533. LFD f27, 7 * SIZE(B)
  534. mr BO, B
  535. #else
  536. slwi r0, KK, 1 + BASE_SHIFT
  537. slwi TEMP, KK, 2 + BASE_SHIFT
  538. add AO, AO, r0
  539. add BO, B, TEMP
  540. LFD f16, 0 * SIZE(AO)
  541. LFD f17, 1 * SIZE(AO)
  542. LFD f18, 2 * SIZE(AO)
  543. LFD f19, 3 * SIZE(AO)
  544. LFD f20, 0 * SIZE(BO)
  545. LFD f21, 1 * SIZE(BO)
  546. LFD f22, 2 * SIZE(BO)
  547. LFD f23, 3 * SIZE(BO)
  548. LFD f24, 4 * SIZE(BO)
  549. LFD f25, 5 * SIZE(BO)
  550. LFD f26, 6 * SIZE(BO)
  551. LFD f27, 7 * SIZE(BO)
  552. #endif
  553. #if (defined(LEFT) && !defined(TRANSA)) || (!defined(LEFT) && defined(TRANSA))
  554. sub TEMP, K, KK
  555. #elif defined(LEFT)
  556. addi TEMP, KK, 2
  557. #else
  558. addi TEMP, KK, 4
  559. #endif
  560. srawi. TEMP, TEMP, 2
  561. mtspr CTR, TEMP
  562. #else
  563. LFD f16, 0 * SIZE(AO)
  564. LFD f17, 1 * SIZE(AO)
  565. LFD f18, 2 * SIZE(AO)
  566. LFD f19, 3 * SIZE(AO)
  567. LFD f20, 0 * SIZE(B)
  568. LFD f21, 1 * SIZE(B)
  569. LFD f22, 2 * SIZE(B)
  570. LFD f23, 3 * SIZE(B)
  571. LFD f24, 4 * SIZE(B)
  572. LFD f25, 5 * SIZE(B)
  573. LFD f26, 6 * SIZE(B)
  574. LFD f27, 7 * SIZE(B)
  575. srawi. r0, K, 2
  576. mtspr CTR, r0
  577. mr BO, B
  578. #endif
  579. ble .L25
  580. .align 5
  581. .L22:
  582. FMADD f0, f16, f20, f0
  583. nop
  584. FMADD f1, f17, f20, f1
  585. LFD f20, 8 * SIZE(BO)
  586. FMADD f4, f16, f21, f4
  587. nop
  588. FMADD f5, f17, f21, f5
  589. LFD f21, 9 * SIZE(BO)
  590. FMADD f8, f16, f22, f8
  591. nop
  592. FMADD f9, f17, f22, f9
  593. LFD f22, 10 * SIZE(BO)
  594. FMADD f12, f16, f23, f12
  595. LFD f16, 4 * SIZE(AO)
  596. FMADD f13, f17, f23, f13
  597. LFD f23, 11 * SIZE(BO)
  598. FMADD f2, f18, f24, f2
  599. LFD f17, 5 * SIZE(AO)
  600. FMADD f3, f19, f24, f3
  601. LFD f24, 12 * SIZE(BO)
  602. FMADD f6, f18, f25, f6
  603. nop
  604. FMADD f7, f19, f25, f7
  605. LFD f25, 13 * SIZE(BO)
  606. FMADD f10, f18, f26, f10
  607. nop
  608. FMADD f11, f19, f26, f11
  609. LFD f26, 14 * SIZE(BO)
  610. FMADD f14, f18, f27, f14
  611. LFD f18, 6 * SIZE(AO)
  612. FMADD f15, f19, f27, f15
  613. LFD f27, 15 * SIZE(BO)
  614. FMADD f0, f16, f20, f0
  615. LFD f19, 7 * SIZE(AO)
  616. FMADD f1, f17, f20, f1
  617. LFDU f20, 16 * SIZE(BO)
  618. FMADD f4, f16, f21, f4
  619. nop
  620. FMADD f5, f17, f21, f5
  621. LFD f21, 1 * SIZE(BO)
  622. FMADD f8, f16, f22, f8
  623. nop
  624. FMADD f9, f17, f22, f9
  625. LFD f22, 2 * SIZE(BO)
  626. FMADD f12, f16, f23, f12
  627. LFDU f16, 8 * SIZE(AO)
  628. FMADD f13, f17, f23, f13
  629. LFD f23, 3 * SIZE(BO)
  630. FMADD f2, f18, f24, f2
  631. LFD f17, 1 * SIZE(AO)
  632. FMADD f3, f19, f24, f3
  633. LFD f24, 4 * SIZE(BO)
  634. FMADD f6, f18, f25, f6
  635. nop
  636. FMADD f7, f19, f25, f7
  637. LFD f25, 5 * SIZE(BO)
  638. FMADD f10, f18, f26, f10
  639. nop
  640. FMADD f11, f19, f26, f11
  641. LFD f26, 6 * SIZE(BO)
  642. FMADD f14, f18, f27, f14
  643. LFD f18, 2 * SIZE(AO)
  644. FMADD f15, f19, f27, f15
  645. LFD f19, 3 * SIZE(AO)
  646. LFD f27, 7 * SIZE(BO)
  647. bdnz .L22
  648. fadd f0, f2, f0
  649. fadd f1, f3, f1
  650. fadd f4, f6, f4
  651. fadd f5, f7, f5
  652. fadd f8, f10, f8
  653. fadd f9, f11, f9
  654. fadd f12, f14, f12
  655. fadd f13, f15, f13
  656. .align 4
  657. .L25:
  658. lfd f30, ALPHA
  659. #if defined(TRMMKERNEL)
  660. #if (defined(LEFT) && !defined(TRANSA)) || (!defined(LEFT) && defined(TRANSA))
  661. sub TEMP, K, KK
  662. #elif defined(LEFT)
  663. addi TEMP, KK, 2
  664. #else
  665. addi TEMP, KK, 4
  666. #endif
  667. andi. TEMP, TEMP, 3
  668. mtspr CTR, TEMP
  669. #else
  670. andi. r0, K, 3
  671. mtspr CTR, r0
  672. #endif
  673. ble+ .L28
  674. .align 4
  675. .L26:
  676. FMADD f0, f16, f20, f0
  677. nop
  678. FMADD f1, f17, f20, f1
  679. LFDU f20, 4 * SIZE(BO)
  680. FMADD f4, f16, f21, f4
  681. nop
  682. FMADD f5, f17, f21, f5
  683. LFD f21, 1 * SIZE(BO)
  684. FMADD f8, f16, f22, f8
  685. nop
  686. FMADD f9, f17, f22, f9
  687. LFD f22, 2 * SIZE(BO)
  688. FMADD f12, f16, f23, f12
  689. LFDU f16, 2 * SIZE(AO)
  690. FMADD f13, f17, f23, f13
  691. LFD f17, 1 * SIZE(AO)
  692. LFD f23, 3 * SIZE(BO)
  693. bdnz .L26
  694. .align 4
  695. .L28:
  696. #ifndef TRMMKERNEL
  697. LFD f16, 0 * SIZE(CO1)
  698. LFD f17, 1 * SIZE(CO1)
  699. LFD f18, 0 * SIZE(CO2)
  700. LFD f19, 1 * SIZE(CO2)
  701. FMADD f0, f0, f30, f16
  702. FMADD f1, f1, f30, f17
  703. FMADD f4, f4, f30, f18
  704. FMADD f5, f5, f30, f19
  705. LFD f20, 0 * SIZE(CO3)
  706. LFD f21, 1 * SIZE(CO3)
  707. LFD f22, 0 * SIZE(CO4)
  708. LFD f23, 1 * SIZE(CO4)
  709. FMADD f8, f8, f30, f20
  710. FMADD f9, f9, f30, f21
  711. FMADD f12, f12, f30, f22
  712. FMADD f13, f13, f30, f23
  713. #else
  714. FMUL f0, f0, f30
  715. FMUL f1, f1, f30
  716. FMUL f4, f4, f30
  717. FMUL f5, f5, f30
  718. FMUL f8, f8, f30
  719. FMUL f9, f9, f30
  720. FMUL f12, f12, f30
  721. FMUL f13, f13, f30
  722. #endif
  723. STFD f0, 0 * SIZE(CO1)
  724. STFD f1, 1 * SIZE(CO1)
  725. STFD f4, 0 * SIZE(CO2)
  726. STFD f5, 1 * SIZE(CO2)
  727. lfs f0, FZERO
  728. fmr f1, f0
  729. fmr f2, f0
  730. fmr f3, f0
  731. STFD f8, 0 * SIZE(CO3)
  732. STFD f9, 1 * SIZE(CO3)
  733. STFD f12, 0 * SIZE(CO4)
  734. STFD f13, 1 * SIZE(CO4)
  735. fmr f4, f0
  736. fmr f5, f0
  737. fmr f6, f0
  738. fmr f7, f0
  739. fmr f8, f0
  740. fmr f9, f0
  741. fmr f10, f0
  742. fmr f11, f0
  743. fmr f12, f0
  744. fmr f13, f0
  745. fmr f14, f0
  746. fmr f15, f0
  747. addi CO1, CO1, 2 * SIZE
  748. addi CO2, CO2, 2 * SIZE
  749. addi CO3, CO3, 2 * SIZE
  750. addi CO4, CO4, 2 * SIZE
  751. #ifdef TRMMKERNEL
  752. #if ( defined(LEFT) && defined(TRANSA)) || \
  753. (!defined(LEFT) && !defined(TRANSA))
  754. sub TEMP, K, KK
  755. #ifdef LEFT
  756. addi TEMP, TEMP, -2
  757. #else
  758. addi TEMP, TEMP, -4
  759. #endif
  760. slwi r0, TEMP, 1 + BASE_SHIFT
  761. slwi TEMP, TEMP, 2 + BASE_SHIFT
  762. add AO, AO, r0
  763. add BO, BO, TEMP
  764. #endif
  765. #ifdef LEFT
  766. addi KK, KK, 2
  767. #endif
  768. #endif
  769. .align 4
  770. .L30:
  771. andi. I, M, 1
  772. ble .L39
  773. #if defined(TRMMKERNEL)
  774. #if (defined(LEFT) && defined(TRANSA)) || (!defined(LEFT) && !defined(TRANSA))
  775. LFD f16, 0 * SIZE(AO)
  776. LFD f17, 1 * SIZE(AO)
  777. LFD f18, 2 * SIZE(AO)
  778. LFD f19, 3 * SIZE(AO)
  779. LFD f20, 0 * SIZE(B)
  780. LFD f21, 1 * SIZE(B)
  781. LFD f22, 2 * SIZE(B)
  782. LFD f23, 3 * SIZE(B)
  783. LFD f24, 4 * SIZE(B)
  784. LFD f25, 5 * SIZE(B)
  785. LFD f26, 6 * SIZE(B)
  786. LFD f27, 7 * SIZE(B)
  787. mr BO, B
  788. #else
  789. slwi r0, KK, 0 + BASE_SHIFT
  790. slwi TEMP, KK, 2 + BASE_SHIFT
  791. add AO, AO, r0
  792. add BO, B, TEMP
  793. LFD f16, 0 * SIZE(AO)
  794. LFD f17, 1 * SIZE(AO)
  795. LFD f18, 2 * SIZE(AO)
  796. LFD f19, 3 * SIZE(AO)
  797. LFD f20, 0 * SIZE(BO)
  798. LFD f21, 1 * SIZE(BO)
  799. LFD f22, 2 * SIZE(BO)
  800. LFD f23, 3 * SIZE(BO)
  801. LFD f24, 4 * SIZE(BO)
  802. LFD f25, 5 * SIZE(BO)
  803. LFD f26, 6 * SIZE(BO)
  804. LFD f27, 7 * SIZE(BO)
  805. #endif
  806. #if (defined(LEFT) && !defined(TRANSA)) || (!defined(LEFT) && defined(TRANSA))
  807. sub TEMP, K, KK
  808. #elif defined(LEFT)
  809. addi TEMP, KK, 1
  810. #else
  811. addi TEMP, KK, 4
  812. #endif
  813. srawi. TEMP, TEMP, 2
  814. mtspr CTR, TEMP
  815. #else
  816. LFD f16, 0 * SIZE(AO)
  817. LFD f17, 1 * SIZE(AO)
  818. LFD f18, 2 * SIZE(AO)
  819. LFD f19, 3 * SIZE(AO)
  820. LFD f20, 0 * SIZE(B)
  821. LFD f21, 1 * SIZE(B)
  822. LFD f22, 2 * SIZE(B)
  823. LFD f23, 3 * SIZE(B)
  824. LFD f24, 4 * SIZE(B)
  825. LFD f25, 5 * SIZE(B)
  826. LFD f26, 6 * SIZE(B)
  827. LFD f27, 7 * SIZE(B)
  828. srawi. r0, K, 2
  829. mtspr CTR, r0
  830. mr BO, B
  831. #endif
  832. ble .L35
  833. .align 5
  834. .L32:
  835. FMADD f0, f16, f20, f0
  836. LFD f20, 8 * SIZE(BO)
  837. FMADD f4, f16, f21, f4
  838. LFD f21, 9 * SIZE(BO)
  839. FMADD f8, f16, f22, f8
  840. LFD f22, 10 * SIZE(BO)
  841. FMADD f12, f16, f23, f12
  842. LFD f23, 11 * SIZE(BO)
  843. LFDU f16, 4 * SIZE(AO)
  844. FMADD f1, f17, f24, f1
  845. LFD f24, 12 * SIZE(BO)
  846. FMADD f5, f17, f25, f5
  847. LFD f25, 13 * SIZE(BO)
  848. FMADD f9, f17, f26, f9
  849. LFD f26, 14 * SIZE(BO)
  850. FMADD f13, f17, f27, f13
  851. LFD f27, 15 * SIZE(BO)
  852. LFD f17, 1 * SIZE(AO)
  853. FMADD f0, f18, f20, f0
  854. LFDU f20, 16 * SIZE(BO)
  855. FMADD f4, f18, f21, f4
  856. LFD f21, 1 * SIZE(BO)
  857. FMADD f8, f18, f22, f8
  858. LFD f22, 2 * SIZE(BO)
  859. FMADD f12, f18, f23, f12
  860. LFD f23, 3 * SIZE(BO)
  861. LFD f18, 2 * SIZE(AO)
  862. FMADD f1, f19, f24, f1
  863. LFD f24, 4 * SIZE(BO)
  864. FMADD f5, f19, f25, f5
  865. LFD f25, 5 * SIZE(BO)
  866. FMADD f9, f19, f26, f9
  867. LFD f26, 6 * SIZE(BO)
  868. FMADD f13, f19, f27, f13
  869. LFD f27, 7 * SIZE(BO)
  870. LFD f19, 3 * SIZE(AO)
  871. bdnz .L32
  872. fadd f0, f1, f0
  873. fadd f4, f5, f4
  874. fadd f8, f9, f8
  875. fadd f12, f13, f12
  876. .align 4
  877. .L35:
  878. lfd f30, ALPHA
  879. #if defined(TRMMKERNEL)
  880. #if (defined(LEFT) && !defined(TRANSA)) || (!defined(LEFT) && defined(TRANSA))
  881. sub TEMP, K, KK
  882. #elif defined(LEFT)
  883. addi TEMP, KK, 1
  884. #else
  885. addi TEMP, KK, 4
  886. #endif
  887. andi. TEMP, TEMP, 3
  888. mtspr CTR, TEMP
  889. #else
  890. andi. r0, K, 3
  891. mtspr CTR, r0
  892. #endif
  893. ble+ .L38
  894. .align 4
  895. .L36:
  896. FMADD f0, f16, f20, f0
  897. LFDU f20, 4 * SIZE(BO)
  898. FMADD f4, f16, f21, f4
  899. LFD f21, 1 * SIZE(BO)
  900. FMADD f8, f16, f22, f8
  901. LFD f22, 2 * SIZE(BO)
  902. FMADD f12, f16, f23, f12
  903. LFDU f16, 1 * SIZE(AO)
  904. LFD f23, 3 * SIZE(BO)
  905. bdnz .L36
  906. .align 4
  907. .L38:
  908. #ifndef TRMMKERNEL
  909. LFD f16, 0 * SIZE(CO1)
  910. LFD f18, 0 * SIZE(CO2)
  911. LFD f20, 0 * SIZE(CO3)
  912. LFD f22, 0 * SIZE(CO4)
  913. FMADD f0, f0, f30, f16
  914. FMADD f4, f4, f30, f18
  915. FMADD f8, f8, f30, f20
  916. FMADD f12, f12, f30, f22
  917. #else
  918. FMUL f0, f0, f30
  919. FMUL f4, f4, f30
  920. FMUL f8, f8, f30
  921. FMUL f12, f12, f30
  922. #endif
  923. STFD f0, 0 * SIZE(CO1)
  924. STFD f4, 0 * SIZE(CO2)
  925. STFD f8, 0 * SIZE(CO3)
  926. STFD f12, 0 * SIZE(CO4)
  927. lfs f0, FZERO
  928. fmr f1, f0
  929. fmr f4, f0
  930. fmr f5, f0
  931. fmr f8, f0
  932. fmr f9, f0
  933. fmr f12, f0
  934. fmr f13, f0
  935. #ifdef TRMMKERNEL
  936. #if ( defined(LEFT) && defined(TRANSA)) || \
  937. (!defined(LEFT) && !defined(TRANSA))
  938. sub TEMP, K, KK
  939. #ifdef LEFT
  940. addi TEMP, TEMP, -1
  941. #else
  942. addi TEMP, TEMP, -4
  943. #endif
  944. slwi r0, TEMP, 0 + BASE_SHIFT
  945. slwi TEMP, TEMP, 2 + BASE_SHIFT
  946. add AO, AO, r0
  947. add BO, BO, TEMP
  948. #endif
  949. #ifdef LEFT
  950. addi KK, KK, 2
  951. #endif
  952. #endif
  953. .align 4
  954. .L39:
  955. #if defined(TRMMKERNEL) && !defined(LEFT)
  956. addi KK, KK, 4
  957. #endif
  958. mr B, BO
  959. addic. J, J, -1
  960. bgt .L10
  961. .align 4
  962. .L40:
  963. mr CO1, C
  964. add CO2, C, LDC
  965. andi. J, N, 2
  966. ble .L70
  967. #if defined(TRMMKERNEL) && defined(LEFT)
  968. mr KK, OFFSET
  969. #endif
  970. lfs f0, FZERO
  971. fmr f1, f0
  972. fmr f2, f0
  973. fmr f3, f0
  974. fmr f4, f0
  975. fmr f5, f0
  976. fmr f6, f0
  977. fmr f7, f0
  978. srawi. I, M, 2
  979. add C, CO2, LDC
  980. mr AO, A
  981. ble .L50
  982. .align 4
  983. .L41:
  984. #if defined(TRMMKERNEL)
  985. #if (defined(LEFT) && defined(TRANSA)) || (!defined(LEFT) && !defined(TRANSA))
  986. LFD f16, 0 * SIZE(AO)
  987. LFD f17, 1 * SIZE(AO)
  988. LFD f18, 2 * SIZE(AO)
  989. LFD f19, 3 * SIZE(AO)
  990. LFD f20, 0 * SIZE(B)
  991. LFD f21, 1 * SIZE(B)
  992. LFD f22, 2 * SIZE(B)
  993. LFD f23, 3 * SIZE(B)
  994. mr BO, B
  995. #else
  996. slwi r0, KK, 2 + BASE_SHIFT
  997. slwi TEMP, KK, 1 + BASE_SHIFT
  998. add AO, AO, r0
  999. add BO, B, TEMP
  1000. LFD f16, 0 * SIZE(AO)
  1001. LFD f17, 1 * SIZE(AO)
  1002. LFD f18, 2 * SIZE(AO)
  1003. LFD f19, 3 * SIZE(AO)
  1004. LFD f20, 0 * SIZE(BO)
  1005. LFD f21, 1 * SIZE(BO)
  1006. LFD f22, 2 * SIZE(BO)
  1007. LFD f23, 3 * SIZE(BO)
  1008. #endif
  1009. #if (defined(LEFT) && !defined(TRANSA)) || (!defined(LEFT) && defined(TRANSA))
  1010. sub TEMP, K, KK
  1011. #elif defined(LEFT)
  1012. addi TEMP, KK, 4
  1013. #else
  1014. addi TEMP, KK, 2
  1015. #endif
  1016. srawi. TEMP, TEMP, 2
  1017. mtspr CTR, TEMP
  1018. #else
  1019. LFD f16, 0 * SIZE(AO)
  1020. LFD f17, 1 * SIZE(AO)
  1021. LFD f18, 2 * SIZE(AO)
  1022. LFD f19, 3 * SIZE(AO)
  1023. LFD f20, 0 * SIZE(B)
  1024. LFD f21, 1 * SIZE(B)
  1025. LFD f22, 2 * SIZE(B)
  1026. LFD f23, 3 * SIZE(B)
  1027. srawi. r0, K, 2
  1028. mtspr CTR, r0
  1029. mr BO, B
  1030. #endif
  1031. ble .L45
  1032. .align 5
  1033. .L42:
  1034. FMADD f0, f16, f20, f0
  1035. FMADD f1, f17, f20, f1
  1036. FMADD f2, f18, f20, f2
  1037. FMADD f3, f19, f20, f3
  1038. LFD f20, 4 * SIZE(BO)
  1039. FMADD f4, f16, f21, f4
  1040. LFD f16, 4 * SIZE(AO)
  1041. FMADD f5, f17, f21, f5
  1042. LFD f17, 5 * SIZE(AO)
  1043. FMADD f6, f18, f21, f6
  1044. LFD f18, 6 * SIZE(AO)
  1045. FMADD f7, f19, f21, f7
  1046. LFD f19, 7 * SIZE(AO)
  1047. FMADD f0, f16, f22, f0
  1048. LFD f21, 5 * SIZE(BO)
  1049. FMADD f1, f17, f22, f1
  1050. FMADD f2, f18, f22, f2
  1051. FMADD f3, f19, f22, f3
  1052. LFD f22, 6 * SIZE(BO)
  1053. FMADD f4, f16, f23, f4
  1054. LFD f16, 8 * SIZE(AO)
  1055. FMADD f5, f17, f23, f5
  1056. LFD f17, 9 * SIZE(AO)
  1057. FMADD f6, f18, f23, f6
  1058. LFD f18, 10 * SIZE(AO)
  1059. FMADD f7, f19, f23, f7
  1060. LFD f19, 11 * SIZE(AO)
  1061. FMADD f0, f16, f20, f0
  1062. LFD f23, 7 * SIZE(BO)
  1063. FMADD f1, f17, f20, f1
  1064. FMADD f2, f18, f20, f2
  1065. FMADD f3, f19, f20, f3
  1066. LFDU f20, 8 * SIZE(BO)
  1067. FMADD f4, f16, f21, f4
  1068. LFD f16, 12 * SIZE(AO)
  1069. FMADD f5, f17, f21, f5
  1070. LFD f17, 13 * SIZE(AO)
  1071. FMADD f6, f18, f21, f6
  1072. LFD f18, 14 * SIZE(AO)
  1073. FMADD f7, f19, f21, f7
  1074. LFD f19, 15 * SIZE(AO)
  1075. FMADD f0, f16, f22, f0
  1076. LFD f21, 1 * SIZE(BO)
  1077. FMADD f1, f17, f22, f1
  1078. FMADD f2, f18, f22, f2
  1079. FMADD f3, f19, f22, f3
  1080. LFD f22, 2 * SIZE(BO)
  1081. FMADD f4, f16, f23, f4
  1082. LFDU f16, 16 * SIZE(AO)
  1083. FMADD f5, f17, f23, f5
  1084. LFD f17, 1 * SIZE(AO)
  1085. FMADD f6, f18, f23, f6
  1086. LFD f18, 2 * SIZE(AO)
  1087. FMADD f7, f19, f23, f7
  1088. LFD f19, 3 * SIZE(AO)
  1089. LFD f23, 3 * SIZE(BO)
  1090. bdnz .L42
  1091. .align 4
  1092. .L45:
  1093. lfd f30, ALPHA
  1094. #if defined(TRMMKERNEL)
  1095. #if (defined(LEFT) && !defined(TRANSA)) || (!defined(LEFT) && defined(TRANSA))
  1096. sub TEMP, K, KK
  1097. #elif defined(LEFT)
  1098. addi TEMP, KK, 4
  1099. #else
  1100. addi TEMP, KK, 2
  1101. #endif
  1102. andi. TEMP, TEMP, 3
  1103. mtspr CTR, TEMP
  1104. #else
  1105. andi. r0, K, 3
  1106. mtspr CTR, r0
  1107. #endif
  1108. ble+ .L48
  1109. .align 4
  1110. .L46:
  1111. FMADD f0, f16, f20, f0
  1112. FMADD f1, f17, f20, f1
  1113. FMADD f2, f18, f20, f2
  1114. FMADD f3, f19, f20, f3
  1115. LFDU f20, 2 * SIZE(BO)
  1116. FMADD f4, f16, f21, f4
  1117. LFDU f16, 4 * SIZE(AO)
  1118. FMADD f5, f17, f21, f5
  1119. LFD f17, 1 * SIZE(AO)
  1120. FMADD f6, f18, f21, f6
  1121. LFD f18, 2 * SIZE(AO)
  1122. FMADD f7, f19, f21, f7
  1123. LFD f19, 3 * SIZE(AO)
  1124. LFD f21, 1 * SIZE(BO)
  1125. bdnz .L46
  1126. .align 4
  1127. .L48:
  1128. #ifndef TRMMKERNEL
  1129. LFD f16, 0 * SIZE(CO1)
  1130. LFD f17, 1 * SIZE(CO1)
  1131. LFD f18, 2 * SIZE(CO1)
  1132. LFD f19, 3 * SIZE(CO1)
  1133. LFD f20, 0 * SIZE(CO2)
  1134. LFD f21, 1 * SIZE(CO2)
  1135. LFD f22, 2 * SIZE(CO2)
  1136. LFD f23, 3 * SIZE(CO2)
  1137. FMADD f0, f0, f30, f16
  1138. FMADD f1, f1, f30, f17
  1139. FMADD f2, f2, f30, f18
  1140. FMADD f3, f3, f30, f19
  1141. FMADD f4, f4, f30, f20
  1142. FMADD f5, f5, f30, f21
  1143. FMADD f6, f6, f30, f22
  1144. FMADD f7, f7, f30, f23
  1145. #else
  1146. FMUL f0, f0, f30
  1147. FMUL f1, f1, f30
  1148. FMUL f2, f2, f30
  1149. FMUL f3, f3, f30
  1150. FMUL f4, f4, f30
  1151. FMUL f5, f5, f30
  1152. FMUL f6, f6, f30
  1153. FMUL f7, f7, f30
  1154. #endif
  1155. STFD f0, 0 * SIZE(CO1)
  1156. STFD f1, 1 * SIZE(CO1)
  1157. STFD f2, 2 * SIZE(CO1)
  1158. STFD f3, 3 * SIZE(CO1)
  1159. lfs f0, FZERO
  1160. fmr f1, f0
  1161. fmr f2, f0
  1162. fmr f3, f0
  1163. STFD f4, 0 * SIZE(CO2)
  1164. STFD f5, 1 * SIZE(CO2)
  1165. STFD f6, 2 * SIZE(CO2)
  1166. STFD f7, 3 * SIZE(CO2)
  1167. fmr f4, f0
  1168. fmr f5, f0
  1169. fmr f6, f0
  1170. fmr f7, f0
  1171. addi CO1, CO1, 4 * SIZE
  1172. addi CO2, CO2, 4 * SIZE
  1173. #ifdef TRMMKERNEL
  1174. #if ( defined(LEFT) && defined(TRANSA)) || \
  1175. (!defined(LEFT) && !defined(TRANSA))
  1176. sub TEMP, K, KK
  1177. #ifdef LEFT
  1178. addi TEMP, TEMP, -4
  1179. #else
  1180. addi TEMP, TEMP, -2
  1181. #endif
  1182. slwi r0, TEMP, 2 + BASE_SHIFT
  1183. slwi TEMP, TEMP, 1 + BASE_SHIFT
  1184. add AO, AO, r0
  1185. add BO, BO, TEMP
  1186. #endif
  1187. #ifdef LEFT
  1188. addi KK, KK, 4
  1189. #endif
  1190. #endif
  1191. addic. I, I, -1
  1192. bgt+ .L41
  1193. .align 4
  1194. .L50:
  1195. andi. I, M, 2
  1196. ble .L60
  1197. #if defined(TRMMKERNEL)
  1198. #if (defined(LEFT) && defined(TRANSA)) || (!defined(LEFT) && !defined(TRANSA))
  1199. LFD f16, 0 * SIZE(AO)
  1200. LFD f17, 1 * SIZE(AO)
  1201. LFD f18, 2 * SIZE(AO)
  1202. LFD f19, 3 * SIZE(AO)
  1203. LFD f20, 0 * SIZE(B)
  1204. LFD f21, 1 * SIZE(B)
  1205. LFD f22, 2 * SIZE(B)
  1206. LFD f23, 3 * SIZE(B)
  1207. LFD f24, 4 * SIZE(B)
  1208. LFD f25, 5 * SIZE(B)
  1209. LFD f26, 6 * SIZE(B)
  1210. LFD f27, 7 * SIZE(B)
  1211. mr BO, B
  1212. #else
  1213. slwi r0, KK, 1 + BASE_SHIFT
  1214. slwi TEMP, KK, 1 + BASE_SHIFT
  1215. add AO, AO, r0
  1216. add BO, B, TEMP
  1217. LFD f16, 0 * SIZE(AO)
  1218. LFD f17, 1 * SIZE(AO)
  1219. LFD f18, 2 * SIZE(AO)
  1220. LFD f19, 3 * SIZE(AO)
  1221. LFD f20, 0 * SIZE(BO)
  1222. LFD f21, 1 * SIZE(BO)
  1223. LFD f22, 2 * SIZE(BO)
  1224. LFD f23, 3 * SIZE(BO)
  1225. LFD f24, 4 * SIZE(BO)
  1226. LFD f25, 5 * SIZE(BO)
  1227. LFD f26, 6 * SIZE(BO)
  1228. LFD f27, 7 * SIZE(BO)
  1229. #endif
  1230. #if (defined(LEFT) && !defined(TRANSA)) || (!defined(LEFT) && defined(TRANSA))
  1231. sub TEMP, K, KK
  1232. #elif defined(LEFT)
  1233. addi TEMP, KK, 2
  1234. #else
  1235. addi TEMP, KK, 2
  1236. #endif
  1237. srawi. TEMP, TEMP, 2
  1238. mtspr CTR, TEMP
  1239. #else
  1240. LFD f16, 0 * SIZE(AO)
  1241. LFD f17, 1 * SIZE(AO)
  1242. LFD f18, 2 * SIZE(AO)
  1243. LFD f19, 3 * SIZE(AO)
  1244. LFD f20, 0 * SIZE(B)
  1245. LFD f21, 1 * SIZE(B)
  1246. LFD f22, 2 * SIZE(B)
  1247. LFD f23, 3 * SIZE(B)
  1248. LFD f24, 4 * SIZE(B)
  1249. LFD f25, 5 * SIZE(B)
  1250. LFD f26, 6 * SIZE(B)
  1251. LFD f27, 7 * SIZE(B)
  1252. srawi. r0, K, 2
  1253. mtspr CTR, r0
  1254. mr BO, B
  1255. #endif
  1256. ble .L55
  1257. .align 5
  1258. .L52:
  1259. FMADD f0, f16, f20, f0
  1260. FMADD f1, f17, f20, f1
  1261. LFDU f20, 8 * SIZE(BO)
  1262. FMADD f2, f16, f21, f2
  1263. LFD f16, 4 * SIZE(AO)
  1264. FMADD f3, f17, f21, f3
  1265. LFD f17, 5 * SIZE(AO)
  1266. FMADD f4, f18, f22, f4
  1267. LFD f21, 1 * SIZE(BO)
  1268. FMADD f5, f19, f22, f5
  1269. LFD f22, 2 * SIZE(BO)
  1270. FMADD f6, f18, f23, f6
  1271. LFD f18, 6 * SIZE(AO)
  1272. FMADD f7, f19, f23, f7
  1273. LFD f19, 7 * SIZE(AO)
  1274. FMADD f0, f16, f24, f0
  1275. LFD f23, 3 * SIZE(BO)
  1276. FMADD f1, f17, f24, f1
  1277. LFD f24, 4 * SIZE(BO)
  1278. FMADD f2, f16, f25, f2
  1279. LFDU f16, 8 * SIZE(AO)
  1280. FMADD f3, f17, f25, f3
  1281. LFD f17, 1 * SIZE(AO)
  1282. FMADD f4, f18, f26, f4
  1283. LFD f25, 5 * SIZE(BO)
  1284. FMADD f5, f19, f26, f5
  1285. LFD f26, 6 * SIZE(BO)
  1286. FMADD f6, f18, f27, f6
  1287. LFD f18, 2 * SIZE(AO)
  1288. FMADD f7, f19, f27, f7
  1289. LFD f19, 3 * SIZE(AO)
  1290. LFD f27, 7 * SIZE(BO)
  1291. bdnz .L52
  1292. .align 4
  1293. .L55:
  1294. lfd f30, ALPHA
  1295. #if defined(TRMMKERNEL)
  1296. #if (defined(LEFT) && !defined(TRANSA)) || (!defined(LEFT) && defined(TRANSA))
  1297. sub TEMP, K, KK
  1298. #elif defined(LEFT)
  1299. addi TEMP, KK, 2
  1300. #else
  1301. addi TEMP, KK, 2
  1302. #endif
  1303. andi. TEMP, TEMP, 3
  1304. mtspr CTR, TEMP
  1305. #else
  1306. andi. r0, K, 3
  1307. mtspr CTR, r0
  1308. #endif
  1309. ble+ .L58
  1310. .align 4
  1311. .L56:
  1312. FMADD f0, f16, f20, f0
  1313. FMADD f1, f17, f20, f1
  1314. LFDU f20, 2 * SIZE(BO)
  1315. FMADD f2, f16, f21, f2
  1316. LFDU f16, 2 * SIZE(AO)
  1317. FMADD f3, f17, f21, f3
  1318. LFD f17, 1 * SIZE(AO)
  1319. LFD f21, 1 * SIZE(BO)
  1320. bdnz .L56
  1321. .align 4
  1322. .L58:
  1323. #ifndef TRMMKERNEL
  1324. LFD f16, 0 * SIZE(CO1)
  1325. LFD f17, 1 * SIZE(CO1)
  1326. LFD f18, 0 * SIZE(CO2)
  1327. LFD f19, 1 * SIZE(CO2)
  1328. FADD f0, f4, f0
  1329. FADD f1, f5, f1
  1330. FADD f2, f6, f2
  1331. FADD f3, f7, f3
  1332. FMADD f0, f0, f30, f16
  1333. FMADD f1, f1, f30, f17
  1334. FMADD f2, f2, f30, f18
  1335. FMADD f3, f3, f30, f19
  1336. #else
  1337. FADD f0, f4, f0
  1338. FADD f1, f5, f1
  1339. FADD f2, f6, f2
  1340. FADD f3, f7, f3
  1341. FMUL f0, f0, f30
  1342. FMUL f1, f1, f30
  1343. FMUL f2, f2, f30
  1344. FMUL f3, f3, f30
  1345. #endif
  1346. STFD f0, 0 * SIZE(CO1)
  1347. STFD f1, 1 * SIZE(CO1)
  1348. STFD f2, 0 * SIZE(CO2)
  1349. STFD f3, 1 * SIZE(CO2)
  1350. lfs f0, FZERO
  1351. fmr f1, f0
  1352. fmr f2, f0
  1353. fmr f3, f0
  1354. fmr f4, f0
  1355. fmr f5, f0
  1356. fmr f6, f0
  1357. fmr f7, f0
  1358. addi CO1, CO1, 2 * SIZE
  1359. addi CO2, CO2, 2 * SIZE
  1360. #ifdef TRMMKERNEL
  1361. #if ( defined(LEFT) && defined(TRANSA)) || \
  1362. (!defined(LEFT) && !defined(TRANSA))
  1363. sub TEMP, K, KK
  1364. #ifdef LEFT
  1365. addi TEMP, TEMP, -2
  1366. #else
  1367. addi TEMP, TEMP, -2
  1368. #endif
  1369. slwi r0, TEMP, 1 + BASE_SHIFT
  1370. slwi TEMP, TEMP, 1 + BASE_SHIFT
  1371. add AO, AO, r0
  1372. add BO, BO, TEMP
  1373. #endif
  1374. #ifdef LEFT
  1375. addi KK, KK, 2
  1376. #endif
  1377. #endif
  1378. .align 4
  1379. .L60:
  1380. andi. I, M, 1
  1381. ble .L69
  1382. #if defined(TRMMKERNEL)
  1383. #if (defined(LEFT) && defined(TRANSA)) || (!defined(LEFT) && !defined(TRANSA))
  1384. LFD f16, 0 * SIZE(AO)
  1385. LFD f17, 1 * SIZE(AO)
  1386. LFD f18, 2 * SIZE(AO)
  1387. LFD f19, 3 * SIZE(AO)
  1388. LFD f20, 0 * SIZE(B)
  1389. LFD f21, 1 * SIZE(B)
  1390. LFD f22, 2 * SIZE(B)
  1391. LFD f23, 3 * SIZE(B)
  1392. LFD f24, 4 * SIZE(B)
  1393. LFD f25, 5 * SIZE(B)
  1394. LFD f26, 6 * SIZE(B)
  1395. LFD f27, 7 * SIZE(B)
  1396. mr BO, B
  1397. #else
  1398. slwi r0, KK, 0 + BASE_SHIFT
  1399. slwi TEMP, KK, 1 + BASE_SHIFT
  1400. add AO, AO, r0
  1401. add BO, B, TEMP
  1402. LFD f16, 0 * SIZE(AO)
  1403. LFD f17, 1 * SIZE(AO)
  1404. LFD f18, 2 * SIZE(AO)
  1405. LFD f19, 3 * SIZE(AO)
  1406. LFD f20, 0 * SIZE(BO)
  1407. LFD f21, 1 * SIZE(BO)
  1408. LFD f22, 2 * SIZE(BO)
  1409. LFD f23, 3 * SIZE(BO)
  1410. LFD f24, 4 * SIZE(BO)
  1411. LFD f25, 5 * SIZE(BO)
  1412. LFD f26, 6 * SIZE(BO)
  1413. LFD f27, 7 * SIZE(BO)
  1414. #endif
  1415. #if (defined(LEFT) && !defined(TRANSA)) || (!defined(LEFT) && defined(TRANSA))
  1416. sub TEMP, K, KK
  1417. #elif defined(LEFT)
  1418. addi TEMP, KK, 1
  1419. #else
  1420. addi TEMP, KK, 2
  1421. #endif
  1422. srawi. TEMP, TEMP, 2
  1423. mtspr CTR, TEMP
  1424. #else
  1425. LFD f16, 0 * SIZE(AO)
  1426. LFD f17, 1 * SIZE(AO)
  1427. LFD f18, 2 * SIZE(AO)
  1428. LFD f19, 3 * SIZE(AO)
  1429. LFD f20, 0 * SIZE(B)
  1430. LFD f21, 1 * SIZE(B)
  1431. LFD f22, 2 * SIZE(B)
  1432. LFD f23, 3 * SIZE(B)
  1433. LFD f24, 4 * SIZE(B)
  1434. LFD f25, 5 * SIZE(B)
  1435. LFD f26, 6 * SIZE(B)
  1436. LFD f27, 7 * SIZE(B)
  1437. srawi. r0, K, 2
  1438. mtspr CTR, r0
  1439. mr BO, B
  1440. #endif
  1441. ble .L65
  1442. .align 5
  1443. .L62:
  1444. FMADD f0, f16, f20, f0
  1445. LFDU f20, 8 * SIZE(BO)
  1446. FMADD f1, f16, f21, f1
  1447. LFDU f16, 4 * SIZE(AO)
  1448. LFD f21, 1 * SIZE(BO)
  1449. FMADD f2, f17, f22, f2
  1450. LFD f22, 2 * SIZE(BO)
  1451. FMADD f3, f17, f23, f3
  1452. LFD f17, 1 * SIZE(AO)
  1453. LFD f23, 3 * SIZE(BO)
  1454. FMADD f0, f18, f24, f0
  1455. LFD f24, 4 * SIZE(BO)
  1456. FMADD f1, f18, f25, f1
  1457. LFD f18, 2 * SIZE(AO)
  1458. LFD f25, 5 * SIZE(BO)
  1459. FMADD f2, f19, f26, f2
  1460. LFD f26, 6 * SIZE(BO)
  1461. FMADD f3, f19, f27, f3
  1462. LFD f19, 3 * SIZE(AO)
  1463. LFD f27, 7 * SIZE(BO)
  1464. bdnz .L62
  1465. .align 4
  1466. .L65:
  1467. lfd f30, ALPHA
  1468. #if defined(TRMMKERNEL)
  1469. #if (defined(LEFT) && !defined(TRANSA)) || (!defined(LEFT) && defined(TRANSA))
  1470. sub TEMP, K, KK
  1471. #elif defined(LEFT)
  1472. addi TEMP, KK, 1
  1473. #else
  1474. addi TEMP, KK, 2
  1475. #endif
  1476. andi. TEMP, TEMP, 3
  1477. mtspr CTR, TEMP
  1478. #else
  1479. andi. r0, K, 3
  1480. mtspr CTR, r0
  1481. #endif
  1482. ble+ .L68
  1483. .align 4
  1484. .L66:
  1485. FMADD f0, f16, f20, f0
  1486. LFDU f20, 2 * SIZE(BO)
  1487. FMADD f1, f16, f21, f1
  1488. LFDU f16, 1 * SIZE(AO)
  1489. LFD f21, 1 * SIZE(BO)
  1490. bdnz .L66
  1491. .align 4
  1492. .L68:
  1493. #ifndef TRMMKERNEL
  1494. LFD f16, 0 * SIZE(CO1)
  1495. LFD f18, 0 * SIZE(CO2)
  1496. FADD f0, f2, f0
  1497. FADD f1, f3, f1
  1498. FMADD f0, f0, f30, f16
  1499. FMADD f1, f1, f30, f18
  1500. #else
  1501. FADD f0, f2, f0
  1502. FADD f1, f3, f1
  1503. FMUL f0, f0, f30
  1504. FMUL f1, f1, f30
  1505. #endif
  1506. STFD f0, 0 * SIZE(CO1)
  1507. STFD f1, 0 * SIZE(CO2)
  1508. lfs f0, FZERO
  1509. fmr f1, f0
  1510. fmr f4, f0
  1511. fmr f5, f0
  1512. #ifdef TRMMKERNEL
  1513. #if ( defined(LEFT) && defined(TRANSA)) || \
  1514. (!defined(LEFT) && !defined(TRANSA))
  1515. sub TEMP, K, KK
  1516. #ifdef LEFT
  1517. addi TEMP, TEMP, -1
  1518. #else
  1519. addi TEMP, TEMP, -2
  1520. #endif
  1521. slwi r0, TEMP, 0 + BASE_SHIFT
  1522. slwi TEMP, TEMP, 1 + BASE_SHIFT
  1523. add AO, AO, r0
  1524. add BO, BO, TEMP
  1525. #endif
  1526. #ifdef LEFT
  1527. addi KK, KK, 1
  1528. #endif
  1529. #endif
  1530. .align 4
  1531. .L69:
  1532. #if defined(TRMMKERNEL) && !defined(LEFT)
  1533. addi KK, KK, 2
  1534. #endif
  1535. mr B, BO
  1536. .align 4
  1537. .L70:
  1538. mr CO1, C
  1539. andi. J, N, 1
  1540. ble .L999
  1541. #if defined(TRMMKERNEL) && defined(LEFT)
  1542. mr KK, OFFSET
  1543. #endif
  1544. lfs f0, FZERO
  1545. fmr f1, f0
  1546. fmr f2, f0
  1547. fmr f3, f0
  1548. srawi. I, M, 2
  1549. mr AO, A
  1550. ble .L80
  1551. .align 4
  1552. .L71:
  1553. #if defined(TRMMKERNEL)
  1554. #if (defined(LEFT) && defined(TRANSA)) || (!defined(LEFT) && !defined(TRANSA))
  1555. LFD f16, 0 * SIZE(AO)
  1556. LFD f17, 1 * SIZE(AO)
  1557. LFD f18, 2 * SIZE(AO)
  1558. LFD f19, 3 * SIZE(AO)
  1559. LFD f20, 0 * SIZE(B)
  1560. LFD f21, 1 * SIZE(B)
  1561. LFD f22, 2 * SIZE(B)
  1562. LFD f23, 3 * SIZE(B)
  1563. mr BO, B
  1564. #else
  1565. slwi r0, KK, 2 + BASE_SHIFT
  1566. slwi TEMP, KK, 0 + BASE_SHIFT
  1567. add AO, AO, r0
  1568. add BO, B, TEMP
  1569. LFD f16, 0 * SIZE(AO)
  1570. LFD f17, 1 * SIZE(AO)
  1571. LFD f18, 2 * SIZE(AO)
  1572. LFD f19, 3 * SIZE(AO)
  1573. LFD f20, 0 * SIZE(BO)
  1574. LFD f21, 1 * SIZE(BO)
  1575. LFD f22, 2 * SIZE(BO)
  1576. LFD f23, 3 * SIZE(BO)
  1577. #endif
  1578. #if (defined(LEFT) && !defined(TRANSA)) || (!defined(LEFT) && defined(TRANSA))
  1579. sub TEMP, K, KK
  1580. #elif defined(LEFT)
  1581. addi TEMP, KK, 4
  1582. #else
  1583. addi TEMP, KK, 1
  1584. #endif
  1585. srawi. TEMP, TEMP, 2
  1586. mtspr CTR, TEMP
  1587. #else
  1588. LFD f16, 0 * SIZE(AO)
  1589. LFD f17, 1 * SIZE(AO)
  1590. LFD f18, 2 * SIZE(AO)
  1591. LFD f19, 3 * SIZE(AO)
  1592. LFD f20, 0 * SIZE(B)
  1593. LFD f21, 1 * SIZE(B)
  1594. LFD f22, 2 * SIZE(B)
  1595. LFD f23, 3 * SIZE(B)
  1596. srawi. r0, K, 2
  1597. mtspr CTR, r0
  1598. mr BO, B
  1599. ble .L75
  1600. #endif
  1601. ble .L75
  1602. .align 5
  1603. .L72:
  1604. FMADD f0, f16, f20, f0
  1605. LFD f16, 4 * SIZE(AO)
  1606. FMADD f1, f17, f20, f1
  1607. LFD f17, 5 * SIZE(AO)
  1608. FMADD f2, f18, f20, f2
  1609. LFD f18, 6 * SIZE(AO)
  1610. FMADD f3, f19, f20, f3
  1611. LFD f19, 7 * SIZE(AO)
  1612. LFDU f20, 4 * SIZE(BO)
  1613. FMADD f0, f16, f21, f0
  1614. LFD f16, 8 * SIZE(AO)
  1615. FMADD f1, f17, f21, f1
  1616. LFD f17, 9 * SIZE(AO)
  1617. FMADD f2, f18, f21, f2
  1618. LFD f18, 10 * SIZE(AO)
  1619. FMADD f3, f19, f21, f3
  1620. LFD f19, 11 * SIZE(AO)
  1621. LFD f21, 1 * SIZE(BO)
  1622. FMADD f0, f16, f22, f0
  1623. LFD f16, 12 * SIZE(AO)
  1624. FMADD f1, f17, f22, f1
  1625. LFD f17, 13 * SIZE(AO)
  1626. FMADD f2, f18, f22, f2
  1627. LFD f18, 14 * SIZE(AO)
  1628. FMADD f3, f19, f22, f3
  1629. LFD f19, 15 * SIZE(AO)
  1630. LFD f22, 2 * SIZE(BO)
  1631. FMADD f0, f16, f23, f0
  1632. LFDU f16, 16 * SIZE(AO)
  1633. FMADD f1, f17, f23, f1
  1634. LFD f17, 1 * SIZE(AO)
  1635. FMADD f2, f18, f23, f2
  1636. LFD f18, 2 * SIZE(AO)
  1637. FMADD f3, f19, f23, f3
  1638. LFD f19, 3 * SIZE(AO)
  1639. LFD f23, 3 * SIZE(BO)
  1640. bdnz .L72
  1641. .align 4
  1642. .L75:
  1643. lfd f30, ALPHA
  1644. #if defined(TRMMKERNEL)
  1645. #if (defined(LEFT) && !defined(TRANSA)) || (!defined(LEFT) && defined(TRANSA))
  1646. sub TEMP, K, KK
  1647. #elif defined(LEFT)
  1648. addi TEMP, KK, 4
  1649. #else
  1650. addi TEMP, KK, 1
  1651. #endif
  1652. andi. TEMP, TEMP, 3
  1653. mtspr CTR, TEMP
  1654. #else
  1655. andi. r0, K, 3
  1656. mtspr CTR, r0
  1657. #endif
  1658. ble+ .L78
  1659. .align 4
  1660. .L76:
  1661. FMADD f0, f16, f20, f0
  1662. LFDU f16, 4 * SIZE(AO)
  1663. FMADD f1, f17, f20, f1
  1664. LFD f17, 1 * SIZE(AO)
  1665. FMADD f2, f18, f20, f2
  1666. LFD f18, 2 * SIZE(AO)
  1667. FMADD f3, f19, f20, f3
  1668. LFDU f20, 1 * SIZE(BO)
  1669. LFD f19, 3 * SIZE(AO)
  1670. bdnz .L76
  1671. .align 4
  1672. .L78:
  1673. #ifndef TRMMKERNEL
  1674. LFD f16, 0 * SIZE(CO1)
  1675. LFD f17, 1 * SIZE(CO1)
  1676. LFD f18, 2 * SIZE(CO1)
  1677. LFD f19, 3 * SIZE(CO1)
  1678. FMADD f0, f0, f30, f16
  1679. FMADD f1, f1, f30, f17
  1680. FMADD f2, f2, f30, f18
  1681. FMADD f3, f3, f30, f19
  1682. #else
  1683. FMUL f0, f0, f30
  1684. FMUL f1, f1, f30
  1685. FMUL f2, f2, f30
  1686. FMUL f3, f3, f30
  1687. #endif
  1688. STFD f0, 0 * SIZE(CO1)
  1689. STFD f1, 1 * SIZE(CO1)
  1690. STFD f2, 2 * SIZE(CO1)
  1691. STFD f3, 3 * SIZE(CO1)
  1692. lfs f0, FZERO
  1693. fmr f1, f0
  1694. fmr f2, f0
  1695. fmr f3, f0
  1696. #ifdef TRMMKERNEL
  1697. #if ( defined(LEFT) && defined(TRANSA)) || \
  1698. (!defined(LEFT) && !defined(TRANSA))
  1699. sub TEMP, K, KK
  1700. #ifdef LEFT
  1701. addi TEMP, TEMP, -4
  1702. #else
  1703. addi TEMP, TEMP, -1
  1704. #endif
  1705. slwi r0 , TEMP, 2 + BASE_SHIFT
  1706. slwi TEMP, TEMP, 0 + BASE_SHIFT
  1707. add AO, AO, r0
  1708. add BO, BO, TEMP
  1709. #endif
  1710. #ifdef LEFT
  1711. addi KK, KK, 4
  1712. #endif
  1713. #endif
  1714. addi CO1, CO1, 4 * SIZE
  1715. addic. I, I, -1
  1716. bgt+ .L71
  1717. .align 4
  1718. .L80:
  1719. andi. I, M, 2
  1720. ble .L90
  1721. #if defined(TRMMKERNEL)
  1722. #if (defined(LEFT) && defined(TRANSA)) || (!defined(LEFT) && !defined(TRANSA))
  1723. LFD f16, 0 * SIZE(AO)
  1724. LFD f17, 1 * SIZE(AO)
  1725. LFD f18, 2 * SIZE(AO)
  1726. LFD f19, 3 * SIZE(AO)
  1727. LFD f20, 0 * SIZE(B)
  1728. LFD f21, 1 * SIZE(B)
  1729. LFD f22, 2 * SIZE(B)
  1730. LFD f23, 3 * SIZE(B)
  1731. mr BO, B
  1732. #else
  1733. slwi r0, KK, 1 + BASE_SHIFT
  1734. slwi TEMP, KK, 0 + BASE_SHIFT
  1735. add AO, AO, r0
  1736. add BO, B, TEMP
  1737. LFD f16, 0 * SIZE(AO)
  1738. LFD f17, 1 * SIZE(AO)
  1739. LFD f18, 2 * SIZE(AO)
  1740. LFD f19, 3 * SIZE(AO)
  1741. LFD f20, 0 * SIZE(BO)
  1742. LFD f21, 1 * SIZE(BO)
  1743. LFD f22, 2 * SIZE(BO)
  1744. LFD f23, 3 * SIZE(BO)
  1745. #endif
  1746. #if (defined(LEFT) && !defined(TRANSA)) || (!defined(LEFT) && defined(TRANSA))
  1747. sub TEMP, K, KK
  1748. #elif defined(LEFT)
  1749. addi TEMP, KK, 2
  1750. #else
  1751. addi TEMP, KK, 1
  1752. #endif
  1753. srawi. TEMP, TEMP, 2
  1754. mtspr CTR, TEMP
  1755. #else
  1756. LFD f16, 0 * SIZE(AO)
  1757. LFD f17, 1 * SIZE(AO)
  1758. LFD f18, 2 * SIZE(AO)
  1759. LFD f19, 3 * SIZE(AO)
  1760. LFD f20, 0 * SIZE(B)
  1761. LFD f21, 1 * SIZE(B)
  1762. LFD f22, 2 * SIZE(B)
  1763. LFD f23, 3 * SIZE(B)
  1764. srawi. r0, K, 2
  1765. mtspr CTR, r0
  1766. mr BO, B
  1767. #endif
  1768. ble .L85
  1769. .align 5
  1770. .L82:
  1771. FMADD f0, f16, f20, f0
  1772. LFD f16, 4 * SIZE(AO)
  1773. FMADD f1, f17, f20, f1
  1774. LFDU f20, 4 * SIZE(BO)
  1775. LFD f17, 5 * SIZE(AO)
  1776. FMADD f2, f18, f21, f2
  1777. LFD f18, 6 * SIZE(AO)
  1778. FMADD f3, f19, f21, f3
  1779. LFD f21, 1 * SIZE(BO)
  1780. LFD f19, 7 * SIZE(AO)
  1781. FMADD f0, f16, f22, f0
  1782. LFDU f16, 8 * SIZE(AO)
  1783. FMADD f1, f17, f22, f1
  1784. LFD f22, 2 * SIZE(BO)
  1785. LFD f17, 1 * SIZE(AO)
  1786. FMADD f2, f18, f23, f2
  1787. LFD f18, 2 * SIZE(AO)
  1788. FMADD f3, f19, f23, f3
  1789. LFD f23, 3 * SIZE(BO)
  1790. LFD f19, 3 * SIZE(AO)
  1791. bdnz .L82
  1792. .align 4
  1793. .L85:
  1794. lfd f30, ALPHA
  1795. #if defined(TRMMKERNEL)
  1796. #if (defined(LEFT) && !defined(TRANSA)) || (!defined(LEFT) && defined(TRANSA))
  1797. sub TEMP, K, KK
  1798. #elif defined(LEFT)
  1799. addi TEMP, KK, 2
  1800. #else
  1801. addi TEMP, KK, 1
  1802. #endif
  1803. andi. TEMP, TEMP, 3
  1804. mtspr CTR, TEMP
  1805. #else
  1806. andi. r0, K, 3
  1807. mtspr CTR, r0
  1808. #endif
  1809. ble+ .L88
  1810. .align 4
  1811. .L86:
  1812. FMADD f0, f16, f20, f0
  1813. LFDU f16, 2 * SIZE(AO)
  1814. FMADD f1, f17, f20, f1
  1815. LFDU f20, 1 * SIZE(BO)
  1816. LFD f17, 1 * SIZE(AO)
  1817. bdnz .L86
  1818. .align 4
  1819. .L88:
  1820. #ifndef TRMMKERNEL
  1821. LFD f16, 0 * SIZE(CO1)
  1822. LFD f17, 1 * SIZE(CO1)
  1823. FADD f0, f2, f0
  1824. FADD f1, f3, f1
  1825. FMADD f0, f0, f30, f16
  1826. FMADD f1, f1, f30, f17
  1827. #else
  1828. FADD f0, f2, f0
  1829. FADD f1, f3, f1
  1830. FMUL f0, f0, f30
  1831. FMUL f1, f1, f30
  1832. #endif
  1833. STFD f0, 0 * SIZE(CO1)
  1834. STFD f1, 1 * SIZE(CO1)
  1835. lfs f0, FZERO
  1836. fmr f1, f0
  1837. fmr f2, f0
  1838. fmr f3, f0
  1839. addi CO1, CO1, 2 * SIZE
  1840. #ifdef TRMMKERNEL
  1841. #if ( defined(LEFT) && defined(TRANSA)) || \
  1842. (!defined(LEFT) && !defined(TRANSA))
  1843. sub TEMP, K, KK
  1844. #ifdef LEFT
  1845. addi TEMP, TEMP, -2
  1846. #else
  1847. addi TEMP, TEMP, -1
  1848. #endif
  1849. slwi r0 , TEMP, 1 + BASE_SHIFT
  1850. slwi TEMP, TEMP, 0 + BASE_SHIFT
  1851. add AO, AO, r0
  1852. add BO, BO, TEMP
  1853. #endif
  1854. #ifdef LEFT
  1855. addi KK, KK, 2
  1856. #endif
  1857. #endif
  1858. .align 4
  1859. .L90:
  1860. andi. I, M, 1
  1861. ble .L999
  1862. #if defined(TRMMKERNEL)
  1863. #if (defined(LEFT) && defined(TRANSA)) || (!defined(LEFT) && !defined(TRANSA))
  1864. LFD f16, 0 * SIZE(AO)
  1865. LFD f17, 1 * SIZE(AO)
  1866. LFD f18, 2 * SIZE(AO)
  1867. LFD f19, 3 * SIZE(AO)
  1868. LFD f20, 0 * SIZE(B)
  1869. LFD f21, 1 * SIZE(B)
  1870. LFD f22, 2 * SIZE(B)
  1871. LFD f23, 3 * SIZE(B)
  1872. mr BO, B
  1873. #else
  1874. slwi r0, KK, 0 + BASE_SHIFT
  1875. slwi TEMP, KK, 0 + BASE_SHIFT
  1876. add AO, AO, r0
  1877. add BO, B, TEMP
  1878. LFD f16, 0 * SIZE(AO)
  1879. LFD f17, 1 * SIZE(AO)
  1880. LFD f18, 2 * SIZE(AO)
  1881. LFD f19, 3 * SIZE(AO)
  1882. LFD f20, 0 * SIZE(BO)
  1883. LFD f21, 1 * SIZE(BO)
  1884. LFD f22, 2 * SIZE(BO)
  1885. LFD f23, 3 * SIZE(BO)
  1886. #endif
  1887. #if (defined(LEFT) && !defined(TRANSA)) || (!defined(LEFT) && defined(TRANSA))
  1888. sub TEMP, K, KK
  1889. #elif defined(LEFT)
  1890. addi TEMP, KK, 1
  1891. #else
  1892. addi TEMP, KK, 1
  1893. #endif
  1894. srawi. TEMP, TEMP, 3
  1895. mtspr CTR, TEMP
  1896. #else
  1897. LFD f16, 0 * SIZE(AO)
  1898. LFD f17, 1 * SIZE(AO)
  1899. LFD f18, 2 * SIZE(AO)
  1900. LFD f19, 3 * SIZE(AO)
  1901. LFD f20, 0 * SIZE(B)
  1902. LFD f21, 1 * SIZE(B)
  1903. LFD f22, 2 * SIZE(B)
  1904. LFD f23, 3 * SIZE(B)
  1905. srawi. r0, K, 3
  1906. mtspr CTR, r0
  1907. mr BO, B
  1908. #endif
  1909. ble .L95
  1910. .align 5
  1911. .L92:
  1912. FMADD f0, f16, f20, f0
  1913. LFD f16, 4 * SIZE(AO)
  1914. LFD f20, 4 * SIZE(BO)
  1915. FMADD f1, f17, f21, f1
  1916. LFD f17, 5 * SIZE(AO)
  1917. LFD f21, 5 * SIZE(BO)
  1918. FMADD f2, f18, f22, f2
  1919. LFD f18, 6 * SIZE(AO)
  1920. LFD f22, 6 * SIZE(BO)
  1921. FMADD f3, f19, f23, f3
  1922. LFD f19, 7 * SIZE(AO)
  1923. LFD f23, 7 * SIZE(BO)
  1924. FMADD f0, f16, f20, f0
  1925. LFDU f16, 8 * SIZE(AO)
  1926. LFDU f20, 8 * SIZE(BO)
  1927. FMADD f1, f17, f21, f1
  1928. LFD f17, 1 * SIZE(AO)
  1929. LFD f21, 1 * SIZE(BO)
  1930. FMADD f2, f18, f22, f2
  1931. LFD f18, 2 * SIZE(AO)
  1932. LFD f22, 2 * SIZE(BO)
  1933. FMADD f3, f19, f23, f3
  1934. LFD f19, 3 * SIZE(AO)
  1935. LFD f23, 3 * SIZE(BO)
  1936. bdnz .L92
  1937. .align 4
  1938. .L95:
  1939. lfd f30, ALPHA
  1940. #if defined(TRMMKERNEL)
  1941. #if (defined(LEFT) && !defined(TRANSA)) || (!defined(LEFT) && defined(TRANSA))
  1942. sub TEMP, K, KK
  1943. #elif defined(LEFT)
  1944. addi TEMP, KK, 1
  1945. #else
  1946. addi TEMP, KK, 1
  1947. #endif
  1948. andi. TEMP, TEMP, 7
  1949. mtspr CTR, TEMP
  1950. #else
  1951. andi. r0, K, 7
  1952. mtspr CTR, r0
  1953. #endif
  1954. ble+ .L98
  1955. .align 4
  1956. .L96:
  1957. FMADD f0, f16, f20, f0
  1958. LFDU f16, 1 * SIZE(AO)
  1959. LFDU f20, 1 * SIZE(BO)
  1960. bdnz .L96
  1961. .align 4
  1962. .L98:
  1963. #ifndef TRMMKERNEL
  1964. LFD f16, 0 * SIZE(CO1)
  1965. FADD f0, f1, f0
  1966. FADD f2, f3, f2
  1967. FADD f0, f2, f0
  1968. FMADD f0, f0, f30, f16
  1969. #else
  1970. FADD f0, f1, f0
  1971. FADD f2, f3, f2
  1972. FADD f0, f2, f0
  1973. FMUL f0, f0, f30
  1974. #endif
  1975. STFD f0, 0 * SIZE(CO1)
  1976. .align 4
  1977. .L999:
  1978. addi r3, 0, 0
  1979. lfd f14, 0(SP)
  1980. lfd f15, 8(SP)
  1981. lfd f16, 16(SP)
  1982. lfd f17, 24(SP)
  1983. lfd f18, 32(SP)
  1984. lfd f19, 40(SP)
  1985. lfd f20, 48(SP)
  1986. lfd f21, 56(SP)
  1987. lfd f22, 64(SP)
  1988. lfd f23, 72(SP)
  1989. lfd f24, 80(SP)
  1990. lfd f25, 88(SP)
  1991. lfd f26, 96(SP)
  1992. lfd f27, 104(SP)
  1993. lfd f28, 112(SP)
  1994. lfd f29, 120(SP)
  1995. lfd f30, 128(SP)
  1996. lfd f31, 136(SP)
  1997. #ifdef __64BIT__
  1998. ld r31, 144(SP)
  1999. ld r30, 152(SP)
  2000. ld r29, 160(SP)
  2001. ld r28, 168(SP)
  2002. ld r27, 176(SP)
  2003. ld r26, 184(SP)
  2004. ld r25, 192(SP)
  2005. ld r24, 200(SP)
  2006. ld r23, 208(SP)
  2007. ld r22, 216(SP)
  2008. ld r21, 224(SP)
  2009. ld r20, 232(SP)
  2010. #if defined(TRMMKERNEL) || defined(TRSMKERNEL)
  2011. ld r19, 240(SP)
  2012. ld r18, 248(SP)
  2013. #endif
  2014. #else
  2015. lwz r31, 144(SP)
  2016. lwz r30, 148(SP)
  2017. lwz r29, 152(SP)
  2018. lwz r28, 156(SP)
  2019. lwz r27, 160(SP)
  2020. lwz r26, 164(SP)
  2021. lwz r25, 168(SP)
  2022. lwz r24, 172(SP)
  2023. lwz r23, 176(SP)
  2024. lwz r22, 180(SP)
  2025. lwz r21, 184(SP)
  2026. lwz r20, 188(SP)
  2027. #if defined(TRMMKERNEL) || defined(TRSMKERNEL)
  2028. lwz r19, 192(SP)
  2029. lwz r18, 196(SP)
  2030. #endif
  2031. #endif
  2032. addi SP, SP, STACKSIZE
  2033. blr
  2034. EPILOGUE