13 Commits (b45a9f56c80a5793ea318d98d349a0bcef5b6738)

Author SHA1 Message Date
  Peilin Wang 299509dbfc changed cast to round to zero if casting from float to integral 5 years ago
  jonwe e2e6bf59b2 Cast half to int by rounding down 5 years ago
  Jonathan Yan 9f70ebac64 Cast/ReLU dynamic shapelsgpu op supports int32 and int64 5 years ago
  VectorSL 5102482e3a 1readme update resnet 2cast add more type 5 years ago
  VectorSL 5c0c363c66 gpu reshepe add type 5 years ago
  VectorSL b0a6346b54 gpu update cast type 5 years ago
  VectorSL 90f15df037 add int64-->fp16 and update conv pad 5 years ago
  VectorSL aef2c1984e cast support more types 5 years ago
  buxue 0cd57ddc5d check arg is tensor with vm backend 5 years ago
  cristoval f6c20178d2 fix pylint check issues 5 years ago
  jinyaohui 5a914994ba clean pylint 5 years ago
  wilfChen 59c4cf256c gpu support broadcast kernels 5 years ago
  zhunaipan 930a1fb0a8 initial version 5 years ago