add reshape op && fix populate register

mindspore/lite/micro/cmake/file_list.cmake

@@ -54,6 +54,7 @@ set(CODER_OPCODERS_SRC
         ${MICRO_DIR}/coder/opcoders/base/quant_dtype_cast_coder.cc
         ${MICRO_DIR}/coder/opcoders/base/reduce_base_coder.cc
         ${MICRO_DIR}/coder/opcoders/base/resize_base_coder.cc
+        ${MICRO_DIR}/coder/opcoders/base/reshape_base_coder.cc
         ${MICRO_DIR}/coder/opcoders/base/softmax_base_coder.cc
         ${MICRO_DIR}/coder/opcoders/base/detection_post_process_base_coder.cc
         #### cmsis int8 coder
@@ -78,7 +79,6 @@ set(CODER_OPCODERS_SRC
         ${MICRO_DIR}/coder/opcoders/nnacl/fp32/convolution_fp32_coder.cc
         ${MICRO_DIR}/coder/opcoders/nnacl/fp32/convolution_winograd_fp32_coder.cc
         ${MICRO_DIR}/coder/opcoders/nnacl/fp32/convolution_depthwise_fp32_coder.cc
-        ${MICRO_DIR}/coder/opcoders/nnacl/fp32/expand_dims_fp32_coder.cc
         ${MICRO_DIR}/coder/opcoders/nnacl/fp32/full_connection_fp32_coder.cc
         ${MICRO_DIR}/coder/opcoders/nnacl/fp32/gather_fp32_coder.cc
         ${MICRO_DIR}/coder/opcoders/nnacl/fp32/matmul_fp32_base_coder.cc
@@ -87,10 +87,8 @@ set(CODER_OPCODERS_SRC
         ${MICRO_DIR}/coder/opcoders/nnacl/fp32/pooling_fp32_coder.cc
         ${MICRO_DIR}/coder/opcoders/nnacl/fp32/power_fp32_coder.cc
         ${MICRO_DIR}/coder/opcoders/nnacl/fp32/reduce_fp32_coder.cc
-        ${MICRO_DIR}/coder/opcoders/nnacl/fp32/reshape_fp32_coder.cc
         ${MICRO_DIR}/coder/opcoders/nnacl/fp32/scale_fp32_coder.cc
         ${MICRO_DIR}/coder/opcoders/nnacl/fp32/softmax_fp32_coder.cc
-        ${MICRO_DIR}/coder/opcoders/nnacl/fp32/squeeze_dims_fp32_coder.cc
         ${MICRO_DIR}/coder/opcoders/nnacl/fp32/tile_fp32_coder.cc
         ${MICRO_DIR}/coder/opcoders/nnacl/fp32/transpose_fp32_coder.cc
         #### nnacl int8 coder
@@ -141,6 +139,7 @@ set(LITE_SRC
         ${LITE_DIR}/src/common/log_adapter.cc
         ${LITE_DIR}/src/common/utils.cc
         ### populate operator parameter
+        ${LITE_DIR}/src/ops/ops_utils.cc
         ${LITE_DIR}/src/ops/populate/conv2d_populate.cc
         ${LITE_DIR}/src/ops/populate/arithmetic_populate.cc
         ${LITE_DIR}/src/ops/populate/add_populate.cc
@@ -159,6 +158,7 @@ set(LITE_SRC
         ${LITE_DIR}/src/ops/populate/matmul_populate.cc
         ${LITE_DIR}/src/ops/populate/bias_add_populate.cc
         ${LITE_DIR}/src/ops/populate/activation_populate.cc
+        ${LITE_DIR}/src/ops/populate/softmax_populate.cc
         ### tools
         ${LITE_DIR}/tools/common/flag_parser.cc
         )

mindspore/lite/micro/coder/coder_config.h

@@ -23,6 +23,34 @@ namespace mindspore::lite::micro {
 enum Target { kX86 = 0, kARM32M = 1, kARM32A = 2, kARM64 = 3, kAllTargets = 4, kTargetUnknown = 99 };
 enum CodeMode { Inference = 0, Train = 1, Code_Unknown = 99 };
 
+inline const char *EnumNameTarget(Target target) {
+  switch (target) {
+    case kX86:
+      return "kX86";
+    case kARM32M:
+      return "kARM32M";
+    case kARM32A:
+      return "kARM32A";
+    case kARM64:
+      return "kARM64";
+    case kAllTargets:
+      return "kAllTargets";
+    default:
+      return "kTargetUnknown";
+  }
+}
+
+inline const char *EnumNameCodeMode(CodeMode codeMode) {
+  switch (codeMode) {
+    case Inference:
+      return "Inference";
+    case Train:
+      return "Train";
+    default:
+      return "Code_Unknown";
+  }
+}
+
 class Configurator {
  public:
   static Configurator *GetInstance() {

mindspore/lite/micro/coder/opcoders/base/reshape_base_coder.cc

@@ -0,0 +1,63 @@
+/**
+ * Copyright 2021 Huawei Technologies Co., Ltd
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "coder/opcoders/base/reshape_base_coder.h"
+#include <vector>
+#include "coder/opcoders/op_coder.h"
+#include "coder/opcoders/serializers/serializer.h"
+#include "include/errorcode.h"
+
+using mindspore::schema::PrimitiveType_ExpandDims;
+using mindspore::schema::PrimitiveType_Flatten;
+using mindspore::schema::PrimitiveType_FlattenGrad;
+using mindspore::schema::PrimitiveType_Reshape;
+using mindspore::schema::PrimitiveType_Squeeze;
+using mindspore::schema::PrimitiveType_Unsqueeze;
+
+namespace mindspore::lite::micro {
+
+int ReshapeBaseCoder::Prepare(CoderContext *const context) {
+  bool is_next_conv = std::any_of(output_ops().begin(), output_ops().end(), [](OperatorCoder *next_op) {
+    return next_op->type() == schema::PrimitiveType_Conv2DFusion;
+  });
+  if (is_next_conv && output_tensor_->shape().size() == 4 && output_tensor_->format() == schema::Format::Format_NCHW) {
+    output_tensor_->set_format(schema::Format::Format_NHWC);
+  }
+  return RET_OK;
+}
+
+int ReshapeBaseCoder::DoCode(CoderContext *const context) {
+  Serializer coder;
+
+  size_t size = input_tensor_->Size();
+  coder.CodeFunction("memcpy", output_tensor_, input_tensor_, size);
+
+  context->AppendCode(coder.str());
+  return RET_OK;
+}
+
+REG_OPERATOR_CODER(kAllTargets, kNumberTypeFloat32, PrimitiveType_Reshape, CPUOpCoderCreator<ReshapeBaseCoder>)
+REG_OPERATOR_CODER(kAllTargets, kNumberTypeInt32, PrimitiveType_Reshape, CPUOpCoderCreator<ReshapeBaseCoder>)
+REG_OPERATOR_CODER(kAllTargets, kNumberTypeFloat32, PrimitiveType_Flatten, CPUOpCoderCreator<ReshapeBaseCoder>)
+REG_OPERATOR_CODER(kAllTargets, kNumberTypeInt32, PrimitiveType_Flatten, CPUOpCoderCreator<ReshapeBaseCoder>)
+REG_OPERATOR_CODER(kAllTargets, kNumberTypeFloat32, PrimitiveType_ExpandDims, CPUOpCoderCreator<ReshapeBaseCoder>)
+REG_OPERATOR_CODER(kAllTargets, kNumberTypeInt32, PrimitiveType_ExpandDims, CPUOpCoderCreator<ReshapeBaseCoder>)
+REG_OPERATOR_CODER(kAllTargets, kNumberTypeFloat32, PrimitiveType_Squeeze, CPUOpCoderCreator<ReshapeBaseCoder>)
+REG_OPERATOR_CODER(kAllTargets, kNumberTypeInt32, PrimitiveType_Squeeze, CPUOpCoderCreator<ReshapeBaseCoder>)
+REG_OPERATOR_CODER(kAllTargets, kNumberTypeFloat32, PrimitiveType_Unsqueeze, CPUOpCoderCreator<ReshapeBaseCoder>)
+REG_OPERATOR_CODER(kAllTargets, kNumberTypeInt32, PrimitiveType_Unsqueeze, CPUOpCoderCreator<ReshapeBaseCoder>)
+
+}  // namespace mindspore::lite::micro

mindspore/lite/micro/coder/opcoders/nnacl/fp32/squeeze_dims_fp32_coder.h → mindspore/lite/micro/coder/opcoders/base/reshape_base_coder.h

@@ -14,24 +14,25 @@
  * limitations under the License.
  */
 
-#ifndef MINDSPORE_LITE_MICRO_CODER_OPCODERS_NNACL_SQUEEZE_FP32_CODER_H_
-#define MINDSPORE_LITE_MICRO_CODER_OPCODERS_NNACL_SQUEEZE_FP32_CODER_H_
+#ifndef MINDSPORE_LITE_MICRO_CODER_OPCODERS_RESHAPE_BASE_CODER_H
+#define MINDSPORE_LITE_MICRO_CODER_OPCODERS_RESHAPE_BASE_CODER_H
 
 #include <vector>
 #include "coder/opcoders/op_coder.h"
 
-namespace mindspore::lite::micro::nnacl {
-class SqueezeFP32Coder final : public OperatorCoder {
+namespace mindspore::lite::micro {
+class ReshapeBaseCoder final : public OperatorCoder {
  public:
-  SqueezeFP32Coder(const std::vector<Tensor *> &in_tensors, const std::vector<Tensor *> &out_tensors,
+  ReshapeBaseCoder(const std::vector<Tensor *> &in_tensors, const std::vector<Tensor *> &out_tensors,
                    const Model::Node *node, size_t node_index, Target target)
       : OperatorCoder(in_tensors, out_tensors, node, node_index, target) {}
 
-  ~SqueezeFP32Coder() override = default;
+  ~ReshapeBaseCoder() override = default;
 
-  int Prepare(CoderContext *const context) override { return RET_OK; }
+  int Prepare(CoderContext *const context) override;
 
   int DoCode(CoderContext *const context) override;
 };
-}  // namespace mindspore::lite::micro::nnacl
-#endif  // MINDSPORE_LITE_MICRO_CODER_OPCODERS_NNACL_SQUEEZE_FP32_CODER_H_
+}  // namespace mindspore::lite::micro
+
+#endif  // MINDSPORE_LITE_MICRO_CODER_OPCODERS_RESHAPE_BASE_CODER_H

mindspore/lite/micro/coder/opcoders/nnacl/fp32/addn_fp32_coder.cc

@@ -28,7 +28,7 @@ int AddNFP32Coder::DoCode(CoderContext *const context) {
   int elements_num = input0->ElementsNum();
 
   // Get Tensor Pointer
-  Collect(context, {"nnacl/kernel/fp32/add_fp32.h"}, {"add_fp32.c"});
+  Collect(context, {"nnacl/kernel/fp32/add_fp32.h"}, {"add_fp32.c", "arithmetic_fp32.c", "arithmetic_base.c"});
   NNaclFp32Serializer code;
   code.CodeFunction("ElementAdd", input0, input1, output_tensor_, elements_num);
   if (input_tensors_.size() > 2) {

mindspore/lite/micro/coder/opcoders/nnacl/fp32/arithmetic_fp32_coder.cc

@@ -277,7 +277,7 @@ int ArithmeticFP32Coder::DoCode(CoderContext *const context) {
   if (arithmetic_opt_run_ == "ElementOptSub" || arithmetic_run_ == "ElementSub") {
     Collect(context, {"nnacl/fp32/sub_fp32.h"}, {"sub_fp32.c"});
   } else if (arithmetic_opt_run_ == "ElementOptAdd" || arithmetic_run_ == "ElementAdd") {
-    Collect(context, {"nnacl/fp32/add_fp32.h"}, {"add_fp32.c"});
+    Collect(context, {"nnacl/fp32/add_fp32.h"}, {"add_fp32.c", "arithmetic_fp32.c", "arithmetic_base.c"});
   } else if (arithmetic_opt_run_ == "ElementOptMul" || arithmetic_run_ == "ElementMul") {
     Collect(context, {"nnacl/fp32/mul_fp32.h"}, {"mul_fp32.c"});
   } else if (arithmetic_run_ == "ElementAddRelu") {

mindspore/lite/micro/coder/opcoders/nnacl/fp32/convolution_depthwise_fp32_coder.cc

@@ -62,7 +62,7 @@ int ConvolutionDepthwiseFP32Coder::DoCode(CoderContext *const context) {
   MS_CHECK_TRUE(conv_param_->input_channel_ == conv_param_->output_channel_,
                 "Only support input channel equals output channel.");
   // generate code .h .c
-  Collect(context, {"nnacl/fp32/conv_depthwise.h"}, {"conv_depthwise.c"});
+  Collect(context, {"nnacl/fp32/conv_depthwise_fp32.h"}, {"conv_depthwise_fp32.c"});
 
   nnacl::NNaclFp32Serializer code;
   // call the op function

mindspore/lite/micro/coder/opcoders/nnacl/fp32/convolution_fp32_coder.cc

@@ -119,9 +119,9 @@ int ConvolutionFP32Coder::DoCode(CoderContext *const context) {
       asmFiles = {"MatmulFp32.S",          "MatmulFp32Opt.S",      "PreSum4x16Int8Peroc.S",       "MatVecMulFp32.S",
                   "PreSum4x16Int8Peroc.S", "PreSum4x16Int8Pert.S", "IndirectGemmInt16to32_8x4.S", "MatmulInt8.S"};
     }
-    std::vector<std::string> h_files = {"nnacl/fp32/conv_common_fp32.h", "nnacl/fp32/matmul.h",
+    std::vector<std::string> h_files = {"nnacl/fp32/conv_common_fp32.h", "nnacl/fp32/matmul_fp32.h",
                                         "nnacl/conv_parameter.h", "nnacl/op_base.h"};
-    std::vector<std::string> c_files = {"common_func.c", "conv_common_fp32.c", "matmul.c"};
+    std::vector<std::string> c_files = {"common_func.c", "conv_common_fp32.c", "matmul_fp32.c", "pack_fp32.c"};
     if (de_quant_flag_) {
       h_files.emplace_back("wrapper/fp32/dequant_int8_to_fp32_wrapper.h");
       c_files.emplace_back("dequant_int8_to_fp32_wrapper.c");

mindspore/lite/micro/coder/opcoders/nnacl/fp32/expand_dims_fp32_coder.cc

@@ -1,52 +0,0 @@
-/**
- * Copyright 2021 Huawei Technologies Co., Ltd
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "coder/opcoders/nnacl/fp32/expand_dims_fp32_coder.h"
-#include <string>
-#include "coder/opcoders/file_collector.h"
-#include "coder/opcoders/serializers/nnacl_serializer/nnacl_fp32_serializer.h"
-
-using mindspore::schema::PrimitiveType_ExpandDims;
-
-namespace mindspore::lite::micro::nnacl {
-int ExpandDimsFP32Coder::Prepare(CoderContext *const context) { return ReSize(); }
-
-int ExpandDimsFP32Coder::ReSize() {
-  data_size_ = input_tensor_->ElementsNum();
-  thread_sz_count_ = MSMIN(thread_num_, static_cast<int>(data_size_));
-  MS_CHECK_TRUE(thread_sz_count_ > 0, "thread_sz_count_ is less or equal to 0");
-  thread_sz_stride_ = UP_DIV(data_size_, thread_sz_count_);
-  return RET_OK;
-}
-
-int ExpandDimsFP32Coder::DoCode(CoderContext *const context) {
-  // generate code .h .c
-  Collect(context, {"nnacl/fp32/expandDims.h"}, {"nnacl/fp32/expandDims.c"});
-  NNaclFp32Serializer code;
-  int task_id = 0;
-  size_t size = MSMIN(thread_sz_stride_, static_cast<int>(data_size_ - task_id * thread_sz_stride_));
-  if (!size) {
-    return RET_OK;
-  }
-  code.CodeFunction("ExpandDims", input_tensor_, output_tensor_, size * sizeof(float));
-  context->AppendCode(code.str());
-  return RET_OK;
-}
-
-REG_OPERATOR_CODER(kAllTargets, kNumberTypeFloat32, PrimitiveType_ExpandDims, CPUOpCoderCreator<ExpandDimsFP32Coder>)
-
-REG_OPERATOR_CODER(kAllTargets, kNumberTypeInt32, PrimitiveType_ExpandDims, CPUOpCoderCreator<ExpandDimsFP32Coder>)
-}  // namespace mindspore::lite::micro::nnacl

mindspore/lite/micro/coder/opcoders/nnacl/fp32/expand_dims_fp32_coder.h

@@ -1,42 +0,0 @@
-/**
- * Copyright 2021 Huawei Technologies Co., Ltd
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#ifndef MINDSPORE_LITE_MICRO_CODER_OPCODERS_NNACL_EXPANDDIMS_FP32_CODER_H_
-#define MINDSPORE_LITE_MICRO_CODER_OPCODERS_NNACL_EXPANDDIMS_FP32_CODER_H_
-
-#include <vector>
-#include "coder/opcoders/op_coder.h"
-
-namespace mindspore::lite::micro::nnacl {
-class ExpandDimsFP32Coder final : public OperatorCoder {
- public:
-  ExpandDimsFP32Coder(const std::vector<Tensor *> &in_tensors, const std::vector<Tensor *> &out_tensors,
-                      const Model::Node *node, size_t node_index, Target target)
-      : OperatorCoder(in_tensors, out_tensors, node, node_index, target) {}
-
-  ~ExpandDimsFP32Coder() override = default;
-  int Prepare(CoderContext *const context) override;
-
-  int DoCode(CoderContext *const context) override;
-
- private:
-  int ReSize();
-  int thread_sz_count_{0};
-  int thread_sz_stride_{0};
-  size_t data_size_{0};
-};
-}  // namespace mindspore::lite::micro::nnacl
-#endif  // MINDSPORE_LITE_MICRO_CODER_OPCODERS_NNACL_EXPANDDIMS_FP32_CODER_H_

mindspore/lite/micro/coder/opcoders/nnacl/fp32/reshape_fp32_coder.cc

@@ -1,39 +0,0 @@
-/**
- * Copyright 2021 Huawei Technologies Co., Ltd
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "coder/opcoders/nnacl/fp32/reshape_fp32_coder.h"
-#include <string>
-#include "coder/opcoders/serializers/nnacl_serializer/nnacl_fp32_serializer.h"
-#include "coder/opcoders/file_collector.h"
-
-using mindspore::schema::PrimitiveType_Reshape;
-namespace mindspore::lite::micro::nnacl {
-
-int ReshapeFP32Coder::DoCode(CoderContext *const context) {
-  size_t data_size = input_tensor_->Size();
-
-  Collect(context, {"nnacl/reshape.h"}, {"reshape.c"});
-
-  NNaclFp32Serializer code;
-  code.CodeFunction("Reshape", input_tensor_, output_tensor_, data_size);
-  context->AppendCode(code.str());
-  return RET_OK;
-}
-
-REG_OPERATOR_CODER(kAllTargets, kNumberTypeFloat32, PrimitiveType_Reshape, CPUOpCoderCreator<ReshapeFP32Coder>)
-
-REG_OPERATOR_CODER(kAllTargets, kNumberTypeInt32, PrimitiveType_Reshape, CPUOpCoderCreator<ReshapeFP32Coder>)
-}  // namespace mindspore::lite::micro::nnacl

mindspore/lite/micro/coder/opcoders/nnacl/fp32/reshape_fp32_coder.h

@@ -1,35 +0,0 @@
-/**
- * Copyright 2021 Huawei Technologies Co., Ltd
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#ifndef MINDSPORE_LITE_MICRO_CODER_OPCODERS_NNACL_RESHAPE_FP32_CODER_H_
-#define MINDSPORE_LITE_MICRO_CODER_OPCODERS_NNACL_RESHAPE_FP32_CODER_H_
-
-#include <vector>
-#include "coder/opcoders/op_coder.h"
-
-namespace mindspore::lite::micro::nnacl {
-class ReshapeFP32Coder final : public OperatorCoder {
- public:
-  ReshapeFP32Coder(const std::vector<Tensor *> &in_tensors, const std::vector<Tensor *> &out_tensors,
-                   const Model::Node *node, size_t node_index, Target target)
-      : OperatorCoder(in_tensors, out_tensors, node, node_index, target) {}
-  ~ReshapeFP32Coder() override = default;
-  int Prepare(CoderContext *const context) override { return RET_OK; }
-
-  int DoCode(CoderContext *const context) override;
-};
-}  // namespace mindspore::lite::micro::nnacl
-#endif  // MINDSPORE_LITE_MICRO_CODER_OPCODERS_NNACL_RESHAPE_FP32_CODER_H_

mindspore/lite/micro/coder/opcoders/nnacl/fp32/squeeze_dims_fp32_coder.cc

@@ -1,45 +0,0 @@
-/**
- * Copyright 2021 Huawei Technologies Co., Ltd
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "coder/opcoders/nnacl/fp32/squeeze_dims_fp32_coder.h"
-#include <string>
-#include "coder/opcoders/serializers/nnacl_serializer/nnacl_fp32_serializer.h"
-#include "coder/opcoders/file_collector.h"
-
-using mindspore::schema::PrimitiveType_Squeeze;
-
-namespace mindspore::lite::micro::nnacl {
-
-int SqueezeFP32Coder::DoCode(CoderContext *const context) {
-  size_t data_size = input_tensor_->Size();
-  // generate code .h .c
-  Collect(context, {"nnacl/squeeze.h"}, {"nnacl/squeeze.c"});
-
-  NNaclFp32Serializer code;
-
-  // call the op function
-  if (input_tensor_->data_type() == kNumberTypeInt32) {
-    code.CodeFunction("DoSqueezeInt32", input_tensor_, output_tensor_, data_size);
-  } else {
-    code.CodeFunction("DoSqueeze", input_tensor_, output_tensor_, data_size);
-  }
-  context->AppendCode(code.str());
-  return RET_OK;
-}
-
-REG_OPERATOR_CODER(kAllTargets, kNumberTypeFloat32, PrimitiveType_Squeeze, CPUOpCoderCreator<SqueezeFP32Coder>)
-
-}  // namespace mindspore::lite::micro::nnacl

mindspore/lite/micro/coder/opcoders/nnacl/int8/conv2d_3x3_int8_coder.cc

@@ -113,10 +113,10 @@ int Conv2D3x3Int8Coder::InitTmpBuffer(CoderContext *const context) {
 void Conv2D3x3Int8Coder::ConfigInputOutput() { output_tensor_->set_format(schema::Format_NHWC); }
 
 int Conv2D3x3Int8Coder::Prepare(CoderContext *const context) {
+  MS_CHECK_RET_CODE(Conv2DBaseCoder::Init(), "ConvolutionBase init failed.");
   conv_param_->thread_num_ = thread_num_;
   // to 1, task id is set to 0
   conv_param_->op_parameter_.thread_num_ = thread_num_;
-  MS_CHECK_RET_CODE(Conv2DBaseCoder::Init(), "ConvolutionBase init failed.");
   MS_CHECK_RET_CODE(SetQuantParam(), "Set quant param failed.");
   MS_CHECK_RET_CODE(InitWeightBias(), "Init weight bias failed.");
   // init tmp input, output

mindspore/lite/micro/coder/opcoders/op_coder.h

@@ -62,6 +62,9 @@ class OperatorCoder {
   const std::vector<OperatorCoder *> input_ops() const { return input_ops_; }
   const std::vector<OperatorCoder *> output_ops() const { return output_ops_; }
 
+  void set_type(int type) { type_ = type; }
+  const int type() const { return type_; }
+
   size_t node_index() const;
 
   void set_parameter(OpParameter *parameter);
@@ -104,6 +107,7 @@ class OperatorCoder {
   std::vector<OperatorCoder *> input_ops_;
   std::vector<OperatorCoder *> output_ops_;
   std::vector<Tensor *> initial_parameters_;
+  int type_{schema::PrimitiveType_NONE};
 };
 
 // a template func for normal op_coder creator

mindspore/lite/micro/coder/opcoders/op_coder_builder.cc

@@ -71,6 +71,7 @@ std::unique_ptr<OperatorCoder> OpCoderBuilder::build() {
   op_coder->set_thread_num(thread_num);
   parameter->thread_num_ = thread_num;
   op_coder->set_parameter(parameter);
+  op_coder->set_type(primitive_type);
   return op_coder;
 }
 

mindspore/lite/micro/coder/opcoders/op_coder_register.cc

@@ -15,6 +15,7 @@
  */
 #include "coder/opcoders/op_coder_register.h"
 #include <utility>
+#include <string>
 namespace mindspore::lite::micro {
 
 bool CoderKey::operator<(const CoderKey rhs) const {
@@ -22,6 +23,14 @@ bool CoderKey::operator<(const CoderKey rhs) const {
          std::tie(rhs.target_, rhs.data_type_, rhs.op_type_);
 }
 
+std::string CoderKey::ToString() const {
+  std::ostringstream code;
+  code << "target: " << EnumNameTarget(target_) << "\t"
+       << "data_type_: " << data_type_ << "\t"
+       << "op_type: " << schema::EnumNamePrimitiveType(static_cast<schema::PrimitiveType>(op_type_));
+  return code.str();
+}
+
 OpCoderFactory *OpCoderFactory::GetInstance() {
   static OpCoderFactory reg;
   return &reg;
@@ -33,7 +42,7 @@ int OpCoderFactory::RegistOpCoder(Target target, TypeId data_type, schema::Primi
   CoderKey key(target, data_type, operator_type);
   // insert pair to registry
   if (this->opcoder_sets_.find(key) != this->opcoder_sets_.end()) {
-    MS_LOG(ERROR) << "coder has already exists!";
+    MS_LOG(ERROR) << "coder already exist: " << key.ToString();
     return RET_ERROR;
   }
   this->opcoder_sets_.insert(std::pair<CoderKey, CoderCreatorFunc>(key, creator_func));

mindspore/lite/micro/coder/opcoders/op_coder_register.h

@@ -20,6 +20,7 @@
 #include <map>
 #include <vector>
 #include <memory>
+#include <string>
 #include "src/lite_kernel.h"
 #include "include/model.h"
 #include "coder/coder_config.h"
@@ -41,6 +42,7 @@ class CoderKey {
   }
 
   bool operator<(CoderKey rhs) const;
+  std::string ToString() const;
 
   ~CoderKey() = default;
 

mindspore/lite/src/ops/populate/populate_register.h

@@ -41,7 +41,8 @@ class PopulateRegistry {
     ParameterGen param_creator = nullptr;
     auto iter = parameters_.find(GenPrimVersionKey(type, version));
     if (iter == parameters_.end()) {
-      MS_LOG(ERROR) << "Unsupported parameter type in Create : " << type;
+      MS_LOG(ERROR) << "Unsupported parameter type in Create : "
+                    << schema::EnumNamePrimitiveType(static_cast<schema::PrimitiveType>(type));
       return nullptr;
     }
     param_creator = iter->second;