From 8407ccf455c1d5a34f1f3e7a0bc91229e8736048 Mon Sep 17 00:00:00 2001 From: VectorSL Date: Tue, 30 Mar 2021 14:33:27 +0800 Subject: [PATCH] addn support 5D --- .../backend/kernel_compiler/gpu/math/addn_gpu_kernel.h | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/mindspore/ccsrc/backend/kernel_compiler/gpu/math/addn_gpu_kernel.h b/mindspore/ccsrc/backend/kernel_compiler/gpu/math/addn_gpu_kernel.h index b017c741c5..bb86d2453d 100644 --- a/mindspore/ccsrc/backend/kernel_compiler/gpu/math/addn_gpu_kernel.h +++ b/mindspore/ccsrc/backend/kernel_compiler/gpu/math/addn_gpu_kernel.h @@ -108,20 +108,20 @@ class AddNGpuFwdKernel : public GpuKernel { for (size_t i = input_shape.size(); i < 4; i++) { (void)input_shape.insert(input_shape.begin(), 1); } - int dimA[4]; + std::vector dimA; for (size_t i = 0; i < input_shape.size(); i++) { - dimA[i] = SizeToInt(input_shape[i]); + dimA.push_back(SizeToInt(input_shape[i])); } auto input_format = AnfAlgo::GetInputFormat(kernel_node, 0); if (input_format == kOpFormat_NHWC) { CHECK_CUDNN_RET_WITH_EXCEPT(kernel_node_, cudnnSetTensorNdDescriptorEx(input_descriptor_, CUDNN_TENSOR_NHWC, cudnn_data_type_, - SizeToInt(input_shape.size()), dimA), + SizeToInt(input_shape.size()), dimA.data()), "cudnnSetTensorNdDescriptor failed"); } else { CHECK_CUDNN_RET_WITH_EXCEPT(kernel_node_, cudnnSetTensorNdDescriptorEx(input_descriptor_, CUDNN_TENSOR_NCHW, cudnn_data_type_, - SizeToInt(input_shape.size()), dimA), + SizeToInt(input_shape.size()), dimA.data()), "cudnnSetTensorNdDescriptor failed"); } InitSizeLists();