Browse Source

!14784 [CPU] Change the location of nnacl directory

From: @zhanyuan1
Reviewed-by: @zhaizhiqiang,@zhang_xue_tong
Signed-off-by: @zhaizhiqiang
pull/14784/MERGE
mindspore-ci-bot Gitee 4 years ago
parent
commit
0432bada1c
100 changed files with 210 additions and 20 deletions
  1. +15
    -15
      cmake/package_lite.cmake
  2. +3
    -2
      mindspore/ccsrc/CMakeLists.txt
  3. +30
    -3
      mindspore/ccsrc/backend/kernel_compiler/CMakeLists.txt
  4. +0
    -0
      mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/CMakeLists.txt
  5. +0
    -0
      mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/README.md
  6. +32
    -0
      mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/adder.h
  7. +54
    -0
      mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/arg_min_max_parameter.h
  8. +46
    -0
      mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/arithmetic.h
  9. +30
    -0
      mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/arithmetic_self_parameter.h
  10. +0
    -0
      mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/arm32/ConvDw3x3Int8BorderPixel.S
  11. +0
    -0
      mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/arm32/ConvDwFp32Border.S
  12. +0
    -0
      mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/arm32/ConvDwFp32Center.S
  13. +0
    -0
      mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/arm32/ConvDwFp32Row.S
  14. +0
    -0
      mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/arm32/ConvDwInt8Center.S
  15. +0
    -0
      mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/arm32/ConvDwInt8PostAlign4.S
  16. +0
    -0
      mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/arm32/ConvDwInt8PostAlign4PerChannel.S
  17. +0
    -0
      mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/arm32/ConvDwInt8Row.S
  18. +0
    -0
      mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/arm32/DeconvDwFp32Center.S
  19. +0
    -0
      mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/arm32/DeconvDwInt8Center.S
  20. +0
    -0
      mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/arm32/DeconvDwInt8Post.S
  21. +0
    -0
      mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/arm32/IndirectGemmInt16to32_8x4.S
  22. +0
    -0
      mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/arm32/IndirectGemmInt8_2x4.S
  23. +0
    -0
      mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/arm32/MatVecMulFp32.S
  24. +0
    -0
      mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/arm32/MatmulFp32.S
  25. +0
    -0
      mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/arm32/MatmulFp32Opt.S
  26. +0
    -0
      mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/arm32/MatmulFp32Opt12x4.S
  27. +0
    -0
      mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/arm32/MatmulInt8.S
  28. +0
    -0
      mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/arm32/MatmulInt8Opt.S
  29. +0
    -0
      mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/arm32/MatmulWinogradFp32.S
  30. +0
    -0
      mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/arm32/PostFuncBiasReluC4.S
  31. +0
    -0
      mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/arm32/PostFuncBiasReluC8.S
  32. +0
    -0
      mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/arm32/PreSum4x16Int8Peroc.S
  33. +0
    -0
      mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/arm32/PreSum4x16Int8Pert.S
  34. +0
    -0
      mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/arm32/TiledC4MatmulFp32.S
  35. +0
    -0
      mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/arm32/WinogradTransLeft.S
  36. +0
    -0
      mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/arm32/WinogradTransRight.S
  37. +0
    -0
      mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/arm64/AdderFp32.S
  38. +0
    -0
      mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/arm64/ConvDw3x3Fp32Corner.S
  39. +0
    -0
      mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/arm64/ConvDw3x3Fp32Horizontal.S
  40. +0
    -0
      mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/arm64/ConvDw3x3Fp32Stride1.S
  41. +0
    -0
      mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/arm64/ConvDw3x3Fp32Stride2.S
  42. +0
    -0
      mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/arm64/ConvDw3x3Fp32Vertical.S
  43. +0
    -0
      mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/arm64/ConvDw3x3Int8.S
  44. +0
    -0
      mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/arm64/ConvDw3x3Int8Corner.S
  45. +0
    -0
      mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/arm64/ConvDw3x3Int8Horizontal.S
  46. +0
    -0
      mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/arm64/ConvDw3x3Int8Stride2.S
  47. +0
    -0
      mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/arm64/ConvDw3x3Int8Vertical.S
  48. +0
    -0
      mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/arm64/ConvDwFp32Border.S
  49. +0
    -0
      mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/arm64/ConvDwFp32Center.S
  50. +0
    -0
      mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/arm64/ConvDwFp32Indirect3x3.S
  51. +0
    -0
      mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/arm64/ConvDwFp32Indirect5x5.S
  52. +0
    -0
      mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/arm64/ConvDwFp32Row.S
  53. +0
    -0
      mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/arm64/ConvDwInt8Center.S
  54. +0
    -0
      mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/arm64/ConvDwInt8PostAlign4.S
  55. +0
    -0
      mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/arm64/ConvDwInt8PostAlign4PerChannel.S
  56. +0
    -0
      mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/arm64/ConvDwInt8Row.S
  57. +0
    -0
      mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/arm64/ConvFp32Center.S
  58. +0
    -0
      mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/arm64/DeconvDwFp32Border.S
  59. +0
    -0
      mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/arm64/DeconvDwFp32Center.S
  60. +0
    -0
      mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/arm64/DeconvDwInt8Center.S
  61. +0
    -0
      mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/arm64/DeconvDwInt8Post.S
  62. +0
    -0
      mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/arm64/IndirectGemmInt16to32_8x4.S
  63. +0
    -0
      mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/arm64/MatVecMulFp32.S
  64. +0
    -0
      mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/arm64/MatmulFp32.S
  65. +0
    -0
      mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/arm64/MatmulFp32Opt.S
  66. +0
    -0
      mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/arm64/MatmulInt8.S
  67. +0
    -0
      mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/arm64/MatmulInt8Opt.S
  68. +0
    -0
      mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/arm64/MatmulR4Int8.S
  69. +0
    -0
      mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/arm64/MatmulWinogradFp32.S
  70. +0
    -0
      mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/arm64/PostFuncBiasReluC4.S
  71. +0
    -0
      mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/arm64/PostFuncBiasReluC8.S
  72. +0
    -0
      mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/arm64/PostFuncInt8C4Neon64.S
  73. +0
    -0
      mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/arm64/PreSum4x16Int8Peroc.S
  74. +0
    -0
      mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/arm64/PreSum4x16Int8Pert.S
  75. +0
    -0
      mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/arm64/TiledC4MatmulFp32.S
  76. +0
    -0
      mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/arm64/WinogradTransLeft.S
  77. +0
    -0
      mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/arm64/WinogradTransRight.S
  78. +0
    -0
      mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/avx/ConvDwFp32Avx3x3.S
  79. +0
    -0
      mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/avx/ConvDwFp32BorderAvx.S
  80. +0
    -0
      mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/avx/ConvDwFp32RowAvx.S
  81. +0
    -0
      mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/avx/MatmulAvx.S
  82. +0
    -0
      mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/fp16/ConvDwFp16Border.S
  83. +0
    -0
      mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/fp16/ConvDwFp16Center.S
  84. +0
    -0
      mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/fp16/ConvDwFp16Row.S
  85. +0
    -0
      mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/fp16/DeconvDwFp16Border.S
  86. +0
    -0
      mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/fp16/DeconvDwFp16Center.S
  87. +0
    -0
      mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/fp16/Float16ToFloat32.S
  88. +0
    -0
      mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/fp16/Float32ToFloat16.S
  89. +0
    -0
      mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/fp16/IndirectGemmFp16_16x8.S
  90. +0
    -0
      mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/fp16/MatVecMulFp16.S
  91. +0
    -0
      mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/fp16/MatmulFp16.S
  92. +0
    -0
      mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/fp16/MatmulFp16Opt.S
  93. +0
    -0
      mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/fp16/MatmulWinogradFp16.S
  94. +0
    -0
      mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/fp16/PostFuncBiasReluC4Fp16.S
  95. +0
    -0
      mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/fp16/PostFuncBiasReluC8Fp16.S
  96. +0
    -0
      mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/fp16/TiledC4MatmulFp16.S
  97. +0
    -0
      mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/fp16/WinogradTransLeftFp16.S
  98. +0
    -0
      mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/fp16/WinogradTransRightFp16.S
  99. +0
    -0
      mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/opt/MatmulDpInt8.S
  100. +0
    -0
      mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/opt/MatmulDpInt8Opt.S

+ 15
- 15
cmake/package_lite.cmake View File

@@ -153,15 +153,15 @@ if(PLATFORM_ARM64)
COMPONENT ${RUNTIME_COMPONENT_NAME})
install(DIRECTORY ${TOP_DIR}/include/api/ DESTINATION ${RUNTIME_INC_DIR}/api
COMPONENT ${RUNTIME_COMPONENT_NAME} FILES_MATCHING PATTERN "*.h" PATTERN "ops*" EXCLUDE)
file(GLOB NNACL_FILES GLOB ${TOP_DIR}/mindspore/lite/nnacl/*.h)
file(GLOB NNACL_FILES GLOB ${NNACL_DIR}/*.h)
install(FILES ${NNACL_FILES} DESTINATION ${CODEGEN_ROOT_DIR}/include/nnacl COMPONENT ${RUNTIME_COMPONENT_NAME})
install(DIRECTORY ${TOP_DIR}/mindspore/lite/nnacl/base DESTINATION ${CODEGEN_ROOT_DIR}/include/nnacl
install(DIRECTORY ${NNACL_DIR}/base DESTINATION ${CODEGEN_ROOT_DIR}/include/nnacl
COMPONENT ${RUNTIME_COMPONENT_NAME} FILES_MATCHING PATTERN "*.h")
install(DIRECTORY ${TOP_DIR}/mindspore/lite/nnacl/int8 DESTINATION ${CODEGEN_ROOT_DIR}/include/nnacl
install(DIRECTORY ${NNACL_DIR}/int8 DESTINATION ${CODEGEN_ROOT_DIR}/include/nnacl
COMPONENT ${RUNTIME_COMPONENT_NAME} FILES_MATCHING PATTERN "*.h")
install(DIRECTORY ${TOP_DIR}/mindspore/lite/nnacl/fp32 DESTINATION ${CODEGEN_ROOT_DIR}/include/nnacl
install(DIRECTORY ${NNACL_DIR}/fp32 DESTINATION ${CODEGEN_ROOT_DIR}/include/nnacl
COMPONENT ${RUNTIME_COMPONENT_NAME} FILES_MATCHING PATTERN "*.h")
install(DIRECTORY ${TOP_DIR}/mindspore/lite/nnacl/intrinsics DESTINATION ${CODEGEN_ROOT_DIR}/include/nnacl
install(DIRECTORY ${NNACL_DIR}/intrinsics DESTINATION ${CODEGEN_ROOT_DIR}/include/nnacl
COMPONENT ${RUNTIME_COMPONENT_NAME} FILES_MATCHING PATTERN "*.h")
install(DIRECTORY ${TOP_DIR}/mindspore/lite/micro/coder/wrapper DESTINATION ${CODEGEN_ROOT_DIR}/include
COMPONENT ${RUNTIME_COMPONENT_NAME} FILES_MATCHING PATTERN "*.h")
@@ -185,15 +185,15 @@ elseif(PLATFORM_ARM32)
COMPONENT ${RUNTIME_COMPONENT_NAME})
install(DIRECTORY ${TOP_DIR}/include/api/ DESTINATION ${RUNTIME_INC_DIR}/api
COMPONENT ${RUNTIME_COMPONENT_NAME} FILES_MATCHING PATTERN "*.h" PATTERN "ops*" EXCLUDE)
file(GLOB NNACL_FILES GLOB ${TOP_DIR}/mindspore/lite/nnacl/*.h)
file(GLOB NNACL_FILES GLOB ${NNACL_DIR}/*.h)
install(FILES ${NNACL_FILES} DESTINATION ${CODEGEN_ROOT_DIR}/include/nnacl COMPONENT ${RUNTIME_COMPONENT_NAME})
install(DIRECTORY ${TOP_DIR}/mindspore/lite/nnacl/base DESTINATION ${CODEGEN_ROOT_DIR}/include/nnacl
install(DIRECTORY ${NNACL_DIR}/base DESTINATION ${CODEGEN_ROOT_DIR}/include/nnacl
COMPONENT ${RUNTIME_COMPONENT_NAME} FILES_MATCHING PATTERN "*.h")
install(DIRECTORY ${TOP_DIR}/mindspore/lite/nnacl/int8 DESTINATION ${CODEGEN_ROOT_DIR}/include/nnacl
install(DIRECTORY ${NNACL_DIR}/int8 DESTINATION ${CODEGEN_ROOT_DIR}/include/nnacl
COMPONENT ${RUNTIME_COMPONENT_NAME} FILES_MATCHING PATTERN "*.h")
install(DIRECTORY ${TOP_DIR}/mindspore/lite/nnacl/fp32 DESTINATION ${CODEGEN_ROOT_DIR}/include/nnacl
install(DIRECTORY ${NNACL_DIR}/fp32 DESTINATION ${CODEGEN_ROOT_DIR}/include/nnacl
COMPONENT ${RUNTIME_COMPONENT_NAME} FILES_MATCHING PATTERN "*.h")
install(DIRECTORY ${TOP_DIR}/mindspore/lite/nnacl/intrinsics DESTINATION ${CODEGEN_ROOT_DIR}/include/nnacl
install(DIRECTORY ${NNACL_DIR}/intrinsics DESTINATION ${CODEGEN_ROOT_DIR}/include/nnacl
COMPONENT ${RUNTIME_COMPONENT_NAME} FILES_MATCHING PATTERN "*.h")
install(DIRECTORY ${TOP_DIR}/mindspore/lite/micro/coder/wrapper DESTINATION ${CODEGEN_ROOT_DIR}/include
COMPONENT ${RUNTIME_COMPONENT_NAME} FILES_MATCHING PATTERN "*.h")
@@ -262,15 +262,15 @@ else()
install(FILES ${glog_LIBPATH}/libglog.so.0.4.0
DESTINATION ${CONVERTER_ROOT_DIR}/third_party/glog/lib RENAME libglog.so.0
COMPONENT ${RUNTIME_COMPONENT_NAME})
file(GLOB NNACL_FILES GLOB ${TOP_DIR}/mindspore/lite/nnacl/*.h)
file(GLOB NNACL_FILES GLOB ${NNACL_DIR}/*.h)
install(FILES ${NNACL_FILES} DESTINATION ${CODEGEN_ROOT_DIR}/include/nnacl COMPONENT ${RUNTIME_COMPONENT_NAME})
install(DIRECTORY ${TOP_DIR}/mindspore/lite/nnacl/base DESTINATION ${CODEGEN_ROOT_DIR}/include/nnacl
install(DIRECTORY ${NNACL_DIR}/base DESTINATION ${CODEGEN_ROOT_DIR}/include/nnacl
COMPONENT ${RUNTIME_COMPONENT_NAME} FILES_MATCHING PATTERN "*.h")
install(DIRECTORY ${TOP_DIR}/mindspore/lite/nnacl/int8 DESTINATION ${CODEGEN_ROOT_DIR}/include/nnacl
install(DIRECTORY ${NNACL_DIR}/int8 DESTINATION ${CODEGEN_ROOT_DIR}/include/nnacl
COMPONENT ${RUNTIME_COMPONENT_NAME} FILES_MATCHING PATTERN "*.h")
install(DIRECTORY ${TOP_DIR}/mindspore/lite/nnacl/fp32 DESTINATION ${CODEGEN_ROOT_DIR}/include/nnacl
install(DIRECTORY ${NNACL_DIR}/fp32 DESTINATION ${CODEGEN_ROOT_DIR}/include/nnacl
COMPONENT ${RUNTIME_COMPONENT_NAME} FILES_MATCHING PATTERN "*.h")
install(DIRECTORY ${TOP_DIR}/mindspore/lite/nnacl/intrinsics DESTINATION ${CODEGEN_ROOT_DIR}/include/nnacl
install(DIRECTORY ${NNACL_DIR}/intrinsics DESTINATION ${CODEGEN_ROOT_DIR}/include/nnacl
COMPONENT ${RUNTIME_COMPONENT_NAME} FILES_MATCHING PATTERN "*.h")
install(DIRECTORY ${TOP_DIR}/mindspore/lite/micro/coder/wrapper DESTINATION ${CODEGEN_ROOT_DIR}/include
COMPONENT ${RUNTIME_COMPONENT_NAME} FILES_MATCHING PATTERN "*.h")


+ 3
- 2
mindspore/ccsrc/CMakeLists.txt View File

@@ -4,6 +4,7 @@ include_directories(${CMAKE_CURRENT_SOURCE_DIR})
include_directories(${CMAKE_BINARY_DIR})

if(ENABLE_CPU)
include_directories(${CMAKE_CURRENT_SOURCE_DIR}/backend/kernel_compiler/cpu)
if("${X86_64_SIMD}" STREQUAL "sse")
add_compile_definitions(ENABLE_SSE)
set(CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -msse4.2")
@@ -12,8 +13,8 @@ if(ENABLE_CPU)
if("${X86_64_SIMD}" STREQUAL "avx")
add_compile_definitions(ENABLE_SSE)
add_compile_definitions(ENABLE_AVX)
set(CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -mavx2")
set(CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} -mavx2")
set(CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -msse4.1 -mavx -mavx2")
set(CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} -msse4.1 -mavx -mavx2")
endif()
endif()



+ 30
- 3
mindspore/ccsrc/backend/kernel_compiler/CMakeLists.txt View File

@@ -29,8 +29,35 @@ if(ENABLE_D)
endif()

if(ENABLE_CPU)
file(GLOB_RECURSE CPU_SRC_LIST RELATIVE ${CMAKE_CURRENT_SOURCE_DIR}
set(CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -fPIC")
file(GLOB NNACL_C_SRC RELATIVE ${CMAKE_CURRENT_SOURCE_DIR}
"cpu/nnacl/*.c"
"cpu/nnacl/fp32/*.c"
"cpu/nnacl/int8/*.c"
"cpu/nnacl/infer/*.c"
"cpu/nnacl/base/*.c"
)
if("${X86_64_SIMD}" STREQUAL "sse")
file(GLOB NNACL_ASM_SRC RELATIVE ${CMAKE_CURRENT_SOURCE_DIR}
"cpu/nnacl/intrinsics/sse/*.c"
)
set_property(SOURCE ${NNACL_ASM_SRC} PROPERTY LANGUAGE C)
endif()
if("${X86_64_SIMD}" STREQUAL "avx")
file(GLOB NNACL_ASM_SRC RELATIVE ${CMAKE_CURRENT_SOURCE_DIR}
"cpu/nnacl/intrinsics/sse/*.c"
"cpu/nnacl/intrinsics/avx/*.c"
"cpu/nnacl/assembly/avx/*.S"
)
set_property(SOURCE ${NNACL_ASM_SRC} PROPERTY LANGUAGE C)
endif()
set(NNACL_SRC ${NNACL_C_SRC} ${NNACL_ASM_SRC})

file(GLOB CPU_SRC_LIST RELATIVE ${CMAKE_CURRENT_SOURCE_DIR}
"cpu/*.cc"
"cpu/mkldnn/*.cc"
"cpu/ps/*.cc"
"cpu/quantum/*.cc"
)

if(NOT ENABLE_MPI)
@@ -102,7 +129,7 @@ if(ENABLE_GPU)
# add_library(_mindspore_kernel_cuda_obj OBJECT ${CUDA_SRC_LIST})
endif()

set_property(SOURCE ${KERNEL_SRC_LIST} ${CPU_SRC_LIST} ${GPU_SRC_LIST} ${D_SRC_LIST}
set_property(SOURCE ${KERNEL_SRC_LIST} ${NNACL_SRC} ${CPU_SRC_LIST} ${GPU_SRC_LIST} ${D_SRC_LIST}
PROPERTY COMPILE_DEFINITIONS SUBMODULE_ID=mindspore::SubModuleId::SM_KERNEL)
add_library(_mindspore_backend_kernel_compiler_obj OBJECT ${KERNEL_SRC_LIST} ${CPU_SRC_LIST}
add_library(_mindspore_backend_kernel_compiler_obj OBJECT ${KERNEL_SRC_LIST} ${NNACL_SRC} ${CPU_SRC_LIST}
${GPU_SRC_LIST} ${D_SRC_LIST} ${QUANTUM_SRC_LIST})

mindspore/lite/nnacl/CMakeLists.txt → mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/CMakeLists.txt View File


mindspore/lite/nnacl/README.md → mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/README.md View File


+ 32
- 0
mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/adder.h View File

@@ -0,0 +1,32 @@
/**
* Copyright 2020 Huawei Technologies Co., Ltd
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#ifndef MINDSPORE_NNACL_ADDER_H_
#define MINDSPORE_NNACL_ADDER_H_

#include "nnacl/op_base.h"

typedef struct AdderParameter {
OpParameter op_parameter_;
} AdderParameter;

#ifdef __cplusplus
extern "C" {
#endif

#ifdef __cplusplus
}
#endif
#endif // MINDSPORE_NNACL_ADDER_H_

+ 54
- 0
mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/arg_min_max_parameter.h View File

@@ -0,0 +1,54 @@
/**
* Copyright 2020 Huawei Technologies Co., Ltd
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/

#ifndef MINDSPORE_NNACL_ARG_MIN_MAX_PARAMETER_H_
#define MINDSPORE_NNACL_ARG_MIN_MAX_PARAMETER_H_

#ifdef ENABLE_ARM64
#include <arm_neon.h>
#endif
#include "nnacl/op_base.h"

typedef int (*COMPARE_FUNCTION)(const void *a, const void *b);

typedef struct ArgElement {
uint32_t index_;
union ArgData {
int8_t i8_data_;
int32_t i_data_;
float f_data_;
#ifdef ENABLE_ARM64
float16_t f16_data_;
#endif
} data_;
} ArgElement;

typedef struct ArgMinMaxParameter {
OpParameter op_parameter_;
bool out_value_;
bool keep_dims_;
bool get_max_;
int32_t axis_;
int32_t topk_;
int32_t axis_type_;
int32_t dims_size_;
int32_t data_type_; // equals to type_id
int32_t in_strides_[COMM_SHAPE_SIZE];
int32_t out_strides_[COMM_SHAPE_SIZE];
ArgElement *arg_elements_;
} ArgMinMaxParameter;

#endif // MINDSPORE_NNACL_ARG_MIN_MAX_PARAMETER_H_

+ 46
- 0
mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/arithmetic.h View File

@@ -0,0 +1,46 @@
/**
* Copyright 2020 Huawei Technologies Co., Ltd
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/

#ifndef MINDSPORE_NNACL_ARTITHMETIC_H_
#define MINDSPORE_NNACL_ARTITHMETIC_H_

#include "nnacl/op_base.h"
#include "nnacl/common_func.h"
#include "nnacl/nnacl_utils.h"

typedef struct ArithmeticParameter {
OpParameter op_parameter_;
bool broadcasting_;
size_t ndim_;
int activation_type_;
int in_shape0_[10];
int in_elements_num0_;
int in_shape1_[10];
int in_elements_num1_;

int out_shape_[10];
int out_elements_num_;

int in_strides0_[10];
int in_strides1_[10];
int out_strides_[10];

int multiples0_[10];
int multiples1_[10];
int eltwise_mode_; // eltwise need
} ArithmeticParameter;

#endif // MINDSPORE_NNACL_ARTITHMETIC_H_

+ 30
- 0
mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/arithmetic_self_parameter.h View File

@@ -0,0 +1,30 @@
/**
* Copyright 2020 Huawei Technologies Co., Ltd
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/

#ifndef MINDSPORE_NNACL_ARITHMETIC_SELF_PARAMETER_H_
#define MINDSPORE_NNACL_ARITHMETIC_SELF_PARAMETER_H_

#include "nnacl/op_base.h"
#include "nnacl/errorcode.h"
#include "nnacl/int8/quantize.h"

// For Abs, Cos, Exp, Log, Square, Sqrt, Rsqrt ops.
typedef struct ArithmeticSelfParameter {
OpParameter op_parameter_;
ArithSelfQuantArg quant_arg_;
} ArithmeticSelfParameter;

#endif // MINDSPORE_NNACL_ARITHMETIC_SELF_PARAMETER_H_

mindspore/lite/nnacl/assembly/arm32/ConvDw3x3Int8BorderPixel.S → mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/arm32/ConvDw3x3Int8BorderPixel.S View File


mindspore/lite/nnacl/assembly/arm32/ConvDwFp32Border.S → mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/arm32/ConvDwFp32Border.S View File


mindspore/lite/nnacl/assembly/arm32/ConvDwFp32Center.S → mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/arm32/ConvDwFp32Center.S View File


mindspore/lite/nnacl/assembly/arm32/ConvDwFp32Row.S → mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/arm32/ConvDwFp32Row.S View File


mindspore/lite/nnacl/assembly/arm32/ConvDwInt8Center.S → mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/arm32/ConvDwInt8Center.S View File


mindspore/lite/nnacl/assembly/arm32/ConvDwInt8PostAlign4.S → mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/arm32/ConvDwInt8PostAlign4.S View File


mindspore/lite/nnacl/assembly/arm32/ConvDwInt8PostAlign4PerChannel.S → mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/arm32/ConvDwInt8PostAlign4PerChannel.S View File


mindspore/lite/nnacl/assembly/arm32/ConvDwInt8Row.S → mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/arm32/ConvDwInt8Row.S View File


mindspore/lite/nnacl/assembly/arm32/DeconvDwFp32Center.S → mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/arm32/DeconvDwFp32Center.S View File


mindspore/lite/nnacl/assembly/arm32/DeconvDwInt8Center.S → mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/arm32/DeconvDwInt8Center.S View File


mindspore/lite/nnacl/assembly/arm32/DeconvDwInt8Post.S → mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/arm32/DeconvDwInt8Post.S View File


mindspore/lite/nnacl/assembly/arm32/IndirectGemmInt16to32_8x4.S → mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/arm32/IndirectGemmInt16to32_8x4.S View File


mindspore/lite/nnacl/assembly/arm32/IndirectGemmInt8_2x4.S → mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/arm32/IndirectGemmInt8_2x4.S View File


mindspore/lite/nnacl/assembly/arm32/MatVecMulFp32.S → mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/arm32/MatVecMulFp32.S View File


mindspore/lite/nnacl/assembly/arm32/MatmulFp32.S → mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/arm32/MatmulFp32.S View File


mindspore/lite/nnacl/assembly/arm32/MatmulFp32Opt.S → mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/arm32/MatmulFp32Opt.S View File


mindspore/lite/nnacl/assembly/arm32/MatmulFp32Opt12x4.S → mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/arm32/MatmulFp32Opt12x4.S View File


mindspore/lite/nnacl/assembly/arm32/MatmulInt8.S → mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/arm32/MatmulInt8.S View File


mindspore/lite/nnacl/assembly/arm32/MatmulInt8Opt.S → mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/arm32/MatmulInt8Opt.S View File


mindspore/lite/nnacl/assembly/arm32/MatmulWinogradFp32.S → mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/arm32/MatmulWinogradFp32.S View File


mindspore/lite/nnacl/assembly/arm32/PostFuncBiasReluC4.S → mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/arm32/PostFuncBiasReluC4.S View File


mindspore/lite/nnacl/assembly/arm32/PostFuncBiasReluC8.S → mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/arm32/PostFuncBiasReluC8.S View File


mindspore/lite/nnacl/assembly/arm32/PreSum4x16Int8Peroc.S → mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/arm32/PreSum4x16Int8Peroc.S View File


mindspore/lite/nnacl/assembly/arm32/PreSum4x16Int8Pert.S → mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/arm32/PreSum4x16Int8Pert.S View File


mindspore/lite/nnacl/assembly/arm32/TiledC4MatmulFp32.S → mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/arm32/TiledC4MatmulFp32.S View File


mindspore/lite/nnacl/assembly/arm32/WinogradTransLeft.S → mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/arm32/WinogradTransLeft.S View File


mindspore/lite/nnacl/assembly/arm32/WinogradTransRight.S → mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/arm32/WinogradTransRight.S View File


mindspore/lite/nnacl/assembly/arm64/AdderFp32.S → mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/arm64/AdderFp32.S View File


mindspore/lite/nnacl/assembly/arm64/ConvDw3x3Fp32Corner.S → mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/arm64/ConvDw3x3Fp32Corner.S View File


mindspore/lite/nnacl/assembly/arm64/ConvDw3x3Fp32Horizontal.S → mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/arm64/ConvDw3x3Fp32Horizontal.S View File


mindspore/lite/nnacl/assembly/arm64/ConvDw3x3Fp32Stride1.S → mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/arm64/ConvDw3x3Fp32Stride1.S View File


mindspore/lite/nnacl/assembly/arm64/ConvDw3x3Fp32Stride2.S → mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/arm64/ConvDw3x3Fp32Stride2.S View File


mindspore/lite/nnacl/assembly/arm64/ConvDw3x3Fp32Vertical.S → mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/arm64/ConvDw3x3Fp32Vertical.S View File


mindspore/lite/nnacl/assembly/arm64/ConvDw3x3Int8.S → mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/arm64/ConvDw3x3Int8.S View File


mindspore/lite/nnacl/assembly/arm64/ConvDw3x3Int8Corner.S → mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/arm64/ConvDw3x3Int8Corner.S View File


mindspore/lite/nnacl/assembly/arm64/ConvDw3x3Int8Horizontal.S → mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/arm64/ConvDw3x3Int8Horizontal.S View File


mindspore/lite/nnacl/assembly/arm64/ConvDw3x3Int8Stride2.S → mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/arm64/ConvDw3x3Int8Stride2.S View File


mindspore/lite/nnacl/assembly/arm64/ConvDw3x3Int8Vertical.S → mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/arm64/ConvDw3x3Int8Vertical.S View File


mindspore/lite/nnacl/assembly/arm64/ConvDwFp32Border.S → mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/arm64/ConvDwFp32Border.S View File


mindspore/lite/nnacl/assembly/arm64/ConvDwFp32Center.S → mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/arm64/ConvDwFp32Center.S View File


mindspore/lite/nnacl/assembly/arm64/ConvDwFp32Indirect3x3.S → mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/arm64/ConvDwFp32Indirect3x3.S View File


mindspore/lite/nnacl/assembly/arm64/ConvDwFp32Indirect5x5.S → mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/arm64/ConvDwFp32Indirect5x5.S View File


mindspore/lite/nnacl/assembly/arm64/ConvDwFp32Row.S → mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/arm64/ConvDwFp32Row.S View File


mindspore/lite/nnacl/assembly/arm64/ConvDwInt8Center.S → mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/arm64/ConvDwInt8Center.S View File


mindspore/lite/nnacl/assembly/arm64/ConvDwInt8PostAlign4.S → mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/arm64/ConvDwInt8PostAlign4.S View File


mindspore/lite/nnacl/assembly/arm64/ConvDwInt8PostAlign4PerChannel.S → mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/arm64/ConvDwInt8PostAlign4PerChannel.S View File


mindspore/lite/nnacl/assembly/arm64/ConvDwInt8Row.S → mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/arm64/ConvDwInt8Row.S View File


mindspore/lite/nnacl/assembly/arm64/ConvFp32Center.S → mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/arm64/ConvFp32Center.S View File


mindspore/lite/nnacl/assembly/arm64/DeconvDwFp32Border.S → mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/arm64/DeconvDwFp32Border.S View File


mindspore/lite/nnacl/assembly/arm64/DeconvDwFp32Center.S → mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/arm64/DeconvDwFp32Center.S View File


mindspore/lite/nnacl/assembly/arm64/DeconvDwInt8Center.S → mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/arm64/DeconvDwInt8Center.S View File


mindspore/lite/nnacl/assembly/arm64/DeconvDwInt8Post.S → mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/arm64/DeconvDwInt8Post.S View File


mindspore/lite/nnacl/assembly/arm64/IndirectGemmInt16to32_8x4.S → mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/arm64/IndirectGemmInt16to32_8x4.S View File


mindspore/lite/nnacl/assembly/arm64/MatVecMulFp32.S → mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/arm64/MatVecMulFp32.S View File


mindspore/lite/nnacl/assembly/arm64/MatmulFp32.S → mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/arm64/MatmulFp32.S View File


mindspore/lite/nnacl/assembly/arm64/MatmulFp32Opt.S → mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/arm64/MatmulFp32Opt.S View File


mindspore/lite/nnacl/assembly/arm64/MatmulInt8.S → mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/arm64/MatmulInt8.S View File


mindspore/lite/nnacl/assembly/arm64/MatmulInt8Opt.S → mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/arm64/MatmulInt8Opt.S View File


mindspore/lite/nnacl/assembly/arm64/MatmulR4Int8.S → mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/arm64/MatmulR4Int8.S View File


mindspore/lite/nnacl/assembly/arm64/MatmulWinogradFp32.S → mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/arm64/MatmulWinogradFp32.S View File


mindspore/lite/nnacl/assembly/arm64/PostFuncBiasReluC4.S → mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/arm64/PostFuncBiasReluC4.S View File


mindspore/lite/nnacl/assembly/arm64/PostFuncBiasReluC8.S → mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/arm64/PostFuncBiasReluC8.S View File


mindspore/lite/nnacl/assembly/arm64/PostFuncInt8C4Neon64.S → mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/arm64/PostFuncInt8C4Neon64.S View File


mindspore/lite/nnacl/assembly/arm64/PreSum4x16Int8Peroc.S → mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/arm64/PreSum4x16Int8Peroc.S View File


mindspore/lite/nnacl/assembly/arm64/PreSum4x16Int8Pert.S → mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/arm64/PreSum4x16Int8Pert.S View File


mindspore/lite/nnacl/assembly/arm64/TiledC4MatmulFp32.S → mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/arm64/TiledC4MatmulFp32.S View File


mindspore/lite/nnacl/assembly/arm64/WinogradTransLeft.S → mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/arm64/WinogradTransLeft.S View File


mindspore/lite/nnacl/assembly/arm64/WinogradTransRight.S → mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/arm64/WinogradTransRight.S View File


mindspore/lite/nnacl/assembly/avx/ConvDwFp32Avx3x3.S → mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/avx/ConvDwFp32Avx3x3.S View File


mindspore/lite/nnacl/assembly/avx/ConvDwFp32BorderAvx.S → mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/avx/ConvDwFp32BorderAvx.S View File


mindspore/lite/nnacl/assembly/avx/ConvDwFp32RowAvx.S → mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/avx/ConvDwFp32RowAvx.S View File


mindspore/lite/nnacl/assembly/avx/MatmulAvx.S → mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/avx/MatmulAvx.S View File


mindspore/lite/nnacl/assembly/fp16/ConvDwFp16Border.S → mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/fp16/ConvDwFp16Border.S View File


mindspore/lite/nnacl/assembly/fp16/ConvDwFp16Center.S → mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/fp16/ConvDwFp16Center.S View File


mindspore/lite/nnacl/assembly/fp16/ConvDwFp16Row.S → mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/fp16/ConvDwFp16Row.S View File


mindspore/lite/nnacl/assembly/fp16/DeconvDwFp16Border.S → mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/fp16/DeconvDwFp16Border.S View File


mindspore/lite/nnacl/assembly/fp16/DeconvDwFp16Center.S → mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/fp16/DeconvDwFp16Center.S View File


mindspore/lite/nnacl/assembly/fp16/Float16ToFloat32.S → mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/fp16/Float16ToFloat32.S View File


mindspore/lite/nnacl/assembly/fp16/Float32ToFloat16.S → mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/fp16/Float32ToFloat16.S View File


mindspore/lite/nnacl/assembly/fp16/IndirectGemmFp16_16x8.S → mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/fp16/IndirectGemmFp16_16x8.S View File


mindspore/lite/nnacl/assembly/fp16/MatVecMulFp16.S → mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/fp16/MatVecMulFp16.S View File


mindspore/lite/nnacl/assembly/fp16/MatmulFp16.S → mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/fp16/MatmulFp16.S View File


mindspore/lite/nnacl/assembly/fp16/MatmulFp16Opt.S → mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/fp16/MatmulFp16Opt.S View File


mindspore/lite/nnacl/assembly/fp16/MatmulWinogradFp16.S → mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/fp16/MatmulWinogradFp16.S View File


mindspore/lite/nnacl/assembly/fp16/PostFuncBiasReluC4Fp16.S → mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/fp16/PostFuncBiasReluC4Fp16.S View File


mindspore/lite/nnacl/assembly/fp16/PostFuncBiasReluC8Fp16.S → mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/fp16/PostFuncBiasReluC8Fp16.S View File


mindspore/lite/nnacl/assembly/fp16/TiledC4MatmulFp16.S → mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/fp16/TiledC4MatmulFp16.S View File


mindspore/lite/nnacl/assembly/fp16/WinogradTransLeftFp16.S → mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/fp16/WinogradTransLeftFp16.S View File


mindspore/lite/nnacl/assembly/fp16/WinogradTransRightFp16.S → mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/fp16/WinogradTransRightFp16.S View File


mindspore/lite/nnacl/assembly/opt/MatmulDpInt8.S → mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/opt/MatmulDpInt8.S View File


mindspore/lite/nnacl/assembly/opt/MatmulDpInt8Opt.S → mindspore/ccsrc/backend/kernel_compiler/cpu/nnacl/assembly/opt/MatmulDpInt8Opt.S View File


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